Difference between revisions of "HT USBee-AxPro"

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Line 44: Line 44:
! # !! Pin !! Destination !! Remark
! # !! Pin !! Destination !! Remark
|-
|-
|  || CTL_2 || ADC_CLK || ADC clock
|  || CTL2 || ADC_CLK || ADC clock
|-
|-
|  || PD0..7 || ADC_D1..8 || ADC data output
|  || PD0..7 || ADC_D1..8 || ADC data output
Line 53: Line 53:


* ...
* ...
=== Pin mappings ===
The FX2 CTL2 and PD0..7 pins are mapped exactly like the '''HT2013 V5.00''' version. The TLC5510I OE# pin is tied to GND.


== Photos ==
== Photos ==
Line 58: Line 62:
'''HT2013 V5.00''':
'''HT2013 V5.00''':
<gallery>
<gallery>
 
File:Ht-usbee-axpro_package.jpg |<small>Device package</small>
File:Ht-usbee case front.jpg |<small>Case, front</small>
File:Ht-usbee device.jpg |<small>Device</small>
File:Ht-usbee pcb front.jpg |<small>PCB, front</small>
File:Ht-usbee pcb front.jpg |<small>PCB, front</small>
File:PCB3.jpg |<small>PCB, front</small>
File:Ht-usbee pcb.jpg |<small>PCB, front</small>
File:Ht-usbee pcb.jpg |<small>PCB, front</small>
File:Ht-usbee case front.jpg |<small>Case, front</small>
File:Ht-usbee device.jpg |<small>Device</small>
File:Ht-usbee backside.jpg |<small>PCB, back</small>
File:Ht-usbee backside.jpg |<small>PCB, back</small>
File:Ht-usbee-axpro_package.jpg |<small>Device package</small>
File:TLC5510I.jpg |<small>TLC5510I</small>
File:TLC5510I.jpg |<small>TLC5510I</small>
File:STM8_1.jpg |<small>STM8 1</small>
File:STM8_1.jpg |<small>STM8 1</small>
File:SM8_2.jpg |<small>STM8 2</small>
File:SM8_2.jpg |<small>STM8 2</small>
File:Probe_adaptor.jpg |<small>Probe_adaptor</small>
File:Probe_adaptor.jpg |<small>Probe adaptor</small>
File:PCB3.jpg |<small>PCB, front</small>
File:FX2.jpg |<small>FX2</small>
File:FX2.jpg |<small>FX2</small>
File:Expansion_board.jpg |<small>Expansion_board</small>
File:Expansion_board.jpg |<small>Expansion board</small>
File:AMS1117.jpg |<small>AMS1117</small>
File:AMS1117.jpg |<small>AMS1117</small>
File:7660.jpg |<small>7660</small>
File:7660.jpg |<small>7660</small>

Revision as of 15:14, 27 May 2016

HT USBee-AxPro
Ht-usbee-axpro.png
Status supported
Source code fx2lafw
Channels 8
Samplerate 24MHz
Samplerate (state)
Triggers none (SW-only)
Min/max voltage Digital: -1V — +6V
Analog: ±10V (±20V max)
Threshold voltage Fixed: VIH=1.6V, VIL=1.4V
Memory none
Compression none

The HT USBee-AxPro is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, with 1 additional analog channel.

It is able to switch between USBee AX-Pro, Salea Logic and Altera USB blaster mode via a button. When pressing the button the USB VID/PID changes.

It is a clone of the CWAV USBee AX-Pro.

In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.

Hardware

HT2013 V5.00:

FX2LP pin mappings

# Pin Destination Remark
CTL2 ADC_CLK ADC clock
PD0..7 ADC_D1..8 ADC data output


HT_V6.0:

  • ...

Pin mappings

The FX2 CTL2 and PD0..7 pins are mapped exactly like the HT2013 V5.00 version. The TLC5510I OE# pin is tied to GND.

Photos

HT2013 V5.00:

HT_V6.0:

Protocol

Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.

Resources