Difference between revisions of "HT USBee-AxPro"

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m (Uwe Hermann moved page HT-USBee AxPro to HT USBee-AxPro: Use exact spelling of the device.)
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{{Infobox logic analyzer
{{Infobox logic analyzer
| image            =  
| image            =  
| name            = HT-USBee AxPro
| name            = HT USBee-AxPro
| status          = supported
| status          = supported
| source_code_dir  = fx2lafw
| source_code_dir  = fx2lafw
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}}
}}


The '''HT-USBee AxPro''' is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, and with 1 additional analog channels. It is able to switch between USBee AX-Pro, Salea 8 Logic 8 and Altera Usb blaster mode via a button. When pressing the button the usb id changes.
The '''HT USBee-AxPro''' is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, with 1 additional analog channel.
 
It is able to switch between USBee AX-Pro, Salea Logic and Altera USB blaster mode via a button. When pressing the button the USB VID/PID changes.


It is a clone of the [[CWAV USBee AX-Pro]].
It is a clone of the [[CWAV USBee AX-Pro]].
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In sigrok, we use the open-source [[fx2lafw]] firmware for this logic analyzer.
In sigrok, we use the open-source [[fx2lafw]] firmware for this logic analyzer.


'''Note''': Only the logic analyzer functionality is supported so far, analog support is work in progress.
== Hardware ==


== Hardware ==
'''HT2013 V5.00''':


* '''Main chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A-56SSOP (FX2LP)]
* '''Main chip''': [http://www.cypress.com/?docID=45142 Cypress CY7C68013A-56SSOP (FX2LP)]
* '''I2C EEPROM 1 64k''': [http://ww1.microchip.com/downloads/en/DeviceDoc/21189f.pdf Microchip 24LC641]
* '''64Kbit I²C EEPROM''': [http://ww1.microchip.com/downloads/en/DeviceDoc/21189f.pdf Microchip 24LC641]
* '''I2C EEPROM 2 2k''': [http://ww1.microchip.com/downloads/en/DeviceDoc/21709c.pdf Microchip 24LC02B]
* '''2Kbit I²C EEPROM''': [http://ww1.microchip.com/downloads/en/DeviceDoc/21709c.pdf Microchip 24LC02B]
* '''Auxiliary 8051 chip''': [http://www.st.com/web/en/resource/technical/document/datasheet/DM00024550.pdf ST stm8s003f3] (used for handling the button)
* '''Auxiliary 8051 chip''': [http://www.st.com/web/en/resource/technical/document/datasheet/DM00024550.pdf ST STM8S003F3] (used for handling the button)
* '''Supply voltage regulator''': Advanced Monolithic Systems AMS1117-3.3
* '''Supply voltage regulator''': Advanced Monolithic Systems AMS1117-3.3
* '''Analog-to-Digital converter''': [http://www.ti.com/lit/ds/symlink/tlc5510.pdf Texas Instruments TLC5510I]
* '''Analog-to-digital converter''': [http://www.ti.com/lit/ds/symlink/tlc5510.pdf Texas Instruments TLC5510I]
* '''Analog input amplifiers''': [http://www.analog.com/static/imported-files/data_sheets/AD8065_8066.pdf Analog Devices AD8065] (SMD marking "HRA")
* '''Analog input amplifiers''': [http://www.analog.com/static/imported-files/data_sheets/AD8065_8066.pdf Analog Devices AD8065] (SMD marking "HRA")
* '''Analog amplifiers negative supply''': [http://www.intersil.com/content/dam/Intersil/documents/icl7/icl7660.pdf Intersil ICL7660 (7660 AIBAZ V120428A)]
* '''Analog amplifiers negative supply''': [http://www.intersil.com/content/dam/Intersil/documents/icl7/icl7660.pdf Intersil ICL7660 (7660 AIBAZ V120428A)]
* '''Crystal''': 24MHz
* '''Crystal''': 24MHz
* ...


=== FX2LP pin mappings ===
=== FX2LP pin mappings ===
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{| border="0" style="font-size: smaller;" class="alternategrey sigroktable"
{| border="0" style="font-size: smaller;" class="alternategrey sigroktable"
|-  
|-  
! #     !! Pin         !! Destination !! Remark
! # !! Pin !! Destination !! Remark
|-
|-
|  || CTL_2       || ADC_CLK   || ADC clock
|  || CTL_2 || ADC_CLK || ADC clock
|-
|-
|  || PD0..7       || ADC_D1..8   || ADC data output
|  || PD0..7 || ADC_D1..8 || ADC data output
|}
|}
'''HT_V6.0''':
* ...


== Photos ==
== Photos ==


'''HT2013 V5.00''':
<gallery>
</gallery>
'''HT_V6.0''':
<gallery>
<gallery>
</gallery>
</gallery>
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== Resources ==
== Resources ==


* http://www.epanorama.net/newepa/2014/06/17/ht-usbee-axpro-review/
* [http://www.epanorama.net/newepa/2014/06/17/ht-usbee-axpro-review/ epanorama.net: HT-USBee AxPro review]
* https://www.itead.cc/saleae8-usbee-ax-pro-altera-combination-logic-analyzer.html
* [https://www.itead.cc/saleae8-usbee-ax-pro-altera-combination-logic-analyzer.html Itead: Saleae8 / USBEE AX PRO / Altera Combination: Logic Analyzer]


[[Category:Device]]
[[Category:Device]]

Revision as of 20:51, 24 May 2016

HT USBee-AxPro
Status supported
Source code fx2lafw
Channels 8
Samplerate 24MHz
Samplerate (state) —
Triggers none (SW-only)
Min/max voltage Digital: -1V — +6V
Analog: ±10V (±20V max)
Threshold voltage Fixed: VIH=1.6V, VIL=1.4V
Memory none
Compression none

The HT USBee-AxPro is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, with 1 additional analog channel.

It is able to switch between USBee AX-Pro, Salea Logic and Altera USB blaster mode via a button. When pressing the button the USB VID/PID changes.

It is a clone of the CWAV USBee AX-Pro.

In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.

Hardware

HT2013 V5.00:

FX2LP pin mappings

# Pin Destination Remark
CTL_2 ADC_CLK ADC clock
PD0..7 ADC_D1..8 ADC data output


HT_V6.0:

  • ...

Photos

HT2013 V5.00:

HT_V6.0:

Protocol

Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.

Resources

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