Difference between revisions of "Protocol decoder:Rfm12"
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The <tt>rfm12</tt> decoder stacks on top of the [[Protocol decoder:spi|SPI decoder]] and decodes the SPI exchanges. It shows what commands where send to the chip and decodes the responses. It also interprets the commands and shows what happened to the chip. | The <tt>rfm12</tt> decoder stacks on top of the [[Protocol decoder:spi|SPI decoder]] and decodes the SPI exchanges. It shows what commands where send to the chip and decodes the responses. It also interprets the commands and shows what happened to the chip. | ||
Some decoded commands in [[PulseView]]: | |||
<gallery> | |||
File:RFM12_status_command.png|<small>Status command.</small> | |||
File:RFM12_receiver_control.png|<small>Receiver control command.</small> | |||
</gallery> | |||
== Resources == | == Resources == |
Revision as of 19:28, 11 September 2014
Name | RFM12 |
---|---|
Description | 433, 868 and 915MHz transceiver chip |
Status | supported |
License | GPLv2+ |
Source code | decoders/rfm12 |
Input | spi |
Output | rfm12 |
Probes | — |
Optional probes | — |
The rfm12 decoder supports the control protocol for the HopeRF RFM12 transceiver chip. RF12B is a single chip, low power, multi-channel FSK transceiver designed for use in applications requiring FCC or ETSI conformance for unlicensed use in the 433, 868 and 915 MHz bands.
Hardware
These modules comes in three different form factors, DIP package (shown on the photo) and two SMD packages: S1 with normal crystal and S2 with low-profile crystal.
Pins:
Name | Function |
---|---|
nINT/VDI | Interrupt input (active low)/Valid data indicator |
VDD | Positive power supply |
SDI | SPI data input |
SCK | SPI clock input |
nSEL | Chip select (active low) |
SDO | SPI data output |
nIRQ | Interrupt request output (active low) |
FSK/DATA/nFFS | Transmit FSK data input/ Received data output (FIFO not used)/ FIFO select |
DCLK/CFIL/FFIT | Clock output (no FIFO )/ external filter capacitor(analog mode)/ FIFO
interrupts(active high) |
CLK | Clock output for external microcontroller |
nRES | Reset output (active low) |
GND | Power ground |
Protocol
In minimal configuration the chip uses the standard SPI protocol on pins SDI, SDO, SCK and nSEL. You can optionally connect nIRQ which will be pulled low by the transceiver to trigger interrupt request. There is also an option to transmit and receive the data without the overhead of SPI protocol using dedicated DATA and DCLK pins.
SPI communication happens in a fixed length 16-bit chunks. During each exchange the microcontroller first sends the command and then receives the response.
Decoder
The rfm12 decoder stacks on top of the SPI decoder and decodes the SPI exchanges. It shows what commands where send to the chip and decodes the responses. It also interprets the commands and shows what happened to the chip.
Some decoded commands in PulseView: