scopes: Adapt/fix some code comments, cosmetics.

[sigrok-firmware-fx2lafw.git] / gpif-acquisition.c

diff --git a/gpif-acquisition.c b/gpif-acquisition.c
index 57e852b06be823f28ac6e39a5568ab9eb8d67d21..7d3dcb6d59d8c1c69048ce7b3efbca98d80e5d21 100644 (file)
--- a/gpif-acquisition.c
+++ b/gpif-acquisition.c
@@ -15,8 +15,7 @@
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
 #include <eputils.h>
@@ -46,10 +45,7 @@ static void gpif_setup_registers(void)
        /* TODO. Value probably irrelevant, as we don't use RDY* signals? */
        GPIFREADYCFG = 0;
 
-       /*
-        * Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs.
-        * TODO: Probably irrelevant, as we don't use CTL0-CTL5?
-        */
+       /* Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs. */
        GPIFCTLCFG = 0;
 
        /* When GPIF is idle, tri-state the data bus. */
@@ -196,11 +192,10 @@ bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd)
        while (!(GPIFTRIG & 0x80));
 
        /* Configure the EP2 FIFO. */
-       if (cmd->flags & CMD_START_FLAGS_SAMPLE_16BIT) {
+       if (cmd->flags & CMD_START_FLAGS_SAMPLE_16BIT)
                EP2FIFOCFG = bmAUTOIN | bmWORDWIDE;
-       } else {
+       else
                EP2FIFOCFG = bmAUTOIN;
-       }
        SYNCDELAY();
 
        /* Set IFCONFIG to the correct clock source. */
@@ -212,26 +207,27 @@ bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd)
                           bmGSTATE | bmIFGPIF;
        }
 
-       if (cmd->flags & CMD_START_FLAGS_CLK_CTL2) {
-               uint8_t delay_1, delay_2;
+       /* Populate delay states. */
+       if ((cmd->sample_delay_h == 0 && cmd->sample_delay_l == 0) ||
+           cmd->sample_delay_h >= 6)
+               return false;
 
-               /* We need a pulse where the CTL2 pin alternates states. */
-
-               /* Make the low pulse shorter then the high pulse. */
-               delay_2 = cmd->sample_delay_l >> 2;
-               /* Work around >12MHz case resulting in a 0 delay low pulse. */
-               if (delay_2 == 0)
-                       delay_2 = 1;
-               delay_1 = cmd->sample_delay_l - delay_2;
-
-               gpif_make_delay_state(pSTATE++, delay_2, 0x40);
-               gpif_make_delay_state(pSTATE++, delay_1, 0x46);
+       if (cmd->flags & CMD_START_FLAGS_CLK_CTL2) {
+               uint8_t delay_1, delay_2 = cmd->sample_delay_l;
+
+               /* We need a pulse where the CTL1/2 pins alternate states. */
+               if (cmd->sample_delay_h) {
+                       for (i = 0; i < cmd->sample_delay_h; i++)
+                               gpif_make_delay_state(pSTATE++, 0, 0x06);
+               } else {
+                       delay_1 = delay_2 / 2;
+                       delay_2 -= delay_1;
+                       gpif_make_delay_state(pSTATE++, delay_1, 0x06);
+               }
+
+               /* sample_delay_l is always != 0 for the supported rates. */
+               gpif_make_delay_state(pSTATE++, delay_2, 0x00);
        } else {
-               /* Populate delay states. */
-               if ((cmd->sample_delay_h == 0 && cmd->sample_delay_l == 0) ||
-                       cmd->sample_delay_h >= 6)
-                       return false;
-
                for (i = 0; i < cmd->sample_delay_h; i++)
                        gpif_make_delay_state(pSTATE++, 0, 0x00);