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1 | /* | |
2 | * This file is part of the sigrok-firmware-fx2lafw project. | |
3 | * | |
4 | * Copyright (C) 2009 Ubixum, Inc. | |
5 | * Copyright (C) 2015 Jochen Hoenicke | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2.1 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | #include <fx2macros.h> | |
22 | #include <fx2ints.h> | |
23 | #include <autovector.h> | |
24 | #include <delay.h> | |
25 | #include <setupdat.h> | |
26 | ||
27 | #define SET_ANALOG_MODE() | |
28 | ||
29 | /* Change to support as many interfaces as you need. */ | |
30 | static BYTE altiface = 0; | |
31 | ||
32 | static volatile WORD ledcounter = 0; | |
33 | ||
34 | static volatile __bit dosud = FALSE; | |
35 | static volatile __bit dosuspend = FALSE; | |
36 | ||
37 | extern __code BYTE highspd_dscr; | |
38 | extern __code BYTE fullspd_dscr; | |
39 | ||
40 | void resume_isr(void) __interrupt RESUME_ISR | |
41 | { | |
42 | CLEAR_RESUME(); | |
43 | } | |
44 | ||
45 | void sudav_isr(void) __interrupt SUDAV_ISR | |
46 | { | |
47 | dosud = TRUE; | |
48 | CLEAR_SUDAV(); | |
49 | } | |
50 | ||
51 | void usbreset_isr(void) __interrupt USBRESET_ISR | |
52 | { | |
53 | handle_hispeed(FALSE); | |
54 | CLEAR_USBRESET(); | |
55 | } | |
56 | ||
57 | void hispeed_isr(void) __interrupt HISPEED_ISR | |
58 | { | |
59 | handle_hispeed(TRUE); | |
60 | CLEAR_HISPEED(); | |
61 | } | |
62 | ||
63 | void suspend_isr(void) __interrupt SUSPEND_ISR | |
64 | { | |
65 | dosuspend = TRUE; | |
66 | CLEAR_SUSPEND(); | |
67 | } | |
68 | ||
69 | void timer2_isr(void) __interrupt TF2_ISR | |
70 | { | |
71 | /* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */ | |
72 | PA7 = !PA7; | |
73 | ||
74 | if (ledcounter) { | |
75 | if (--ledcounter == 0) { | |
76 | /* Clear LED. */ | |
77 | PC0 = 1; | |
78 | PC1 = 1; | |
79 | } | |
80 | } | |
81 | ||
82 | TF2 = 0; | |
83 | } | |
84 | ||
85 | /* | |
86 | * This sets three bits for each channel, one channel at a time. | |
87 | * For channel 0 we want to set bits 5, 6 & 7 | |
88 | * For channel 1 we want to set bits 2, 3 & 4 | |
89 | * | |
90 | * We convert the input values that are strange due to original | |
91 | * firmware code into the value of the three bits as follows: | |
92 | * | |
93 | * val -> bits | |
94 | * 1 -> 010b | |
95 | * 2 -> 001b | |
96 | * 5 -> 000b | |
97 | * 10 -> 011b | |
98 | * | |
99 | * The third bit is always zero since there are only four outputs connected | |
100 | * in the serial selector chip. | |
101 | * | |
102 | * The multiplication of the converted value by 0x24 sets the relevant bits in | |
103 | * both channels and then we mask it out to only affect the channel currently | |
104 | * requested. | |
105 | */ | |
106 | static BOOL set_voltage(BYTE channel, BYTE val) | |
107 | { | |
108 | BYTE bits, mask; | |
109 | ||
110 | switch (val) { | |
111 | case 1: | |
112 | bits = 0x24 * 2; | |
113 | break; | |
114 | case 2: | |
115 | bits = 0x24 * 1; | |
116 | break; | |
117 | case 5: | |
118 | bits = 0x24 * 0; | |
119 | break; | |
120 | case 10: | |
121 | bits = 0x24 * 3; | |
122 | break; | |
123 | default: | |
124 | return FALSE; | |
125 | } | |
126 | ||
127 | mask = (channel) ? 0xe0 : 0x1c; | |
128 | IOC = (IOC & ~mask) | (bits & mask); | |
129 | ||
130 | return TRUE; | |
131 | } | |
132 | ||
133 | static BOOL set_numchannels(BYTE numchannels) | |
134 | { | |
135 | if (numchannels == 1 || numchannels == 2) { | |
136 | BYTE fifocfg = 7 + numchannels; | |
137 | EP2FIFOCFG = fifocfg; | |
138 | EP6FIFOCFG = fifocfg; | |
139 | return TRUE; | |
140 | } | |
141 | ||
142 | return FALSE; | |
143 | } | |
144 | ||
145 | static void clear_fifo(void) | |
146 | { | |
147 | GPIFABORT = 0xff; | |
148 | SYNCDELAY3; | |
149 | FIFORESET = 0x80; | |
150 | SYNCDELAY3; | |
151 | FIFORESET = 0x82; | |
152 | SYNCDELAY3; | |
153 | FIFORESET = 0x86; | |
154 | SYNCDELAY3; | |
155 | FIFORESET = 0; | |
156 | } | |
157 | ||
158 | static void stop_sampling(void) | |
159 | { | |
160 | GPIFABORT = 0xff; | |
161 | SYNCDELAY3; | |
162 | INPKTEND = (altiface == 0) ? 6 : 2; | |
163 | } | |
164 | ||
165 | static void start_sampling(void) | |
166 | { | |
167 | int i; | |
168 | ||
169 | SET_ANALOG_MODE(); | |
170 | ||
171 | clear_fifo(); | |
172 | ||
173 | for (i = 0; i < 1000; i++); | |
174 | ||
175 | while (!(GPIFTRIG & 0x80)) | |
176 | ; | |
177 | ||
178 | SYNCDELAY3; | |
179 | GPIFTCB1 = 0x28; | |
180 | SYNCDELAY3; | |
181 | GPIFTCB0 = 0; | |
182 | GPIFTRIG = (altiface == 0) ? 6 : 4; | |
183 | ||
184 | /* Set green LED, don't clear LED. */ | |
185 | ledcounter = 0; | |
186 | PC0 = 1; | |
187 | PC1 = 0; | |
188 | } | |
189 | ||
190 | static void select_interface(BYTE alt) | |
191 | { | |
192 | const BYTE *pPacketSize = \ | |
193 | ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr) | |
194 | + (9 + (16 * alt) + 9 + 4); | |
195 | ||
196 | altiface = alt; | |
197 | ||
198 | if (alt == 0) { | |
199 | /* Bulk on EP6. */ | |
200 | EP2CFG = 0x00; | |
201 | EP6CFG = 0xe0; | |
202 | EP6GPIFFLGSEL = 1; | |
203 | EP6AUTOINLENL = pPacketSize[0]; | |
204 | EP6AUTOINLENH = pPacketSize[1]; | |
205 | } else { | |
206 | /* Iso on EP2. */ | |
207 | EP2CFG = 0xd8; | |
208 | EP6CFG = 0x00; | |
209 | EP2GPIFFLGSEL = 1; | |
210 | EP2AUTOINLENL = pPacketSize[0]; | |
211 | EP2AUTOINLENH = pPacketSize[1] & 0x7; | |
212 | EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1; | |
213 | } | |
214 | } | |
215 | ||
216 | static const struct samplerate_info { | |
217 | BYTE rate; | |
218 | BYTE wait0; | |
219 | BYTE wait1; | |
220 | BYTE opc0; | |
221 | BYTE opc1; | |
222 | BYTE out0; | |
223 | BYTE ifcfg; | |
224 | } samplerates[] = { | |
225 | { 48, 0x80, 0, 3, 0, 0x00, 0xea }, | |
226 | { 30, 0x80, 0, 3, 0, 0x00, 0xaa }, | |
227 | { 24, 1, 0, 2, 1, 0x40, 0xca }, | |
228 | { 16, 1, 1, 2, 0, 0x40, 0xca }, | |
229 | { 12, 2, 1, 2, 0, 0x40, 0xca }, | |
230 | { 8, 3, 2, 2, 0, 0x40, 0xca }, | |
231 | { 4, 6, 5, 2, 0, 0x40, 0xca }, | |
232 | { 2, 12, 11, 2, 0, 0x40, 0xca }, | |
233 | { 1, 24, 23, 2, 0, 0x40, 0xca }, | |
234 | { 50, 48, 47, 2, 0, 0x40, 0xca }, | |
235 | { 20, 120, 119, 2, 0, 0x40, 0xca }, | |
236 | { 10, 240, 239, 2, 0, 0x40, 0xca }, | |
237 | }; | |
238 | ||
239 | static BOOL set_samplerate(BYTE rate) | |
240 | { | |
241 | BYTE i = 0; | |
242 | ||
243 | while (samplerates[i].rate != rate) { | |
244 | i++; | |
245 | if (i == sizeof(samplerates) / sizeof(samplerates[0])) | |
246 | return FALSE; | |
247 | } | |
248 | ||
249 | IFCONFIG = samplerates[i].ifcfg; | |
250 | ||
251 | AUTOPTRSETUP = 7; | |
252 | AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */ | |
253 | AUTOPTRL2 = 0x00; | |
254 | ||
255 | /* | |
256 | * The program for low-speed, e.g. 1 MHz, is: | |
257 | * wait 24, CTLx=0, FIFO | |
258 | * wait 23, CTLx=1 | |
259 | * jump 0, CTLx=1 | |
260 | * | |
261 | * The program for 24 MHz is: | |
262 | * wait 1, CTLx=0, FIFO | |
263 | * jump 0, CTLx=1 | |
264 | * | |
265 | * The program for 30/48 MHz is: | |
266 | * jump 0, CTLx=Z, FIFO, LOOP | |
267 | * | |
268 | * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.) | |
269 | */ | |
270 | ||
271 | /* LENGTH / BRANCH 0-7 */ | |
272 | EXTAUTODAT2 = samplerates[i].wait0; | |
273 | EXTAUTODAT2 = samplerates[i].wait1; | |
274 | EXTAUTODAT2 = 1; | |
275 | EXTAUTODAT2 = 0; | |
276 | EXTAUTODAT2 = 0; | |
277 | EXTAUTODAT2 = 0; | |
278 | EXTAUTODAT2 = 0; | |
279 | EXTAUTODAT2 = 0; | |
280 | ||
281 | /* OPCODE 0-7 */ | |
282 | EXTAUTODAT2 = samplerates[i].opc0; | |
283 | EXTAUTODAT2 = samplerates[i].opc1; | |
284 | EXTAUTODAT2 = 1; /* DATA=0 DP=1 */ | |
285 | EXTAUTODAT2 = 0; | |
286 | EXTAUTODAT2 = 0; | |
287 | EXTAUTODAT2 = 0; | |
288 | EXTAUTODAT2 = 0; | |
289 | EXTAUTODAT2 = 0; | |
290 | ||
291 | /* OUTPUT 0-7 */ | |
292 | EXTAUTODAT2 = samplerates[i].out0; | |
293 | EXTAUTODAT2 = 0x44; /* OE2=1, CTL2=1 */ | |
294 | EXTAUTODAT2 = 0x44; /* OE2=1, CTL2=1 */ | |
295 | EXTAUTODAT2 = 0; | |
296 | EXTAUTODAT2 = 0; | |
297 | EXTAUTODAT2 = 0; | |
298 | EXTAUTODAT2 = 0; | |
299 | EXTAUTODAT2 = 0; | |
300 | ||
301 | /* LOGIC FUNCTION 0-7 */ | |
302 | EXTAUTODAT2 = 0; | |
303 | EXTAUTODAT2 = 0; | |
304 | EXTAUTODAT2 = 0; | |
305 | EXTAUTODAT2 = 0; | |
306 | EXTAUTODAT2 = 0; | |
307 | EXTAUTODAT2 = 0; | |
308 | EXTAUTODAT2 = 0; | |
309 | EXTAUTODAT2 = 0; | |
310 | ||
311 | for (i = 0; i < 96; i++) | |
312 | EXTAUTODAT2 = 0; | |
313 | ||
314 | return TRUE; | |
315 | } | |
316 | ||
317 | /* Set *alt_ifc to the current alt interface for ifc. */ | |
318 | BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc) | |
319 | { | |
320 | (void)ifc; | |
321 | ||
322 | *alt_ifc = altiface; | |
323 | ||
324 | return TRUE; | |
325 | } | |
326 | ||
327 | /* | |
328 | * Return TRUE if you set the interface requested. | |
329 | * | |
330 | * Note: This function should reconfigure and reset the endpoints | |
331 | * according to the interface descriptors you provided. | |
332 | */ | |
333 | BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc) | |
334 | { | |
335 | if (ifc == 0) | |
336 | select_interface(alt_ifc); | |
337 | ||
338 | return TRUE; | |
339 | } | |
340 | ||
341 | BYTE handle_get_configuration(void) | |
342 | { | |
343 | /* We only support configuration 0. */ | |
344 | return 0; | |
345 | } | |
346 | ||
347 | BOOL handle_set_configuration(BYTE cfg) | |
348 | { | |
349 | /* We only support configuration 0. */ | |
350 | (void)cfg; | |
351 | ||
352 | return TRUE; | |
353 | } | |
354 | ||
355 | BOOL handle_vendorcommand(BYTE cmd) | |
356 | { | |
357 | stop_sampling(); | |
358 | ||
359 | /* Set red LED. */ | |
360 | PC0 = 0; | |
361 | PC1 = 1; | |
362 | ledcounter = 1000; | |
363 | ||
364 | /* Clear EP0BCH/L for each valid command. */ | |
365 | if (cmd >= 0xe0 && cmd <= 0xe4) { | |
366 | EP0BCH = 0; | |
367 | EP0BCL = 0; | |
368 | while (EP0CS & bmEPBUSY); | |
369 | } | |
370 | ||
371 | switch (cmd) { | |
372 | case 0xe0: | |
373 | case 0xe1: | |
374 | set_voltage(cmd - 0xe0, EP0BUF[0]); | |
375 | return TRUE; | |
376 | case 0xe2: | |
377 | set_samplerate(EP0BUF[0]); | |
378 | return TRUE; | |
379 | case 0xe3: | |
380 | if (EP0BUF[0] == 1) | |
381 | start_sampling(); | |
382 | return TRUE; | |
383 | case 0xe4: | |
384 | set_numchannels(EP0BUF[0]); | |
385 | return TRUE; | |
386 | } | |
387 | ||
388 | return FALSE; /* Not handled by handlers. */ | |
389 | } | |
390 | ||
391 | static void init(void) | |
392 | { | |
393 | EP4CFG = 0; | |
394 | EP8CFG = 0; | |
395 | ||
396 | SET_ANALOG_MODE(); | |
397 | ||
398 | /* In idle mode tristate all outputs. */ | |
399 | GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */ | |
400 | GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */ | |
401 | GPIFWFSELECT = 0x00; | |
402 | GPIFREADYSTAT = 0x00; | |
403 | ||
404 | stop_sampling(); | |
405 | ||
406 | set_voltage(0, 1); | |
407 | set_voltage(1, 1); | |
408 | set_samplerate(1); | |
409 | set_numchannels(2); | |
410 | select_interface(0); | |
411 | } | |
412 | ||
413 | static void main(void) | |
414 | { | |
415 | /* Save energy. */ | |
416 | SETCPUFREQ(CLK_12M); | |
417 | ||
418 | init(); | |
419 | ||
420 | /* Set up interrupts. */ | |
421 | USE_USB_INTS(); | |
422 | ||
423 | ENABLE_SUDAV(); | |
424 | ENABLE_USBRESET(); | |
425 | ENABLE_HISPEED(); | |
426 | ENABLE_SUSPEND(); | |
427 | ENABLE_RESUME(); | |
428 | ||
429 | /* Global (8051) interrupt enable. */ | |
430 | EA = 1; | |
431 | ||
432 | /* Init timer2. */ | |
433 | RCAP2L = -500 & 0xff; | |
434 | RCAP2H = (-500 & 0xff00) >> 8; | |
435 | T2CON = 0; | |
436 | ET2 = 1; | |
437 | TR2 = 1; | |
438 | ||
439 | RENUMERATE(); | |
440 | ||
441 | PORTCCFG = 0; | |
442 | PORTACFG = 0; | |
443 | OEC = 0xff; | |
444 | OEA = 0x80; | |
445 | ||
446 | while (TRUE) { | |
447 | if (dosud) { | |
448 | dosud = FALSE; | |
449 | handle_setupdata(); | |
450 | } | |
451 | ||
452 | if (dosuspend) { | |
453 | dosuspend = FALSE; | |
454 | do { | |
455 | /* Make sure ext wakeups are cleared. */ | |
456 | WAKEUPCS |= bmWU | bmWU2; | |
457 | SUSPEND = 1; | |
458 | PCON |= 1; | |
459 | __asm | |
460 | nop | |
461 | nop | |
462 | nop | |
463 | nop | |
464 | nop | |
465 | nop | |
466 | nop | |
467 | __endasm; | |
468 | } while (!remote_wakeup_allowed && REMOTE_WAKEUP()); | |
469 | ||
470 | /* Resume (TRM 6.4). */ | |
471 | if (REMOTE_WAKEUP()) { | |
472 | delay(5); | |
473 | USBCS |= bmSIGRESUME; | |
474 | delay(15); | |
475 | USBCS &= ~bmSIGRESUME; | |
476 | } | |
477 | } | |
478 | } | |
479 | } |