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1/*
2 * This file is part of the sigrok-firmware-fx2lafw project.
3 *
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21#define OE_CTL (((1 << CTL_BIT) << 4) | (1 << CTL_BIT)) /* OEx = CTLx = 1 */
22
23static BOOL set_voltage(BYTE channel, BYTE val);
24
25struct samplerate_info {
26 BYTE rate;
27 BYTE wait0;
28 BYTE wait1;
29 BYTE opc0;
30 BYTE opc1;
31 BYTE out0;
32 BYTE ifcfg;
33};
34
35/* Change to support as many interfaces as you need. */
36static BYTE altiface = 0;
37
38static volatile WORD ledcounter = 0;
39
40static volatile __bit dosud = FALSE;
41static volatile __bit dosuspend = FALSE;
42
43extern __code BYTE highspd_dscr;
44extern __code BYTE fullspd_dscr;
45
46void resume_isr(void) __interrupt RESUME_ISR
47{
48 CLEAR_RESUME();
49}
50
51void sudav_isr(void) __interrupt SUDAV_ISR
52{
53 dosud = TRUE;
54 CLEAR_SUDAV();
55}
56
57void usbreset_isr(void) __interrupt USBRESET_ISR
58{
59 handle_hispeed(FALSE);
60 CLEAR_USBRESET();
61}
62
63void hispeed_isr(void) __interrupt HISPEED_ISR
64{
65 handle_hispeed(TRUE);
66 CLEAR_HISPEED();
67}
68
69void suspend_isr(void) __interrupt SUSPEND_ISR
70{
71 dosuspend = TRUE;
72 CLEAR_SUSPEND();
73}
74
75void timer2_isr(void) __interrupt TF2_ISR
76{
ba63ce8b 77 /* Toggle the probe calibration pin, only accurate up to ca. 8MHz. */
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78 TOGGLE_CALIBRATION_PIN();
79
80 if (ledcounter && (--ledcounter == 0))
81 LED_CLEAR();
82
83 TF2 = 0;
84}
85
86/**
87 * Each LSB in the nibble of the byte controls the coupling per channel.
88 *
89 * Setting PE3 disables AC coupling capacitor on CH0.
90 * Setting PE0 disables AC coupling capacitor on CH1.
91 */
92static void set_coupling(BYTE coupling_cfg)
93{
94 if (coupling_cfg & 0x01)
95 IOE |= 0x08;
96 else
97 IOE &= ~0x08;
98
99 if (coupling_cfg & 0x10)
100 IOE |= 0x01;
101 else
102 IOE &= ~0x01;
103}
104
105static BOOL set_numchannels(BYTE numchannels)
106{
107 if (numchannels == 1 || numchannels == 2) {
108 BYTE fifocfg = 7 + numchannels;
109 EP2FIFOCFG = fifocfg;
110 EP6FIFOCFG = fifocfg;
111 return TRUE;
112 }
113
114 return FALSE;
115}
116
117static void clear_fifo(void)
118{
119 GPIFABORT = 0xff;
120 SYNCDELAY3;
121 FIFORESET = 0x80;
122 SYNCDELAY3;
123 FIFORESET = 0x82;
124 SYNCDELAY3;
125 FIFORESET = 0x86;
126 SYNCDELAY3;
127 FIFORESET = 0;
128}
129
130static void stop_sampling(void)
131{
132 GPIFABORT = 0xff;
133 SYNCDELAY3;
134 INPKTEND = (altiface == 0) ? 6 : 2;
135}
136
137static void start_sampling(void)
138{
139 int i;
140
141 SET_ANALOG_MODE();
142
143 clear_fifo();
144
145 for (i = 0; i < 1000; i++);
146
147 while (!(GPIFTRIG & 0x80))
148 ;
149
150 SYNCDELAY3;
151 GPIFTCB1 = 0x28;
152 SYNCDELAY3;
153 GPIFTCB0 = 0;
154 GPIFTRIG = (altiface == 0) ? 6 : 4;
155
156 /* Set green LED, don't clear LED afterwards (ledcounter = 0). */
157 LED_GREEN();
158 ledcounter = 0;
159}
160
161static void select_interface(BYTE alt)
162{
163 const BYTE *pPacketSize = \
164 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
165 + (9 + (16 * alt) + 9 + 4);
166
167 altiface = alt;
168
169 if (alt == 0) {
170 /* Bulk on EP6. */
171 EP2CFG = 0x00;
172 EP6CFG = 0xe0;
173 EP6GPIFFLGSEL = 1;
174 EP6AUTOINLENL = pPacketSize[0];
175 EP6AUTOINLENH = pPacketSize[1];
176 } else {
177 /* Iso on EP2. */
178 EP2CFG = 0xd8;
179 EP6CFG = 0x00;
180 EP2GPIFFLGSEL = 1;
181 EP2AUTOINLENL = pPacketSize[0];
182 EP2AUTOINLENH = pPacketSize[1] & 0x7;
183 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
184 }
185}
186
187static BOOL set_samplerate(BYTE rate)
188{
189 BYTE i = 0;
190
191 while (samplerates[i].rate != rate) {
192 i++;
193 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
194 return FALSE;
195 }
196
197 IFCONFIG = samplerates[i].ifcfg;
198
199 AUTOPTRSETUP = 7;
200 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
201 AUTOPTRL2 = 0x00;
202
203 /*
204 * The program for low-speed, e.g. 1 MHz, is:
205 * wait 24, CTLx=0, FIFO
206 * wait 23, CTLx=1
207 * jump 0, CTLx=1
208 *
209 * The program for 24 MHz is:
210 * wait 1, CTLx=0, FIFO
211 * jump 0, CTLx=1
212 *
213 * The program for 30/48 MHz is:
214 * jump 0, CTLx=Z, FIFO, LOOP
215 *
216 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
217 */
218
219 /* LENGTH / BRANCH 0-7 */
220 EXTAUTODAT2 = samplerates[i].wait0;
221 EXTAUTODAT2 = samplerates[i].wait1;
222 EXTAUTODAT2 = 1;
223 EXTAUTODAT2 = 0;
224 EXTAUTODAT2 = 0;
225 EXTAUTODAT2 = 0;
226 EXTAUTODAT2 = 0;
227 EXTAUTODAT2 = 0;
228
229 /* OPCODE 0-7 */
230 EXTAUTODAT2 = samplerates[i].opc0;
231 EXTAUTODAT2 = samplerates[i].opc1;
232 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
233 EXTAUTODAT2 = 0;
234 EXTAUTODAT2 = 0;
235 EXTAUTODAT2 = 0;
236 EXTAUTODAT2 = 0;
237 EXTAUTODAT2 = 0;
238
239 /* OUTPUT 0-7 */
240 EXTAUTODAT2 = samplerates[i].out0;
241 EXTAUTODAT2 = OE_CTL;
242 EXTAUTODAT2 = OE_CTL;
243 EXTAUTODAT2 = 0;
244 EXTAUTODAT2 = 0;
245 EXTAUTODAT2 = 0;
246 EXTAUTODAT2 = 0;
247 EXTAUTODAT2 = 0;
248
249 /* LOGIC FUNCTION 0-7 */
250 EXTAUTODAT2 = 0;
251 EXTAUTODAT2 = 0;
252 EXTAUTODAT2 = 0;
253 EXTAUTODAT2 = 0;
254 EXTAUTODAT2 = 0;
255 EXTAUTODAT2 = 0;
256 EXTAUTODAT2 = 0;
257 EXTAUTODAT2 = 0;
258
259 for (i = 0; i < 96; i++)
260 EXTAUTODAT2 = 0;
261
262 return TRUE;
263}
264
265static BOOL set_calibration_pulse(BYTE fs)
266{
267 switch (fs) {
268 case 0: // 100Hz
269 RCAP2L = -10000 & 0xff;
270 RCAP2H = (-10000 & 0xff00) >> 8;
271 return TRUE;
272 case 1: // 1kHz
273 RCAP2L = -1000 & 0xff;
274 RCAP2H = (-1000 & 0xff00) >> 8;
275 return TRUE;
276 case 10: // 1kHz
277 RCAP2L = (BYTE)(-100 & 0xff);
278 RCAP2H = 0xff;
279 return TRUE;
280 case 50: // 50kHz
281 RCAP2L = (BYTE)(-20 & 0xff);
282 RCAP2H = 0xff;
283 return TRUE;
284 default:
285 return FALSE;
286 }
287}
288
289/* Set *alt_ifc to the current alt interface for ifc. */
290BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
291{
292 (void)ifc;
293
294 *alt_ifc = altiface;
295
296 return TRUE;
297}
298
299/*
300 * Return TRUE if you set the interface requested.
301 *
302 * Note: This function should reconfigure and reset the endpoints
303 * according to the interface descriptors you provided.
304 */
305BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
306{
307 if (ifc == 0)
308 select_interface(alt_ifc);
309
310 return TRUE;
311}
312
313BYTE handle_get_configuration(void)
314{
315 /* We only support configuration 0. */
316 return 0;
317}
318
319BOOL handle_set_configuration(BYTE cfg)
320{
321 /* We only support configuration 0. */
322 (void)cfg;
323
324 return TRUE;
325}
326
327BOOL handle_vendorcommand(BYTE cmd)
328{
329 stop_sampling();
330
331 /* Set red LED, clear after timeout. */
332 LED_RED();
333 ledcounter = 1000;
334
335 /* Clear EP0BCH/L for each valid command. */
336 if (cmd >= 0xe0 && cmd <= 0xe6) {
337 EP0BCH = 0;
338 EP0BCL = 0;
339 while (EP0CS & bmEPBUSY);
340 }
341
342 switch (cmd) {
343 case 0xe0:
344 case 0xe1:
345 set_voltage(cmd - 0xe0, EP0BUF[0]);
346 return TRUE;
347 case 0xe2:
348 set_samplerate(EP0BUF[0]);
349 return TRUE;
350 case 0xe3:
351 if (EP0BUF[0] == 1)
352 start_sampling();
353 return TRUE;
354 case 0xe4:
355 set_numchannels(EP0BUF[0]);
356 return TRUE;
357 case 0xe5:
358 SET_COUPLING(EP0BUF[0]);
359 return TRUE;
360 case 0xe6:
361 SET_CALIBRATION_PULSE(EP0BUF[0]);
362 return TRUE;
363 }
364
365 return FALSE; /* Not handled by handlers. */
366}
367
368static void init(void)
369{
370 EP4CFG = 0;
371 EP8CFG = 0;
372
373 SET_ANALOG_MODE();
374
375 /* In idle mode tristate all outputs. */
376 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
377 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
378 GPIFWFSELECT = 0x00;
379 GPIFREADYSTAT = 0x00;
380
381 stop_sampling();
382
383 set_voltage(0, 1);
384 set_voltage(1, 1);
385 set_samplerate(1);
386 set_numchannels(2);
387 select_interface(0);
388}
389
390static void main(void)
391{
392 /* Save energy. */
393 SETCPUFREQ(CLK_12M);
394
395 init();
396
397 /* Set up interrupts. */
398 USE_USB_INTS();
399
400 ENABLE_SUDAV();
401 ENABLE_USBRESET();
402 ENABLE_HISPEED();
403 ENABLE_SUSPEND();
404 ENABLE_RESUME();
405
406 /* Global (8051) interrupt enable. */
407 EA = 1;
408
409 /* Init timer2. */
410 RCAP2L = -TIMER2_VAL & 0xff;
411 RCAP2H = (-TIMER2_VAL & 0xff00) >> 8;
412 T2CON = 0;
413 ET2 = 1;
414 TR2 = 1;
415
416 RENUMERATE_UNCOND();
417
418 PORTECFG = 0;
419 PORTCCFG = 0;
420 PORTACFG = 0;
421 OEE = 0xff;
422 OEC = 0xff;
423 OEA = 0xff;
424
425 while (TRUE) {
426 if (dosud) {
427 dosud = FALSE;
428 handle_setupdata();
429 }
430
431 if (dosuspend) {
432 dosuspend = FALSE;
433 do {
434 /* Make sure ext wakeups are cleared. */
435 WAKEUPCS |= bmWU | bmWU2;
436 SUSPEND = 1;
437 PCON |= 1;
438 __asm
439 nop
440 nop
441 nop
442 nop
443 nop
444 nop
445 nop
446 __endasm;
447 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
448
449 /* Resume (TRM 6.4). */
450 if (REMOTE_WAKEUP()) {
451 delay(5);
452 USBCS |= bmSIGRESUME;
453 delay(15);
454 USBCS &= ~bmSIGRESUME;
455 }
456 }
457 }
458}