]> sigrok.org Git - sigrok-firmware-fx2lafw.git/blame - hw/hantek-6022bl/fw.c
bugfix in hantek 6022BL voltage range selection
[sigrok-firmware-fx2lafw.git] / hw / hantek-6022bl / fw.c
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1/*
2 * This file is part of the sigrok-firmware-fx2lafw project.
3 *
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <fx2macros.h>
22#include <fx2ints.h>
23#include <autovector.h>
24#include <delay.h>
25#include <setupdat.h>
26
fdaf46b9 27#define SET_ANALOG_MODE() do { PA7 = 1; } while (0)
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28
29#define SET_COUPLING(x)
30
31#define SET_CALIBRATION_PULSE(x)
32
fdaf46b9 33#define TOGGLE_CALIBRATION_PIN() do { PC2 = !PC2; } while (0)
fd70a923 34
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35#define LED_CLEAR() do { PC0 = 1; PC1 = 1; } while (0)
36#define LED_GREEN() do { PC0 = 1; PC1 = 0; } while (0)
37#define LED_RED() do { PC0 = 0; PC1 = 1; } while (0)
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38
39#define TIMER2_VAL 500
40
41/* CTLx pin index (IFCLK, ADC clock input). */
42#define CTL_BIT 0
43
44#define OUT0 ((1 << CTL_BIT) << 4) /* OEx = 1, CTLx = 0 */
45
46static const struct samplerate_info samplerates[] = {
47 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
48 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
49 { 24, 1, 0, 2, 1, OUT0, 0xca },
50 { 16, 1, 1, 2, 0, OUT0, 0xca },
51 { 12, 2, 1, 2, 0, OUT0, 0xca },
52 { 8, 3, 2, 2, 0, OUT0, 0xca },
53 { 4, 6, 5, 2, 0, OUT0, 0xca },
54 { 2, 12, 11, 2, 0, OUT0, 0xca },
55 { 1, 24, 23, 2, 0, OUT0, 0xca },
56 { 50, 48, 47, 2, 0, OUT0, 0xca },
57 { 20, 120, 119, 2, 0, OUT0, 0xca },
58 { 10, 240, 239, 2, 0, OUT0, 0xca },
59};
60
61/*
62 * This sets three bits for each channel, one channel at a time.
63 * For channel 0 we want to set bits 1, 2 & 3
64 * For channel 1 we want to set bits 4, 5 & 6
65 *
66 * We convert the input values that are strange due to original
67 * firmware code into the value of the three bits as follows:
68 *
69 * val -> bits
70 * 1 -> 010b
71 * 2 -> 001b
72 * 5 -> 000b
73 * 10 -> 011b
74 *
75 * The third bit is always zero since there are only four outputs connected
76 * in the serial selector chip.
77 *
78 * The multiplication of the converted value by 0x24 sets the relevant bits in
79 * both channels and then we mask it out to only affect the channel currently
80 * requested.
81 */
82static BOOL set_voltage(BYTE channel, BYTE val)
83{
84 BYTE bits, mask;
85
86 switch (val) {
87 case 1:
88 bits = 0x02;
89 break;
90 case 2:
91 bits = 0x01;
92 break;
93 case 5:
94 bits = 0x00;
95 break;
96 case 10:
97 bits = 0x03;
98 break;
99 default:
100 return FALSE;
101 }
102
87da1d2c 103 bits = bits << (channel ? 4 : 1);
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104 mask = (channel) ? 0x70 : 0x0e;
105 IOA = (IOA & ~mask) | (bits & mask);
106
107 return TRUE;
108}
109
110#include <scope.inc>