i2s: First I2S dump

[sigrok-dumps.git] / i2s / 2ch-16bit-16khz / README

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+-------------------------------------------------------------------------------
+I2S Master 2-channel 16-bit 16-kHz
+-------------------------------------------------------------------------------
+
+This is an example of an I2S master with a playing a recording of the BBC
+shipping forecast through one channel, and the other channel disconnected.
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used for capturing was a EE Electronics ESLA201A at a 
+sample rate of 16MHz. The logic analyzer probes were connected to the I2S
+pins like this:
+
+  Probe       Signal
+  ------------------------
+  0           Clock
+  1           Frame Select
+  2           Data