sr_config_set(): Factor out SR_ERR_DEV_CLOSED check.

[libsigrok.git] / src / hardware / openbench-logic-sniffer / api.c

diff --git a/src/hardware/openbench-logic-sniffer/api.c b/src/hardware/openbench-logic-sniffer/api.c
index c04595350c6bcc562e978a65940c6eadb63c9176..93fa3bd7e57618209b19655f65aed554df708c29 100644 (file)
--- a/src/hardware/openbench-logic-sniffer/api.c
+++ b/src/hardware/openbench-logic-sniffer/api.c
@@ -237,9 +237,6 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd
 
        (void)cg;
 
-       if (sdi->status != SR_ST_ACTIVE)
-               return SR_ERR_DEV_CLOSED;
-
        devc = sdi->priv;
 
        switch (key) {
@@ -439,9 +436,6 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
        int num_ols_changrp;
        int ret, i;
 
-       if (sdi->status != SR_ST_ACTIVE)
-               return SR_ERR_DEV_CLOSED;
-
        devc = sdi->priv;
        serial = sdi->conn;
 
@@ -473,6 +467,14 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
                return SR_ERR;
        }
        if (devc->num_stages > 0) {
+               /*
+                * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
+                * reset command must be send prior each arm command
+                */
+               sr_dbg("Send reset command before trigger configure");
+               if (ols_send_reset(serial) != SR_OK)
+                       return SR_ERR;
+
                delaycount = readcount * (1 - devc->capture_ratio / 100.0);
                devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
                for (i = 0; i <= devc->num_stages; i++) {