output/csv: use intermediate time_t var, silence compiler warning

[libsigrok.git] / src / hardware / dreamsourcelab-dslogic / protocol.h

diff --git a/src/hardware/dreamsourcelab-dslogic/protocol.h b/src/hardware/dreamsourcelab-dslogic/protocol.h
index 6d64f31f88d2a30d363b77b9e8eac742c5c25c60..6af7c823663ec19b3a65e2e40675e30525b4dd5e 100644 (file)
--- a/src/hardware/dreamsourcelab-dslogic/protocol.h
+++ b/src/hardware/dreamsourcelab-dslogic/protocol.h
@@ -77,10 +77,13 @@ struct dslogic_mode {
 };
 
 struct dslogic_trigger_pos {
+       uint32_t check_id;
        uint32_t real_pos;
        uint32_t ram_saddr;
-       uint32_t remain_cnt;
-       uint8_t first_block[500];
+       uint32_t remain_cnt_l;
+       uint32_t remain_cnt_h;
+       uint32_t status;
+       uint8_t first_block[488];
 };
 
 struct dslogic_profile {