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Various minor whitespace fixes.
[libsigrok.git] / src / hardware / pipistrello-ols / protocol.c
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4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21
22extern SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 23
24SR_PRIV int write_shortcommand(struct dev_context *devc, uint8_t command)
25{
26 uint8_t buf[1];
27 int bytes_written;
28
29 sr_dbg("Sending cmd 0x%.2x.", command);
30 buf[0] = command;
31 bytes_written = ftdi_write_data(devc->ftdic, buf, 1);
32 if (bytes_written < 0) {
33 sr_err("Failed to write FTDI data (%d): %s.",
34 bytes_written, ftdi_get_error_string(devc->ftdic));
35 return SR_ERR;
36 } else if (bytes_written != 1) {
37 sr_err("FTDI write error, only %d/%d bytes written: %s.",
38 bytes_written, 1, ftdi_get_error_string(devc->ftdic));
39 return SR_ERR;
40 }
41
42 return SR_OK;
43}
44
45SR_PRIV int write_longcommand(struct dev_context *devc, uint8_t command, uint8_t *data)
46{
47 uint8_t buf[5];
48 int bytes_written;
49
50 sr_dbg("Sending cmd 0x%.2x data 0x%.2x%.2x%.2x%.2x.", command,
51 data[0], data[1], data[2], data[3]);
52 buf[0] = command;
53 buf[1] = data[0];
54 buf[2] = data[1];
55 buf[3] = data[2];
56 buf[4] = data[3];
57 bytes_written = ftdi_write_data(devc->ftdic, buf, 5);
58 if (bytes_written < 0) {
59 sr_err("Failed to write FTDI data (%d): %s.",
60 bytes_written, ftdi_get_error_string(devc->ftdic));
61 return SR_ERR;
62 } else if (bytes_written != 5) {
63 sr_err("FTDI write error, only %d/%d bytes written: %s.",
64 bytes_written, 1, ftdi_get_error_string(devc->ftdic));
65 return SR_ERR;
66 }
67
68 return SR_OK;
69}
70
71SR_PRIV int p_ols_open(struct dev_context *devc)
72{
73 int ret;
74
75 /* Note: Caller checks devc and devc->ftdic. */
76
77 /* Select interface B, otherwise communication will fail. */
78 ret = ftdi_set_interface(devc->ftdic, INTERFACE_B);
79 if (ret < 0) {
80 sr_err("Failed to set FTDI interface B (%d): %s", ret,
81 ftdi_get_error_string(devc->ftdic));
82 return SR_ERR;
83 }
84 sr_dbg("FTDI chip interface B set successfully.");
85
86 /* Check for the device and temporarily open it. */
87 ret = ftdi_usb_open_desc(devc->ftdic, USB_VENDOR_ID, USB_DEVICE_ID,
88 USB_IPRODUCT, NULL);
89 if (ret < 0) {
90 /* Log errors, except for -3 ("device not found"). */
91 if (ret != -3)
92 sr_err("Failed to open device (%d): %s", ret,
93 ftdi_get_error_string(devc->ftdic));
94 return SR_ERR;
95 }
96 sr_dbg("FTDI device opened successfully.");
97
98 /* Purge RX/TX buffers in the FTDI chip. */
99 if ((ret = ftdi_usb_purge_buffers(devc->ftdic)) < 0) {
100 sr_err("Failed to purge FTDI RX/TX buffers (%d): %s.",
101 ret, ftdi_get_error_string(devc->ftdic));
102 goto err_open_close_ftdic;
103 }
104 sr_dbg("FTDI chip buffers purged successfully.");
105
106 /* Reset the FTDI bitmode. */
107 ret = ftdi_set_bitmode(devc->ftdic, 0xff, BITMODE_RESET);
108 if (ret < 0) {
109 sr_err("Failed to reset the FTDI chip bitmode (%d): %s.",
110 ret, ftdi_get_error_string(devc->ftdic));
111 goto err_open_close_ftdic;
112 }
113 sr_dbg("FTDI chip bitmode reset successfully.");
114
115 /* Set the FTDI latency timer to 16. */
116 ret = ftdi_set_latency_timer(devc->ftdic, 16);
117 if (ret < 0) {
118 sr_err("Failed to set FTDI latency timer (%d): %s.",
119 ret, ftdi_get_error_string(devc->ftdic));
120 goto err_open_close_ftdic;
121 }
122 sr_dbg("FTDI chip latency timer set successfully.");
123
124 /* Set the FTDI read data chunk size to 64kB. */
125 ret = ftdi_read_data_set_chunksize(devc->ftdic, 64 * 1024);
126 if (ret < 0) {
127 sr_err("Failed to set FTDI read data chunk size (%d): %s.",
128 ret, ftdi_get_error_string(devc->ftdic));
129 goto err_open_close_ftdic;
130 }
131 sr_dbg("FTDI chip read data chunk size set successfully.");
132
133 return SR_OK;
134
135err_open_close_ftdic:
1f9bcd0f 136 ftdi_usb_close(devc->ftdic);
4bd80e12 137 return SR_ERR;
138}
139
140SR_PRIV int p_ols_close(struct dev_context *devc)
141{
142 int ret;
143
144 /* Note: Caller checks devc and devc->ftdic. */
145
146 if ((ret = ftdi_usb_close(devc->ftdic)) < 0) {
147 sr_err("Failed to close FTDI device (%d): %s.",
148 ret, ftdi_get_error_string(devc->ftdic));
149 return SR_ERR;
150 }
151
152 return SR_OK;
153}
154
acc885c7
BV
155/* Configures the channel mask based on which channels are enabled. */
156SR_PRIV void pols_channel_mask(const struct sr_dev_inst *sdi)
4bd80e12 157{
158 struct dev_context *devc;
acc885c7 159 struct sr_channel *channel;
4bd80e12 160 const GSList *l;
4bd80e12 161
162 devc = sdi->priv;
163
164 devc->channel_mask = 0;
acc885c7
BV
165 for (l = sdi->channels; l; l = l->next) {
166 channel = l->data;
167 if (channel->enabled)
168 devc->channel_mask |= 1 << channel->index;
169 }
170}
171
172SR_PRIV int pols_convert_trigger(const struct sr_dev_inst *sdi)
173{
174 struct dev_context *devc;
175 struct sr_trigger *trigger;
176 struct sr_trigger_stage *stage;
177 struct sr_trigger_match *match;
178 const GSList *l, *m;
179 int i;
180
181 devc = sdi->priv;
182
183 devc->num_stages = 0;
4bd80e12 184 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
185 devc->trigger_mask[i] = 0;
186 devc->trigger_value[i] = 0;
1e0de846 187 devc->trigger_edge[i] = 0;
4bd80e12 188 }
189
acc885c7
BV
190 if (!(trigger = sr_session_trigger_get(sdi->session)))
191 return SR_OK;
4bd80e12 192
acc885c7
BV
193 devc->num_stages = g_slist_length(trigger->stages);
194 if (devc->num_stages > NUM_TRIGGER_STAGES) {
195 sr_err("This device only supports %d trigger stages.",
196 NUM_TRIGGER_STAGES);
197 return SR_ERR;
198 }
4bd80e12 199
acc885c7
BV
200 for (l = trigger->stages; l; l = l->next) {
201 stage = l->data;
202 for (m = stage->matches; m; m = m->next) {
203 match = m->data;
204 if (!match->channel->enabled)
205 /* Ignore disabled channels with a trigger. */
206 continue;
207 devc->trigger_mask[stage->stage] |= 1 << match->channel->index;
208 if (match->match == SR_TRIGGER_ONE || match->match == SR_TRIGGER_RISING)
209 devc->trigger_value[stage->stage] |= 1 << match->channel->index;
210 if (match->match == SR_TRIGGER_RISING || match->match == SR_TRIGGER_FALLING)
211 devc->trigger_edge[stage->stage] |= 1 << match->channel->index;
4bd80e12 212 }
4bd80e12 213 }
214
215 return SR_OK;
216}
217
218SR_PRIV struct sr_dev_inst *p_ols_get_metadata(uint8_t *buf, int bytes_read, struct dev_context *devc)
219{
220 struct sr_dev_inst *sdi;
4bd80e12 221 uint32_t tmp_int, ui;
222 uint8_t key, type, token;
223 GString *tmp_str, *devname, *version;
224 guchar tmp_c;
225 int index, i;
226
aac29cc1 227 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be 228 sdi->status = SR_ST_INACTIVE;
4f840ce9 229 sdi->driver = &p_ols_driver_info;
4bd80e12 230 sdi->priv = devc;
231
232 devname = g_string_new("");
233 version = g_string_new("");
234
235 index = 0;
236 while (index < bytes_read) {
237 key = buf[index++];
238 if (key == 0x00) {
239 sr_dbg("Got metadata key 0x00, metadata ends.");
240 break;
241 }
242 type = key >> 5;
243 token = key & 0x1f;
244 switch (type) {
245 case 0:
246 /* NULL-terminated string */
247 tmp_str = g_string_new("");
248 while ((index < bytes_read) && ((tmp_c = buf[index++]) != '\0'))
249 g_string_append_c(tmp_str, tmp_c);
250 sr_dbg("Got metadata key 0x%.2x value '%s'.",
251 key, tmp_str->str);
252 switch (token) {
253 case 0x01:
254 /* Device name */
255 devname = g_string_append(devname, tmp_str->str);
256 break;
257 case 0x02:
258 /* FPGA firmware version */
259 if (version->len)
260 g_string_append(version, ", ");
261 g_string_append(version, "FPGA version ");
262 g_string_append(version, tmp_str->str);
263 break;
264 case 0x03:
265 /* Ancillary version */
266 if (version->len)
267 g_string_append(version, ", ");
268 g_string_append(version, "Ancillary version ");
269 g_string_append(version, tmp_str->str);
270 break;
271 default:
272 sr_info("Unknown token 0x%.2x: '%s'",
273 token, tmp_str->str);
274 break;
275 }
276 g_string_free(tmp_str, TRUE);
277 break;
278 case 1:
279 /* 32-bit unsigned integer */
280 tmp_int = 0;
281 for (i = 0; i < 4; i++) {
282 tmp_int = (tmp_int << 8) | buf[index++];
283 }
284 sr_dbg("Got metadata key 0x%.2x value 0x%.8x.",
285 key, tmp_int);
286 switch (token) {
287 case 0x00:
288 /* Number of usable channels */
5e23fcab
ML
289 for (ui = 0; ui < tmp_int; ui++)
290 sr_channel_new(sdi, ui, SR_CHANNEL_LOGIC, TRUE,
c368e6f3 291 p_ols_channel_names[ui]);
4bd80e12 292 break;
293 case 0x01:
294 /* Amount of sample memory available (bytes) */
b94cff40 295 devc->max_samplebytes = tmp_int;
4bd80e12 296 break;
297 case 0x02:
298 /* Amount of dynamic memory available (bytes) */
299 /* what is this for? */
300 break;
301 case 0x03:
302 /* Maximum sample rate (hz) */
303 devc->max_samplerate = tmp_int;
304 break;
305 case 0x04:
306 /* protocol version */
307 devc->protocol_version = tmp_int;
308 break;
309 default:
310 sr_info("Unknown token 0x%.2x: 0x%.8x.",
311 token, tmp_int);
312 break;
313 }
314 break;
315 case 2:
316 /* 8-bit unsigned integer */
317 tmp_c = buf[index++];
318 sr_dbg("Got metadata key 0x%.2x value 0x%.2x.",
319 key, tmp_c);
320 switch (token) {
321 case 0x00:
322 /* Number of usable channels */
5e23fcab
ML
323 for (ui = 0; ui < tmp_c; ui++)
324 sr_channel_new(sdi, ui, SR_CHANNEL_LOGIC, TRUE,
c368e6f3 325 p_ols_channel_names[ui]);
4bd80e12 326 break;
327 case 0x01:
328 /* protocol version */
329 devc->protocol_version = tmp_c;
330 break;
331 default:
332 sr_info("Unknown token 0x%.2x: 0x%.2x.",
333 token, tmp_c);
334 break;
335 }
336 break;
337 default:
338 /* unknown type */
339 break;
340 }
341 }
342
343 sdi->model = devname->str;
344 sdi->version = version->str;
345 g_string_free(devname, FALSE);
346 g_string_free(version, FALSE);
347
348 return sdi;
349}
350
351SR_PRIV int p_ols_set_samplerate(const struct sr_dev_inst *sdi,
352 const uint64_t samplerate)
353{
354 struct dev_context *devc;
355
356 devc = sdi->priv;
357 if (devc->max_samplerate && samplerate > devc->max_samplerate)
358 return SR_ERR_SAMPLERATE;
359
360 if (samplerate > CLOCK_RATE) {
361 sr_info("Enabling demux mode.");
362 devc->flag_reg |= FLAG_DEMUX;
363 devc->flag_reg &= ~FLAG_FILTER;
364 devc->max_channels = NUM_CHANNELS / 2;
365 devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
366 } else {
367 sr_info("Disabling demux mode.");
368 devc->flag_reg &= ~FLAG_DEMUX;
369 devc->flag_reg |= FLAG_FILTER;
370 devc->max_channels = NUM_CHANNELS;
371 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
372 }
373
374 /* Calculate actual samplerate used and complain if it is different
375 * from the requested.
376 */
377 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
378 if (devc->flag_reg & FLAG_DEMUX)
379 devc->cur_samplerate *= 2;
380 if (devc->cur_samplerate != samplerate)
381 sr_info("Can't match samplerate %" PRIu64 ", using %"
382 PRIu64 ".", samplerate, devc->cur_samplerate);
383
384 return SR_OK;
385}
386
4bd80e12 387SR_PRIV int p_ols_receive_data(int fd, int revents, void *cb_data)
388{
389 struct dev_context *devc;
390 struct sr_dev_inst *sdi;
391 struct sr_datafeed_packet packet;
392 struct sr_datafeed_logic logic;
393 uint32_t sample;
394 int num_channels, offset, j;
395 int bytes_read, index;
396 unsigned int i;
397 unsigned char byte;
398
399 (void)fd;
400 (void)revents;
401
402 sdi = cb_data;
403 devc = sdi->priv;
404
405 if (devc->num_transfers++ == 0) {
406 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
407 if (!devc->raw_sample_buf) {
408 sr_err("Sample buffer malloc failed.");
409 return FALSE;
410 }
411 /* fill with 1010... for debugging */
412 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
413 }
414
b94cff40 415 if ((devc->num_samples < devc->limit_samples) && (devc->cnt_samples < devc->max_samples)) {
4bd80e12 416
417 num_channels = 0;
418 for (i = NUM_CHANNELS; i > 0x02; i /= 2) {
419 if ((devc->flag_reg & i) == 0) {
420 num_channels++;
421 }
422 }
423
424 /* Get a block of data. */
425 bytes_read = ftdi_read_data(devc->ftdic, devc->ftdi_buf, FTDI_BUF_SIZE);
426 if (bytes_read < 0) {
427 sr_err("Failed to read FTDI data (%d): %s.",
428 bytes_read, ftdi_get_error_string(devc->ftdic));
429 sdi->driver->dev_acquisition_stop(sdi, sdi);
430 return FALSE;
431 }
432 if (bytes_read == 0) {
433 sr_spew("Received 0 bytes, nothing to do.");
434 return TRUE;
435 }
436
437 sr_dbg("Received %d bytes", bytes_read);
438
439 index = 0;
440 while (index < bytes_read) {
441 byte = devc->ftdi_buf[index++];
442 devc->cnt_bytes++;
443
444 devc->sample[devc->num_bytes++] = byte;
445 sr_spew("Received byte 0x%.2x.", byte);
b94cff40 446
447 if ((devc->flag_reg & FLAG_DEMUX) && (devc->flag_reg & FLAG_RLE)) {
448 /* RLE in demux mode must be processed differently
449 * since in this case the RLE encoder is operating on pairs of samples.
450 */
451 if (devc->num_bytes == num_channels * 2) {
452 devc->cnt_samples += 2;
453 devc->cnt_samples_rle += 2;
4bd80e12 454 /*
b94cff40 455 * Got a sample pair. Convert from the OLS's little-endian
456 * sample to the local format.
457 */
458 sample = devc->sample[0] | (devc->sample[1] << 8) \
459 | (devc->sample[2] << 16) | (devc->sample[3] << 24);
460 sr_spew("Received sample pair 0x%.*x.", devc->num_bytes * 2, sample);
461
462 /*
463 * In RLE mode the high bit of the sample pair is the
464 * "count" flag, meaning this sample pair is the number
465 * of times the previous sample pair occurred.
4bd80e12 466 */
467 if (devc->sample[devc->num_bytes - 1] & 0x80) {
468 /* Clear the high bit. */
469 sample &= ~(0x80 << (devc->num_bytes - 1) * 8);
470 devc->rle_count = sample;
b94cff40 471 devc->cnt_samples_rle += devc->rle_count * 2;
472 sr_dbg("RLE count: %u.", devc->rle_count * 2);
4bd80e12 473 devc->num_bytes = 0;
474 continue;
475 }
b94cff40 476 devc->num_samples += (devc->rle_count + 1) * 2;
477 if (devc->num_samples > devc->limit_samples) {
478 /* Save us from overrunning the buffer. */
479 devc->rle_count -= (devc->num_samples - devc->limit_samples) / 2;
480 devc->num_samples = devc->limit_samples;
481 index = bytes_read;
482 }
4bd80e12 483
4bd80e12 484 /*
485 * Some channel groups may have been turned
486 * off, to speed up transfer between the
487 * hardware and the PC. Expand that here before
488 * submitting it over the session bus --
489 * whatever is listening on the bus will be
490 * expecting a full 32-bit sample, based on
491 * the number of channels.
492 */
493 j = 0;
b94cff40 494 /* expand first sample */
4bd80e12 495 memset(devc->tmp_sample, 0, 4);
b94cff40 496 for (i = 0; i < 2; i++) {
4bd80e12 497 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
498 /*
499 * This channel group was
500 * enabled, copy from received
501 * sample.
502 */
503 devc->tmp_sample[i] = devc->sample[j++];
b94cff40 504 }
4bd80e12 505 }
b94cff40 506 /* Clear out the most significant bit of the sample */
507 devc->tmp_sample[devc->num_bytes - 1] &= 0x7f;
508 sr_spew("Expanded sample 1: 0x%.8x.", devc->tmp_sample);
509
510 /* expand second sample */
511 memset(devc->tmp_sample2, 0, 4);
512 for (i = 0; i < 2; i++) {
513 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
514 /*
515 * This channel group was
516 * enabled, copy from received
517 * sample.
518 */
519 devc->tmp_sample2[i] = devc->sample[j++];
520 }
521 }
522 /* Clear out the most significant bit of the sample */
523 devc->tmp_sample2[devc->num_bytes - 1] &= 0x7f;
524 sr_spew("Expanded sample 2: 0x%.8x.", devc->tmp_sample2);
525
526 /*
527 * OLS sends its sample buffer backwards.
528 * store it in reverse order here, so we can dump
529 * this on the session bus later.
530 */
531 offset = (devc->limit_samples - devc->num_samples) * 4;
532 for (i = 0; i <= devc->rle_count; i++) {
533 memcpy(devc->raw_sample_buf + offset + (i * 8),
534 devc->tmp_sample2, 4);
535 memcpy(devc->raw_sample_buf + offset + (4 + (i * 8)),
536 devc->tmp_sample, 4);
537 }
538 memset(devc->sample, 0, 4);
539 devc->num_bytes = 0;
540 devc->rle_count = 0;
4bd80e12 541 }
b94cff40 542 }
543 else {
544 if (devc->num_bytes == num_channels) {
545 devc->cnt_samples++;
546 devc->cnt_samples_rle++;
547 /*
548 * Got a full sample. Convert from the OLS's little-endian
549 * sample to the local format.
550 */
551 sample = devc->sample[0] | (devc->sample[1] << 8) \
552 | (devc->sample[2] << 16) | (devc->sample[3] << 24);
553 sr_spew("Received sample 0x%.*x.", devc->num_bytes * 2, sample);
554 if (devc->flag_reg & FLAG_RLE) {
555 /*
556 * In RLE mode the high bit of the sample is the
557 * "count" flag, meaning this sample is the number
558 * of times the previous sample occurred.
559 */
560 if (devc->sample[devc->num_bytes - 1] & 0x80) {
561 /* Clear the high bit. */
562 sample &= ~(0x80 << (devc->num_bytes - 1) * 8);
563 devc->rle_count = sample;
564 devc->cnt_samples_rle += devc->rle_count;
565 sr_dbg("RLE count: %u.", devc->rle_count);
566 devc->num_bytes = 0;
567 continue;
568 }
569 }
570 devc->num_samples += devc->rle_count + 1;
571 if (devc->num_samples > devc->limit_samples) {
572 /* Save us from overrunning the buffer. */
573 devc->rle_count -= devc->num_samples - devc->limit_samples;
574 devc->num_samples = devc->limit_samples;
575 index = bytes_read;
576 }
577
578 if (num_channels < 4) {
579 /*
580 * Some channel groups may have been turned
581 * off, to speed up transfer between the
582 * hardware and the PC. Expand that here before
583 * submitting it over the session bus --
584 * whatever is listening on the bus will be
585 * expecting a full 32-bit sample, based on
586 * the number of channels.
587 */
588 j = 0;
589 memset(devc->tmp_sample, 0, 4);
590 for (i = 0; i < 4; i++) {
591 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
592 /*
593 * This channel group was
594 * enabled, copy from received
595 * sample.
596 */
597 devc->tmp_sample[i] = devc->sample[j++];
598 }
599 }
600 memcpy(devc->sample, devc->tmp_sample, 4);
601 sr_spew("Expanded sample: 0x%.8x.", sample);
602 }
4bd80e12 603
b94cff40 604 /*
605 * Pipistrello OLS sends its sample buffer backwards.
606 * store it in reverse order here, so we can dump
607 * this on the session bus later.
608 */
609 offset = (devc->limit_samples - devc->num_samples) * 4;
610 for (i = 0; i <= devc->rle_count; i++) {
611 memcpy(devc->raw_sample_buf + offset + (i * 4),
612 devc->sample, 4);
613 }
614 memset(devc->sample, 0, 4);
615 devc->num_bytes = 0;
616 devc->rle_count = 0;
4bd80e12 617 }
4bd80e12 618 }
619 }
620 return TRUE;
621 } else {
b94cff40 622 do bytes_read = ftdi_read_data(devc->ftdic, devc->ftdi_buf, FTDI_BUF_SIZE);
623 while (bytes_read > 0);
624
4bd80e12 625 /*
626 * We've acquired all the samples we asked for -- we're done.
627 * Send the (properly-ordered) buffer to the frontend.
628 */
629 sr_dbg("Received %d bytes, %d samples, %d decompressed samples.",
630 devc->cnt_bytes, devc->cnt_samples,
631 devc->cnt_samples_rle);
632 if (devc->trigger_at != -1) {
633 /*
634 * A trigger was set up, so we need to tell the frontend
635 * about it.
636 */
637 if (devc->trigger_at > 0) {
638 /* There are pre-trigger samples, send those first. */
639 packet.type = SR_DF_LOGIC;
640 packet.payload = &logic;
641 logic.length = devc->trigger_at * 4;
642 logic.unitsize = 4;
643 logic.data = devc->raw_sample_buf +
644 (devc->limit_samples - devc->num_samples) * 4;
645 sr_session_send(cb_data, &packet);
646 }
647
648 /* Send the trigger. */
649 packet.type = SR_DF_TRIGGER;
650 sr_session_send(cb_data, &packet);
651
652 /* Send post-trigger samples. */
653 packet.type = SR_DF_LOGIC;
654 packet.payload = &logic;
655 logic.length = (devc->num_samples * 4) - (devc->trigger_at * 4);
656 logic.unitsize = 4;
657 logic.data = devc->raw_sample_buf + devc->trigger_at * 4 +
658 (devc->limit_samples - devc->num_samples) * 4;
659 sr_session_send(cb_data, &packet);
660 } else {
661 /* no trigger was used */
662 packet.type = SR_DF_LOGIC;
663 packet.payload = &logic;
664 logic.length = devc->num_samples * 4;
665 logic.unitsize = 4;
666 logic.data = devc->raw_sample_buf +
667 (devc->limit_samples - devc->num_samples) * 4;
668 sr_session_send(cb_data, &packet);
669 }
670 g_free(devc->raw_sample_buf);
671
672 sdi->driver->dev_acquisition_stop(sdi, cb_data);
673 }
674
675 return TRUE;
676}