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4bd80e12 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "protocol.h" | |
21 | ||
f254bc4b | 22 | static const uint32_t devopts[] = { |
4bd80e12 | 23 | SR_CONF_LOGIC_ANALYZER, |
5827f61b BV |
24 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
25 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
26 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
27 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
28 | SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
29 | SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET, | |
30 | SR_CONF_SWAP | SR_CONF_SET, | |
31 | SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET, | |
4bd80e12 | 32 | }; |
33 | ||
acc885c7 BV |
34 | static const int32_t trigger_matches[] = { |
35 | SR_TRIGGER_ZERO, | |
36 | SR_TRIGGER_ONE, | |
37 | SR_TRIGGER_RISING, | |
38 | SR_TRIGGER_FALLING, | |
39 | }; | |
40 | ||
4bd80e12 | 41 | #define STR_PATTERN_NONE "None" |
42 | #define STR_PATTERN_EXTERNAL "External" | |
43 | #define STR_PATTERN_INTERNAL "Internal" | |
44 | ||
45 | /* Supported methods of test pattern outputs */ | |
46 | enum { | |
47 | /** | |
48 | * Capture pins 31:16 (unbuffered wing) output a test pattern | |
49 | * that can captured on pins 0:15. | |
50 | */ | |
51 | PATTERN_EXTERNAL, | |
52 | ||
53 | /** Route test pattern internally to capture buffer. */ | |
54 | PATTERN_INTERNAL, | |
55 | }; | |
56 | ||
57 | static const char *patterns[] = { | |
58 | STR_PATTERN_NONE, | |
59 | STR_PATTERN_EXTERNAL, | |
60 | STR_PATTERN_INTERNAL, | |
61 | }; | |
62 | ||
63 | /* Channels are numbered 0-31 (on the PCB silkscreen). */ | |
53cda65a | 64 | SR_PRIV const char *p_ols_channel_names[] = { |
4bd80e12 | 65 | "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", |
66 | "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", | |
67 | "24", "25", "26", "27", "28", "29", "30", "31", | |
68 | NULL, | |
69 | }; | |
70 | ||
71 | /* Default supported samplerates, can be overridden by device metadata. */ | |
72 | static const uint64_t samplerates[] = { | |
73 | SR_HZ(10), | |
74 | SR_MHZ(200), | |
75 | SR_HZ(1), | |
76 | }; | |
77 | ||
78 | SR_PRIV struct sr_dev_driver p_ols_driver_info; | |
4bd80e12 | 79 | |
4f840ce9 | 80 | static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx) |
4bd80e12 | 81 | { |
82 | return std_init(sr_ctx, di, LOG_PREFIX); | |
83 | } | |
84 | ||
4f840ce9 | 85 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
4bd80e12 | 86 | { |
87 | struct sr_dev_inst *sdi; | |
88 | struct drv_context *drvc; | |
89 | struct dev_context *devc; | |
90 | GSList *devices; | |
91 | int ret, i; | |
92 | char buf[70]; | |
93 | int bytes_read; | |
94 | ||
95 | (void)options; | |
96 | ||
97 | drvc = di->priv; | |
98 | ||
99 | devices = NULL; | |
100 | ||
101 | /* Allocate memory for our private device context. */ | |
f57d8ffe | 102 | devc = g_malloc0(sizeof(struct dev_context)); |
4bd80e12 | 103 | |
104 | /* Device-specific settings */ | |
b94cff40 | 105 | devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0; |
4bd80e12 | 106 | |
107 | /* Acquisition settings */ | |
108 | devc->limit_samples = devc->capture_ratio = 0; | |
109 | devc->trigger_at = -1; | |
110 | devc->channel_mask = 0xffffffff; | |
111 | devc->flag_reg = 0; | |
112 | ||
113 | /* Allocate memory for the incoming ftdi data. */ | |
114 | if (!(devc->ftdi_buf = g_try_malloc0(FTDI_BUF_SIZE))) { | |
115 | sr_err("ftdi_buf malloc failed."); | |
116 | goto err_free_devc; | |
117 | } | |
118 | ||
119 | /* Allocate memory for the FTDI context (ftdic) and initialize it. */ | |
120 | if (!(devc->ftdic = ftdi_new())) { | |
121 | sr_err("Failed to initialize libftdi."); | |
122 | goto err_free_ftdi_buf;; | |
123 | } | |
124 | ||
125 | /* Try to open the FTDI device */ | |
126 | if (p_ols_open(devc) != SR_OK) { | |
127 | goto err_free_ftdic; | |
128 | } | |
129 | ||
130 | /* The discovery procedure is like this: first send the Reset | |
131 | * command (0x00) 5 times, since the device could be anywhere | |
132 | * in a 5-byte command. Then send the ID command (0x02). | |
133 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
134 | * have a match. | |
135 | */ | |
136 | ||
137 | ret = SR_OK; | |
138 | for (i = 0; i < 5; i++) { | |
139 | if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) { | |
140 | break; | |
141 | } | |
142 | } | |
143 | if (ret != SR_OK) { | |
144 | sr_err("Could not reset device. Quitting."); | |
145 | goto err_close_ftdic; | |
146 | } | |
147 | write_shortcommand(devc, CMD_ID); | |
148 | ||
149 | /* Read the response data. */ | |
150 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4); | |
151 | if (bytes_read < 0) { | |
152 | sr_err("Failed to read FTDI data (%d): %s.", | |
153 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
154 | goto err_close_ftdic; | |
155 | } | |
156 | if (bytes_read == 0) { | |
157 | goto err_close_ftdic; | |
158 | } | |
159 | ||
160 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) | |
161 | goto err_close_ftdic; | |
162 | ||
163 | /* Definitely using the OLS protocol, check if it supports | |
164 | * the metadata command. | |
165 | */ | |
166 | write_shortcommand(devc, CMD_METADATA); | |
167 | ||
168 | /* Read the metadata. */ | |
169 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64); | |
170 | if (bytes_read < 0) { | |
171 | sr_err("Failed to read FTDI data (%d): %s.", | |
172 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
173 | goto err_close_ftdic; | |
174 | } | |
175 | if (bytes_read == 0) { | |
176 | goto err_close_ftdic; | |
177 | } | |
178 | ||
179 | /* Close device. We'll reopen it again when we need it. */ | |
180 | p_ols_close(devc); | |
181 | ||
182 | /* Parse the metadata. */ | |
183 | sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc); | |
4bd80e12 | 184 | |
185 | /* Configure samplerate and divider. */ | |
186 | if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK) | |
187 | sr_dbg("Failed to set default samplerate (%"PRIu64").", | |
188 | DEFAULT_SAMPLERATE); | |
4bd80e12 | 189 | |
190 | drvc->instances = g_slist_append(drvc->instances, sdi); | |
191 | devices = g_slist_append(devices, sdi); | |
192 | ||
193 | return devices; | |
194 | ||
195 | err_close_ftdic: | |
196 | p_ols_close(devc); | |
197 | err_free_ftdic: | |
198 | ftdi_free(devc->ftdic); /* NOT free() or g_free()! */ | |
199 | err_free_ftdi_buf: | |
200 | g_free(devc->ftdi_buf); | |
201 | err_free_devc: | |
202 | g_free(devc); | |
4bd80e12 | 203 | |
204 | return NULL; | |
205 | } | |
206 | ||
4f840ce9 | 207 | static GSList *dev_list(const struct sr_dev_driver *di) |
4bd80e12 | 208 | { |
209 | return ((struct drv_context *)(di->priv))->instances; | |
210 | } | |
211 | ||
212 | static void clear_helper(void *priv) | |
213 | { | |
214 | struct dev_context *devc; | |
215 | ||
216 | devc = priv; | |
217 | ||
218 | ftdi_free(devc->ftdic); | |
219 | g_free(devc->ftdi_buf); | |
220 | } | |
221 | ||
4f840ce9 | 222 | static int dev_clear(const struct sr_dev_driver *di) |
4bd80e12 | 223 | { |
224 | return std_dev_clear(di, clear_helper); | |
225 | } | |
226 | ||
4f840ce9 | 227 | static int cleanup(const struct sr_dev_driver *di) |
4bd80e12 | 228 | { |
4f840ce9 | 229 | return dev_clear(di); |
4bd80e12 | 230 | } |
231 | ||
584560f1 | 232 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
4bd80e12 | 233 | const struct sr_channel_group *cg) |
234 | { | |
235 | struct dev_context *devc; | |
236 | ||
237 | (void)cg; | |
238 | ||
239 | if (!sdi) | |
240 | return SR_ERR_ARG; | |
241 | ||
242 | devc = sdi->priv; | |
584560f1 | 243 | switch (key) { |
4bd80e12 | 244 | case SR_CONF_SAMPLERATE: |
245 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
246 | break; | |
247 | case SR_CONF_CAPTURE_RATIO: | |
248 | *data = g_variant_new_uint64(devc->capture_ratio); | |
249 | break; | |
250 | case SR_CONF_LIMIT_SAMPLES: | |
251 | *data = g_variant_new_uint64(devc->limit_samples); | |
252 | break; | |
253 | case SR_CONF_PATTERN_MODE: | |
254 | if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE) | |
255 | *data = g_variant_new_string(STR_PATTERN_EXTERNAL); | |
256 | else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE) | |
257 | *data = g_variant_new_string(STR_PATTERN_INTERNAL); | |
258 | else | |
259 | *data = g_variant_new_string(STR_PATTERN_NONE); | |
260 | break; | |
261 | case SR_CONF_RLE: | |
262 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE); | |
263 | break; | |
264 | case SR_CONF_EXTERNAL_CLOCK: | |
265 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE); | |
266 | break; | |
267 | default: | |
268 | return SR_ERR_NA; | |
269 | } | |
270 | ||
271 | return SR_OK; | |
272 | } | |
273 | ||
584560f1 | 274 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, |
4bd80e12 | 275 | const struct sr_channel_group *cg) |
276 | { | |
277 | struct dev_context *devc; | |
278 | uint16_t flag; | |
279 | uint64_t tmp_u64; | |
280 | int ret; | |
281 | const char *stropt; | |
282 | ||
283 | (void)cg; | |
284 | ||
285 | if (sdi->status != SR_ST_ACTIVE) | |
286 | return SR_ERR_DEV_CLOSED; | |
287 | ||
288 | devc = sdi->priv; | |
289 | ||
584560f1 | 290 | switch (key) { |
4bd80e12 | 291 | case SR_CONF_SAMPLERATE: |
292 | tmp_u64 = g_variant_get_uint64(data); | |
293 | if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1]) | |
294 | return SR_ERR_SAMPLERATE; | |
295 | ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data)); | |
296 | break; | |
297 | case SR_CONF_LIMIT_SAMPLES: | |
298 | tmp_u64 = g_variant_get_uint64(data); | |
299 | if (tmp_u64 < MIN_NUM_SAMPLES) | |
300 | return SR_ERR; | |
301 | devc->limit_samples = tmp_u64; | |
302 | ret = SR_OK; | |
303 | break; | |
304 | case SR_CONF_CAPTURE_RATIO: | |
305 | devc->capture_ratio = g_variant_get_uint64(data); | |
306 | if (devc->capture_ratio < 0 || devc->capture_ratio > 100) { | |
307 | devc->capture_ratio = 0; | |
308 | ret = SR_ERR; | |
309 | } else | |
310 | ret = SR_OK; | |
311 | break; | |
312 | case SR_CONF_EXTERNAL_CLOCK: | |
313 | if (g_variant_get_boolean(data)) { | |
314 | sr_info("Enabling external clock."); | |
315 | devc->flag_reg |= FLAG_CLOCK_EXTERNAL; | |
316 | } else { | |
317 | sr_info("Disabled external clock."); | |
318 | devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL; | |
319 | } | |
320 | ret = SR_OK; | |
321 | break; | |
322 | case SR_CONF_PATTERN_MODE: | |
323 | stropt = g_variant_get_string(data, NULL); | |
324 | ret = SR_OK; | |
325 | flag = 0xffff; | |
326 | if (!strcmp(stropt, STR_PATTERN_NONE)) { | |
327 | sr_info("Disabling test modes."); | |
328 | flag = 0x0000; | |
329 | }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) { | |
330 | sr_info("Enabling internal test mode."); | |
331 | flag = FLAG_INTERNAL_TEST_MODE; | |
332 | } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) { | |
333 | sr_info("Enabling external test mode."); | |
334 | flag = FLAG_EXTERNAL_TEST_MODE; | |
335 | } else { | |
336 | ret = SR_ERR; | |
337 | } | |
338 | if (flag != 0xffff) { | |
339 | devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE); | |
340 | devc->flag_reg |= flag; | |
341 | } | |
342 | break; | |
343 | case SR_CONF_SWAP: | |
344 | if (g_variant_get_boolean(data)) { | |
345 | sr_info("Enabling channel swapping."); | |
346 | devc->flag_reg |= FLAG_SWAP_CHANNELS; | |
347 | } else { | |
348 | sr_info("Disabling channel swapping."); | |
349 | devc->flag_reg &= ~FLAG_SWAP_CHANNELS; | |
350 | } | |
351 | ret = SR_OK; | |
352 | break; | |
353 | ||
354 | case SR_CONF_RLE: | |
355 | if (g_variant_get_boolean(data)) { | |
356 | sr_info("Enabling RLE."); | |
357 | devc->flag_reg |= FLAG_RLE; | |
358 | } else { | |
359 | sr_info("Disabling RLE."); | |
360 | devc->flag_reg &= ~FLAG_RLE; | |
361 | } | |
362 | ret = SR_OK; | |
363 | break; | |
364 | default: | |
365 | ret = SR_ERR_NA; | |
366 | } | |
367 | ||
368 | return ret; | |
369 | } | |
370 | ||
584560f1 | 371 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
4bd80e12 | 372 | const struct sr_channel_group *cg) |
373 | { | |
374 | struct dev_context *devc; | |
375 | GVariant *gvar, *grange[2]; | |
376 | GVariantBuilder gvb; | |
acc885c7 | 377 | int num_pols_changrp, i; |
4bd80e12 | 378 | |
379 | (void)cg; | |
380 | ||
381 | switch (key) { | |
382 | case SR_CONF_DEVICE_OPTIONS: | |
584560f1 | 383 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, |
f254bc4b | 384 | devopts, ARRAY_SIZE(devopts), sizeof(uint32_t)); |
4bd80e12 | 385 | break; |
386 | case SR_CONF_SAMPLERATE: | |
387 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
388 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
389 | ARRAY_SIZE(samplerates), sizeof(uint64_t)); | |
390 | g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar); | |
391 | *data = g_variant_builder_end(&gvb); | |
392 | break; | |
acc885c7 BV |
393 | case SR_CONF_TRIGGER_MATCH: |
394 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
395 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
396 | sizeof(int32_t)); | |
4bd80e12 | 397 | break; |
398 | case SR_CONF_PATTERN_MODE: | |
399 | *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns)); | |
400 | break; | |
401 | case SR_CONF_LIMIT_SAMPLES: | |
402 | if (!sdi) | |
403 | return SR_ERR_ARG; | |
404 | devc = sdi->priv; | |
405 | if (devc->flag_reg & FLAG_RLE) | |
406 | return SR_ERR_NA; | |
b94cff40 | 407 | if (devc->max_samplebytes == 0) |
4bd80e12 | 408 | /* Device didn't specify sample memory size in metadata. */ |
409 | return SR_ERR_NA; | |
410 | /* | |
411 | * Channel groups are turned off if no channels in that group are | |
412 | * enabled, making more room for samples for the enabled group. | |
413 | */ | |
acc885c7 BV |
414 | pols_channel_mask(sdi); |
415 | num_pols_changrp = 0; | |
4bd80e12 | 416 | for (i = 0; i < 4; i++) { |
417 | if (devc->channel_mask & (0xff << (i * 8))) | |
acc885c7 | 418 | num_pols_changrp++; |
4bd80e12 | 419 | } |
b94cff40 | 420 | /* 3 channel groups takes as many bytes as 4 channel groups */ |
acc885c7 BV |
421 | if (num_pols_changrp == 3) |
422 | num_pols_changrp = 4; | |
4bd80e12 | 423 | grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES); |
acc885c7 BV |
424 | if (num_pols_changrp) |
425 | grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp); | |
426 | else | |
427 | grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
4bd80e12 | 428 | *data = g_variant_new_tuple(grange, 2); |
429 | break; | |
430 | default: | |
431 | return SR_ERR_NA; | |
432 | } | |
433 | ||
434 | return SR_OK; | |
435 | } | |
436 | ||
437 | static int dev_open(struct sr_dev_inst *sdi) | |
438 | { | |
439 | struct dev_context *devc; | |
4bd80e12 | 440 | |
441 | devc = sdi->priv; | |
442 | ||
443 | if (p_ols_open(devc) != SR_OK) { | |
444 | return SR_ERR; | |
445 | } else { | |
446 | sdi->status = SR_ST_ACTIVE; | |
447 | return SR_OK; | |
448 | } | |
449 | } | |
450 | ||
451 | static int dev_close(struct sr_dev_inst *sdi) | |
452 | { | |
453 | int ret; | |
454 | struct dev_context *devc; | |
455 | ||
456 | ret = SR_OK; | |
457 | devc = sdi->priv; | |
458 | ||
459 | if (sdi->status == SR_ST_ACTIVE) { | |
460 | sr_dbg("Status ACTIVE, closing device."); | |
461 | ret = p_ols_close(devc); | |
462 | } else { | |
463 | sr_spew("Status not ACTIVE, nothing to do."); | |
464 | } | |
465 | ||
466 | sdi->status = SR_ST_INACTIVE; | |
467 | ||
468 | return ret; | |
469 | } | |
470 | ||
4bd80e12 | 471 | static int set_trigger(const struct sr_dev_inst *sdi, int stage) |
472 | { | |
473 | struct dev_context *devc; | |
474 | uint8_t cmd, arg[4]; | |
475 | ||
476 | devc = sdi->priv; | |
477 | ||
478 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
479 | arg[0] = devc->trigger_mask[stage] & 0xff; | |
480 | arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff; | |
481 | arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff; | |
482 | arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff; | |
483 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
484 | return SR_ERR; | |
485 | ||
486 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
487 | arg[0] = devc->trigger_value[stage] & 0xff; | |
488 | arg[1] = (devc->trigger_value[stage] >> 8) & 0xff; | |
489 | arg[2] = (devc->trigger_value[stage] >> 16) & 0xff; | |
490 | arg[3] = (devc->trigger_value[stage] >> 24) & 0xff; | |
491 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
492 | return SR_ERR; | |
493 | ||
494 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
495 | arg[0] = arg[1] = arg[3] = 0x00; | |
496 | arg[2] = stage; | |
497 | if (stage == devc->num_stages) | |
498 | /* Last stage, fire when this one matches. */ | |
499 | arg[3] |= TRIGGER_START; | |
500 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
501 | return SR_ERR; | |
502 | ||
1e0de846 | 503 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; |
504 | arg[0] = devc->trigger_edge[stage] & 0xff; | |
505 | arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff; | |
506 | arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff; | |
507 | arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff; | |
508 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
509 | return SR_ERR; | |
510 | ||
4bd80e12 | 511 | return SR_OK; |
512 | } | |
513 | ||
84cbaf77 BV |
514 | static int disable_trigger(const struct sr_dev_inst *sdi, int stage) |
515 | { | |
516 | struct dev_context *devc; | |
517 | uint8_t cmd, arg[4]; | |
518 | ||
519 | devc = sdi->priv; | |
520 | ||
521 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
522 | arg[0] = arg[1] = arg[2] = arg[3] = 0x00; | |
523 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
524 | return SR_ERR; | |
525 | ||
526 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
527 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
528 | return SR_ERR; | |
529 | ||
530 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
531 | arg[2] = 0x03; | |
532 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
533 | return SR_ERR; | |
534 | ||
535 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
536 | arg[2] = 0x00; | |
537 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
538 | return SR_ERR; | |
539 | ||
540 | return SR_OK; | |
541 | } | |
542 | ||
4bd80e12 | 543 | static int dev_acquisition_start(const struct sr_dev_inst *sdi, |
544 | void *cb_data) | |
545 | { | |
546 | struct dev_context *devc; | |
547 | uint32_t samplecount, readcount, delaycount; | |
acc885c7 | 548 | uint8_t pols_changrp_mask, arg[4]; |
b94cff40 | 549 | uint16_t flag_tmp; |
acc885c7 | 550 | int num_pols_changrp, samplespercount; |
4bd80e12 | 551 | int ret, i; |
552 | ||
553 | if (sdi->status != SR_ST_ACTIVE) | |
554 | return SR_ERR_DEV_CLOSED; | |
555 | ||
556 | devc = sdi->priv; | |
557 | ||
acc885c7 | 558 | pols_channel_mask(sdi); |
4bd80e12 | 559 | |
560 | /* | |
561 | * Enable/disable channel groups in the flag register according to the | |
acc885c7 BV |
562 | * channel mask. Calculate this here, because num_pols_changrp is |
563 | * needed to limit readcount. | |
4bd80e12 | 564 | */ |
acc885c7 BV |
565 | pols_changrp_mask = 0; |
566 | num_pols_changrp = 0; | |
4bd80e12 | 567 | for (i = 0; i < 4; i++) { |
568 | if (devc->channel_mask & (0xff << (i * 8))) { | |
acc885c7 BV |
569 | pols_changrp_mask |= (1 << i); |
570 | num_pols_changrp++; | |
4bd80e12 | 571 | } |
572 | } | |
b94cff40 | 573 | /* 3 channel groups takes as many bytes as 4 channel groups */ |
acc885c7 BV |
574 | if (num_pols_changrp == 3) |
575 | num_pols_changrp = 4; | |
b94cff40 | 576 | /* maximum number of samples (or RLE counts) the buffer memory can hold */ |
acc885c7 | 577 | devc->max_samples = devc->max_samplebytes / num_pols_changrp; |
4bd80e12 | 578 | |
579 | /* | |
580 | * Limit readcount to prevent reading past the end of the hardware | |
581 | * buffer. | |
582 | */ | |
583 | sr_dbg("max_samples = %d", devc->max_samples); | |
584 | sr_dbg("limit_samples = %d", devc->limit_samples); | |
b94cff40 | 585 | samplecount = MIN(devc->max_samples, devc->limit_samples); |
4bd80e12 | 586 | sr_dbg("Samplecount = %d", samplecount); |
587 | ||
b94cff40 | 588 | /* In demux mode the OLS is processing two samples per clock */ |
589 | if (devc->flag_reg & FLAG_DEMUX) { | |
590 | samplespercount = 8; | |
591 | } | |
592 | else { | |
593 | samplespercount = 4; | |
594 | } | |
595 | ||
596 | readcount = samplecount / samplespercount; | |
597 | ||
4bd80e12 | 598 | /* Rather read too many samples than too few. */ |
b94cff40 | 599 | if (samplecount % samplespercount != 0) |
4bd80e12 | 600 | readcount++; |
601 | ||
602 | /* Basic triggers. */ | |
acc885c7 BV |
603 | if (pols_convert_trigger(sdi) != SR_OK) { |
604 | sr_err("Failed to configure channels."); | |
605 | return SR_ERR; | |
606 | } | |
84cbaf77 | 607 | |
acc885c7 | 608 | if (devc->num_stages > 0) { |
4bd80e12 | 609 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); |
b94cff40 | 610 | devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages; |
84cbaf77 BV |
611 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { |
612 | if (i <= devc->num_stages) { | |
613 | sr_dbg("Setting p-ols stage %d trigger.", i); | |
614 | if ((ret = set_trigger(sdi, i)) != SR_OK) | |
615 | return ret; | |
616 | } | |
617 | else { | |
618 | sr_dbg("Disabling p-ols stage %d trigger.", i); | |
619 | if ((ret = disable_trigger(sdi, i)) != SR_OK) | |
620 | return ret; | |
621 | } | |
4bd80e12 | 622 | } |
623 | } else { | |
624 | /* No triggers configured, force trigger on first stage. */ | |
625 | sr_dbg("Forcing trigger at stage 0."); | |
626 | if ((ret = set_trigger(sdi, 0)) != SR_OK) | |
627 | return ret; | |
628 | delaycount = readcount; | |
629 | } | |
630 | ||
631 | /* Samplerate. */ | |
632 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", | |
633 | devc->cur_samplerate, devc->cur_samplerate_divider); | |
634 | arg[0] = devc->cur_samplerate_divider & 0xff; | |
635 | arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8; | |
636 | arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16; | |
637 | arg[3] = 0x00; | |
638 | if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK) | |
639 | return SR_ERR; | |
acc885c7 | 640 | |
4bd80e12 | 641 | /* Send extended sample limit and pre/post-trigger capture ratio. */ |
642 | arg[0] = ((readcount - 1) & 0xff); | |
643 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
644 | arg[2] = ((readcount - 1) & 0xff0000) >> 16; | |
645 | arg[3] = ((readcount - 1) & 0xff000000) >> 24; | |
1e0de846 | 646 | if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK) |
4bd80e12 | 647 | return SR_ERR; |
648 | arg[0] = ((delaycount - 1) & 0xff); | |
649 | arg[1] = ((delaycount - 1) & 0xff00) >> 8; | |
650 | arg[2] = ((delaycount - 1) & 0xff0000) >> 16; | |
651 | arg[3] = ((delaycount - 1) & 0xff000000) >> 24; | |
1e0de846 | 652 | if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK) |
4bd80e12 | 653 | return SR_ERR; |
acc885c7 | 654 | |
4bd80e12 | 655 | /* Flag register. */ |
656 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s", | |
657 | devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off", | |
658 | devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
659 | devc->flag_reg & FLAG_RLE ? "on" : "off", | |
660 | devc->flag_reg & FLAG_FILTER ? "on": "off", | |
661 | devc->flag_reg & FLAG_DEMUX ? "on" : "off"); | |
662 | ||
b94cff40 | 663 | /* |
664 | * Enable/disable OLS channel groups in the flag register according | |
665 | * to the channel mask. 1 means "disable channel". | |
666 | */ | |
667 | devc->flag_reg &= ~0x3c; | |
acc885c7 | 668 | devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c; |
b94cff40 | 669 | sr_dbg("flag_reg = %x", devc->flag_reg); |
670 | ||
671 | /* | |
672 | * In demux mode the OLS is processing two 8-bit or 16-bit samples | |
673 | * in parallel and for this to work the lower two bits of the four | |
674 | * "channel_disable" bits must be replicated to the upper two bits. | |
675 | */ | |
676 | flag_tmp = devc->flag_reg; | |
677 | if (devc->flag_reg & FLAG_DEMUX) { | |
678 | flag_tmp &= ~0x30; | |
acc885c7 | 679 | flag_tmp |= ~(pols_changrp_mask << 4) & 0x30; |
b94cff40 | 680 | } |
681 | arg[0] = flag_tmp & 0xff; | |
682 | arg[1] = flag_tmp >> 8; | |
4bd80e12 | 683 | arg[2] = arg[3] = 0x00; |
684 | if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK) | |
685 | return SR_ERR; | |
686 | ||
687 | /* Start acquisition on the device. */ | |
688 | if (write_shortcommand(devc, CMD_RUN) != SR_OK) | |
689 | return SR_ERR; | |
690 | ||
691 | /* Reset all operational states. */ | |
692 | devc->rle_count = devc->num_transfers = 0; | |
693 | devc->num_samples = devc->num_bytes = 0; | |
694 | devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0; | |
695 | memset(devc->sample, 0, 4); | |
696 | ||
697 | /* Send header packet to the session bus. */ | |
698 | std_session_send_df_header(cb_data, LOG_PREFIX); | |
699 | ||
700 | /* Hook up a dummy handler to receive data from the device. */ | |
acc885c7 BV |
701 | sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data, |
702 | cb_data); | |
4bd80e12 | 703 | |
704 | return SR_OK; | |
705 | } | |
706 | ||
4bd80e12 | 707 | static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) |
708 | { | |
709 | struct dev_context *devc; | |
710 | struct sr_datafeed_packet packet; | |
711 | ||
712 | devc = sdi->priv; | |
713 | ||
714 | sr_dbg("Stopping acquisition."); | |
715 | write_shortcommand(devc, CMD_RESET); | |
716 | write_shortcommand(devc, CMD_RESET); | |
717 | write_shortcommand(devc, CMD_RESET); | |
718 | write_shortcommand(devc, CMD_RESET); | |
719 | write_shortcommand(devc, CMD_RESET); | |
720 | ||
acc885c7 | 721 | sr_session_source_remove(sdi->session, 0); |
4bd80e12 | 722 | |
723 | /* Send end packet to the session bus. */ | |
724 | sr_dbg("Sending SR_DF_END."); | |
725 | packet.type = SR_DF_END; | |
726 | sr_session_send(cb_data, &packet); | |
727 | ||
728 | return SR_OK; | |
729 | } | |
730 | ||
731 | SR_PRIV struct sr_dev_driver p_ols_driver_info = { | |
acc885c7 | 732 | .name = "p-ols", |
4bd80e12 | 733 | .longname = "Pipistrello OLS", |
734 | .api_version = 1, | |
735 | .init = init, | |
736 | .cleanup = cleanup, | |
737 | .scan = scan, | |
738 | .dev_list = dev_list, | |
739 | .dev_clear = dev_clear, | |
740 | .config_get = config_get, | |
741 | .config_set = config_set, | |
742 | .config_list = config_list, | |
743 | .dev_open = dev_open, | |
744 | .dev_close = dev_close, | |
745 | .dev_acquisition_start = dev_acquisition_start, | |
746 | .dev_acquisition_stop = dev_acquisition_stop, | |
747 | .priv = NULL, | |
748 | }; |