[libsigrok.git] / src / hardware / itech-it8500 / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2020 Timo Kokkonen <tjko@iki.fi>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H
#define LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H

#include <stdint.h>
#include <glib.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "itech-it8500"

/*
 * Unit uses 26 byte binary packets for communications.
 * Packets have fixed format:
 *
 * Offset|Length|Description
 * ------|------|-------------------------------------
 *     0 |    1 | Preable (always set to 0xAA).
 *     1 |    1 | Unit Address (0-254, 255=broadcast).
 *     2 |    1 | Command number.
 *     3 |   22 | Variable data.
 *    25 |    1 | Parity code (checksum).
 */
#define IT8500_HEADER_LEN 3
#define IT8500_DATA_LEN 22
#define IT8500_PACKET_LEN (IT8500_HEADER_LEN + IT8500_DATA_LEN + 1)

#define IT8500_PREAMBLE 0xaa
#define IT8500_MAX_MODEL_NAME_LEN 5

/* Status packet status byte values. */
#define IT8500_COMMAND_SUCCESSFUL 0x80
#define IT8500_INVALID_CHECKSUM   0x90
#define IT8500_INVALID_PARAMETER  0xa0
#define IT8500_UNKNOWN_COMMAND    0xb0
#define IT8500_INVALID_COMMAND    0xc0

/*
 * Operating modes.
 * Note! These map directly to mode numbers used in CMD_SET_MODE
 * and CMD_GET_MODE commands, so values are manually defined below.
 */
enum itech_it8500_modes {
	CC = 0,
	CV = 1,
	CW = 2,
	CR = 3,
	IT8500_MODES, /* Total count, for internal use. */
};

enum itech_it8500_command {
	CMD_GET_LOAD_LIMITS = 0x01,
	CMD_SET_HW_OPP_VALUE = 0x02,
	CMD_GET_HW_OPP_VALUE = 0x03,
	CMD_SET_VON_MODE = 0x0e,
	CMD_GET_VON_MODE = 0x0f,
	CMD_SET_VON_VALUE = 0x10,
	CMD_GET_VON_VALUE = 0x11,
	CMD_RESPONSE = 0x12, /* Response to commands not returning any data. */
	CMD_SET_REMOTE_MODE = 0x20,
	CMD_LOAD_ON_OFF = 0x21,
	CMD_SET_MAX_VOLTAGE = 0x22,
	CMD_GET_MAX_VOLTAGE = 0x23,
	CMD_SET_MAX_CURRENT = 0x24,
	CMD_GET_MAX_CURRENT = 0x25,
	CMD_SET_MAX_POWER = 0x26,
	CMD_GET_MAX_POWER = 0x27,
	CMD_SET_MODE = 0x28,
	CMD_GET_MODE = 0x29,
	CMD_SET_CC_CURRENT = 0x2a,
	CMD_GET_CC_CURRENT = 0x2b,
	CMD_SET_CV_VOLTAGE = 0x2c,
	CMD_GET_CV_VOLTAGE = 0x2d,
	CMD_SET_CW_POWER = 0x2e,
	CMD_GET_CW_POWER = 0x2f,
	CMD_SET_CR_RESISTANCE = 0x30,
	CMD_GET_CR_RESISTANCE = 0x31,
	CMD_SET_BATTERY_MIN_VOLTAGE = 0x4e,
	CMD_GET_BATTERY_MIN_VOLTAGE = 0x4f,
	CMD_SET_LOAD_ON_TIMER = 0x50,
	CMD_GET_LOAD_ON_TIMER = 0x51,
	CMD_LOAD_ON_TIMER = 0x52,
	CMD_LOAD_ON_TIME_STATUS = 0x53,
	CMD_SET_ADDRESS = 0x54,
	CMD_LOCAL_CONTROL = 0x55,
	CMD_REMOTE_SENSING = 0x56,
	CMD_REMOTE_SENSING_STATUS = 0x57,
	CMD_SET_TRIGGER_SOURCE = 0x58,
	CMD_GET_TRIGGER_SOURCE = 0x59,
	CMD_TRIGGER = 0x5a,
	CMD_SAVE_SETTINGS = 0x5b,
	CMD_LOAD_SETTINGS = 0x5c,
	CMD_SET_FUNCTION = 0x5d,
	CMD_GET_FUNCTION = 0x5e,
	CMD_GET_STATE = 0x5f,
	CMD_GET_MODEL_INFO = 0x6a,
	CMD_GET_BARCODE_INFO = 0x6b,
	CMD_SET_OCP_VALUE = 0x80,
	CMD_GET_OCP_VALUE = 0x81,
	CMD_SET_OCP_DELAY = 0x82,
	CMD_GET_OCP_DELAY = 0x83,
	CMD_ENABLE_OCP = 0x84,
	CMD_DISABLE_OCP = 0x85,
	CMD_SET_OPP_VALUE = 0x86,
	CMD_GET_OPP_VALUE = 0x87,
	CMD_SET_OPP_DELAY = 0x88,
	CMD_GET_OPP_DELAY = 0x89,
};

/*
 * Data structure to track commands and reponses.
 */
struct itech_it8500_cmd_packet {
	uint8_t command; /* Command number. */
	uint8_t address; /* Unit address: 0..254 (255 = broadcast). */
	uint8_t data[IT8500_DATA_LEN]; /* Command/Response data. */
};

/*
 * "Operation state" register flags.
 */
#define OS_CAL_FLAG   0x01
#define OS_WTG_FLAG   0x02
#define OS_REM_FLAG   0x04
#define OS_OUT_FLAG   0x08
#define OS_LOCAL_FLAG 0x10
#define OS_SENSE_FLAG 0x20
#define OS_LOT_FLAG   0x40

/*
 * "Demand state" register flags.
 */
#define DS_RV_FLAG      0x0001
#define DS_OV_FLAG      0x0002
#define DS_OC_FLAG      0x0004
#define DS_OP_FLAG      0x0008
#define DS_OT_FLAG      0x0010
#define DS_SV_FLAG      0x0020
#define DS_CC_MODE_FLAG 0x0040
#define DS_CV_MODE_FLAG 0x0080
#define DS_CW_MODE_FLAG 0x0100
#define DS_CR_MODE_FLAG 0x0200

struct dev_context {
	char model[IT8500_MAX_MODEL_NAME_LEN + 1];
	uint8_t fw_ver_major;
	uint8_t fw_ver_minor;
	uint8_t address;
	double max_current;
	double min_voltage;
	double max_voltage;
	double max_power;
	double min_resistance;
	double max_resistance;
	size_t max_sample_rate_idx;

	double voltage;
	double current;
	double power;
	uint8_t operation_state;
	uint16_t demand_state;
	enum itech_it8500_modes mode;
	gboolean load_on;

	uint64_t sample_rate;
	struct sr_sw_limits limits;

	GMutex mutex;
};

SR_PRIV uint8_t itech_it8500_checksum(const uint8_t *packet);
SR_PRIV const char *itech_it8500_mode_to_string(enum itech_it8500_modes mode);
SR_PRIV int itech_it8500_string_to_mode(const char *modename,
		enum itech_it8500_modes *mode);
SR_PRIV int itech_it8500_send_cmd(struct sr_serial_dev_inst *serial,
		struct itech_it8500_cmd_packet *cmd,
		struct itech_it8500_cmd_packet **response);
SR_PRIV int itech_it8500_cmd(const struct sr_dev_inst *sdi,
		struct itech_it8500_cmd_packet *cmd,
		struct itech_it8500_cmd_packet **response);
SR_PRIV void itech_it8500_status_change(const struct sr_dev_inst *sdi,
		uint8_t old_op, uint8_t new_op,
		uint16_t old_de, uint16_t new_de,
		enum itech_it8500_modes old_m, enum itech_it8500_modes new_m);
SR_PRIV int itech_it8500_get_status(const struct sr_dev_inst *sdi);
SR_PRIV int itech_it8500_get_int(const struct sr_dev_inst *sdi,
		enum itech_it8500_command command, int *result);
SR_PRIV void itech_it8500_channel_send_value(const struct sr_dev_inst *sdi,
		struct sr_channel *ch, double value, enum sr_mq mq,
		enum sr_unit unit, int digits);
SR_PRIV int itech_it8500_receive_data(int fd, int revents, void *cb_data);

#endif
Commit	Line	Data
c16effae TK	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2020 Timo Kokkonen <tjko@iki.fi>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H
	21	#define LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H
	22
	23	#include <stdint.h>
	24	#include <glib.h>
	25	#include <libsigrok/libsigrok.h>
	26	#include "libsigrok-internal.h"
	27
	28	#define LOG_PREFIX "itech-it8500"
	29
f21b6983 TK	30	/*
	31	* Unit uses 26 byte binary packets for communications.
	32	* Packets have fixed format:
	33	*
	34	* Offset\|Length\|Description
	35	* ------\|------\|-------------------------------------
	36	* 0 \| 1 \| Preable (always set to 0xAA).
	37	* 1 \| 1 \| Unit Address (0-254, 255=broadcast).
	38	* 2 \| 1 \| Command number.
	39	* 3 \| 22 \| Variable data.
	40	* 25 \| 1 \| Parity code (checksum).
	41	*/
	42	#define IT8500_HEADER_LEN 3
	43	#define IT8500_DATA_LEN 22
	44	#define IT8500_PACKET_LEN (IT8500_HEADER_LEN + IT8500_DATA_LEN + 1)
	45
	46	#define IT8500_PREAMBLE 0xaa
	47	#define IT8500_MAX_MODEL_NAME_LEN 5
	48
	49	/* Status packet status byte values. */
	50	#define IT8500_COMMAND_SUCCESSFUL 0x80
	51	#define IT8500_INVALID_CHECKSUM 0x90
	52	#define IT8500_INVALID_PARAMETER 0xa0
	53	#define IT8500_UNKNOWN_COMMAND 0xb0
	54	#define IT8500_INVALID_COMMAND 0xc0
	55
	56	/*
	57	* Operating modes.
	58	* Note! These map directly to mode numbers used in CMD_SET_MODE
	59	* and CMD_GET_MODE commands, so values are manually defined below.
	60	*/
	61	enum itech_it8500_modes {
	62	CC = 0,
	63	CV = 1,
	64	CW = 2,
	65	CR = 3,
	66	IT8500_MODES, /* Total count, for internal use. */
	67	};
	68
	69	enum itech_it8500_command {
	70	CMD_GET_LOAD_LIMITS = 0x01,
	71	CMD_SET_HW_OPP_VALUE = 0x02,
	72	CMD_GET_HW_OPP_VALUE = 0x03,
	73	CMD_SET_VON_MODE = 0x0e,
	74	CMD_GET_VON_MODE = 0x0f,
	75	CMD_SET_VON_VALUE = 0x10,
	76	CMD_GET_VON_VALUE = 0x11,
	77	CMD_RESPONSE = 0x12, /* Response to commands not returning any data. */
	78	CMD_SET_REMOTE_MODE = 0x20,
	79	CMD_LOAD_ON_OFF = 0x21,
	80	CMD_SET_MAX_VOLTAGE = 0x22,
	81	CMD_GET_MAX_VOLTAGE = 0x23,
	82	CMD_SET_MAX_CURRENT = 0x24,
	83	CMD_GET_MAX_CURRENT = 0x25,
	84	CMD_SET_MAX_POWER = 0x26,
	85	CMD_GET_MAX_POWER = 0x27,
	86	CMD_SET_MODE = 0x28,
	87	CMD_GET_MODE = 0x29,
	88	CMD_SET_CC_CURRENT = 0x2a,
	89	CMD_GET_CC_CURRENT = 0x2b,
	90	CMD_SET_CV_VOLTAGE = 0x2c,
	91	CMD_GET_CV_VOLTAGE = 0x2d,
	92	CMD_SET_CW_POWER = 0x2e,
	93	CMD_GET_CW_POWER = 0x2f,
94	CMD_SET_CR_RESISTANCE = 0x30,
95	CMD_GET_CR_RESISTANCE = 0x31,
96	CMD_SET_BATTERY_MIN_VOLTAGE = 0x4e,
97	CMD_GET_BATTERY_MIN_VOLTAGE = 0x4f,
98	CMD_SET_LOAD_ON_TIMER = 0x50,
99	CMD_GET_LOAD_ON_TIMER = 0x51,
100	CMD_LOAD_ON_TIMER = 0x52,
101	CMD_LOAD_ON_TIME_STATUS = 0x53,
102	CMD_SET_ADDRESS = 0x54,
103	CMD_LOCAL_CONTROL = 0x55,
104	CMD_REMOTE_SENSING = 0x56,
105	CMD_REMOTE_SENSING_STATUS = 0x57,
106	CMD_SET_TRIGGER_SOURCE = 0x58,
107	CMD_GET_TRIGGER_SOURCE = 0x59,
108	CMD_TRIGGER = 0x5a,
109	CMD_SAVE_SETTINGS = 0x5b,
110	CMD_LOAD_SETTINGS = 0x5c,
111	CMD_SET_FUNCTION = 0x5d,
112	CMD_GET_FUNCTION = 0x5e,
113	CMD_GET_STATE = 0x5f,
114	CMD_GET_MODEL_INFO = 0x6a,
115	CMD_GET_BARCODE_INFO = 0x6b,
116	CMD_SET_OCP_VALUE = 0x80,
117	CMD_GET_OCP_VALUE = 0x81,
118	CMD_SET_OCP_DELAY = 0x82,
119	CMD_GET_OCP_DELAY = 0x83,
120	CMD_ENABLE_OCP = 0x84,
121	CMD_DISABLE_OCP = 0x85,
122	CMD_SET_OPP_VALUE = 0x86,
123	CMD_GET_OPP_VALUE = 0x87,
124	CMD_SET_OPP_DELAY = 0x88,
125	CMD_GET_OPP_DELAY = 0x89,
126	};
127
128	/*
129	* Data structure to track commands and reponses.
130	*/
131	struct itech_it8500_cmd_packet {
132	uint8_t command; /* Command number. */
133	uint8_t address; /* Unit address: 0..254 (255 = broadcast). */
134	uint8_t data[IT8500_DATA_LEN]; /* Command/Response data. */
135	};
136
137	/*
138	* "Operation state" register flags.
139	*/
140	#define OS_CAL_FLAG 0x01
141	#define OS_WTG_FLAG 0x02
142	#define OS_REM_FLAG 0x04
143	#define OS_OUT_FLAG 0x08
144	#define OS_LOCAL_FLAG 0x10
145	#define OS_SENSE_FLAG 0x20
146	#define OS_LOT_FLAG 0x40
147
148	/*
149	* "Demand state" register flags.
150	*/
151	#define DS_RV_FLAG 0x0001
152	#define DS_OV_FLAG 0x0002
153	#define DS_OC_FLAG 0x0004
154	#define DS_OP_FLAG 0x0008
155	#define DS_OT_FLAG 0x0010
156	#define DS_SV_FLAG 0x0020
157	#define DS_CC_MODE_FLAG 0x0040
158	#define DS_CV_MODE_FLAG 0x0080
159	#define DS_CW_MODE_FLAG 0x0100
160	#define DS_CR_MODE_FLAG 0x0200
161
c16effae	162	struct dev_context {
f21b6983 TK	163	char model[IT8500_MAX_MODEL_NAME_LEN + 1];
	164	uint8_t fw_ver_major;
	165	uint8_t fw_ver_minor;
	166	uint8_t address;
	167	double max_current;
	168	double min_voltage;
	169	double max_voltage;
	170	double max_power;
	171	double min_resistance;
	172	double max_resistance;
	173	size_t max_sample_rate_idx;
	174
	175	double voltage;
	176	double current;
	177	double power;
	178	uint8_t operation_state;
	179	uint16_t demand_state;
	180	enum itech_it8500_modes mode;
	181	gboolean load_on;
	182
	183	uint64_t sample_rate;
	184	struct sr_sw_limits limits;
	185
	186	GMutex mutex;
c16effae TK	187	};
c16effae TK	188
f21b6983 TK	189	SR_PRIV uint8_t itech_it8500_checksum(const uint8_t *packet);
	190	SR_PRIV const char *itech_it8500_mode_to_string(enum itech_it8500_modes mode);
	191	SR_PRIV int itech_it8500_string_to_mode(const char *modename,
	192	enum itech_it8500_modes *mode);
	193	SR_PRIV int itech_it8500_send_cmd(struct sr_serial_dev_inst *serial,
	194	struct itech_it8500_cmd_packet *cmd,
	195	struct itech_it8500_cmd_packet **response);
	196	SR_PRIV int itech_it8500_cmd(const struct sr_dev_inst *sdi,
	197	struct itech_it8500_cmd_packet *cmd,
	198	struct itech_it8500_cmd_packet **response);
	199	SR_PRIV void itech_it8500_status_change(const struct sr_dev_inst *sdi,
	200	uint8_t old_op, uint8_t new_op,
	201	uint16_t old_de, uint16_t new_de,
	202	enum itech_it8500_modes old_m, enum itech_it8500_modes new_m);
	203	SR_PRIV int itech_it8500_get_status(const struct sr_dev_inst *sdi);
	204	SR_PRIV int itech_it8500_get_int(const struct sr_dev_inst *sdi,
	205	enum itech_it8500_command command, int *result);
	206	SR_PRIV void itech_it8500_channel_send_value(const struct sr_dev_inst *sdi,
	207	struct sr_channel *ch, double value, enum sr_mq mq,
	208	enum sr_unit unit, int digits);
c16effae TK	209	SR_PRIV int itech_it8500_receive_data(int fd, int revents, void *cb_data);
	210
	211	#endif