]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-dso/api.c
drivers: Use g_variant_new_printf() where possible.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
417412c8 21#include <math.h>
3b533202
BV
22#include <stdio.h>
23#include <stdint.h>
24#include <stdlib.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <fcntl.h>
28#include <unistd.h>
29#include <string.h>
30#include <sys/time.h>
31#include <inttypes.h>
3b533202
BV
32#include <glib.h>
33#include <libusb.h>
c1aae900 34#include <libsigrok/libsigrok.h>
45c59c8b 35#include "libsigrok-internal.h"
caeb8d7a 36#include "protocol.h"
3b533202 37
fc8fe3e3
BV
38/* Max time in ms before we want to check on USB events */
39/* TODO tune this properly */
e98b7f1b 40#define TICK 1
3b533202 41
d9251a2c
UH
42#define NUM_TIMEBASE 10
43#define NUM_VDIV 8
79917848 44
07ffa5b3
UH
45#define NUM_BUFFER_SIZES 2
46
584560f1 47static const uint32_t scanopts[] = {
624f5b4c
BV
48 SR_CONF_CONN,
49};
50
5ecd9049 51static const uint32_t drvopts[] = {
1953564a 52 SR_CONF_OSCILLOSCOPE,
933defaa
BV
53};
54
5ecd9049 55static const uint32_t devopts[] = {
e91bb0a6 56 SR_CONF_CONTINUOUS,
933defaa 57 SR_CONF_CONN | SR_CONF_GET,
86621306 58 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa 59 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306
UH
60 SR_CONF_NUM_HDIV | SR_CONF_GET,
61 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
933defaa
BV
62 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
86621306 64 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 65 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
66};
67
933defaa 68static const uint32_t devopts_cg[] = {
933defaa
BV
69 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
70 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 71 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
933defaa
BV
72};
73
ba7dd8bb 74static const char *channel_names[] = {
78693401 75 "CH1", "CH2",
3b533202
BV
76};
77
034accb5 78static const uint64_t buffersizes_32k[] = {
1a46cc62 79 (10 * 1024), (32 * 1024),
034accb5
BV
80};
81static const uint64_t buffersizes_512k[] = {
1a46cc62 82 (10 * 1024), (512 * 1024),
034accb5
BV
83};
84static const uint64_t buffersizes_14k[] = {
1a46cc62 85 (10 * 1024), (14 * 1024),
034accb5
BV
86};
87
62bb8840 88static const struct dso_profile dev_profiles[] = {
88a13f30 89 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 90 "Hantek", "DSO-2090",
034accb5 91 buffersizes_32k,
8e2d6c9d 92 "hantek-dso-2090.fw" },
88a13f30
BV
93 { 0x04b4, 0x2150, 0x04b5, 0x2150,
94 "Hantek", "DSO-2150",
034accb5 95 buffersizes_32k,
8e2d6c9d 96 "hantek-dso-2150.fw" },
88a13f30
BV
97 { 0x04b4, 0x2250, 0x04b5, 0x2250,
98 "Hantek", "DSO-2250",
034accb5 99 buffersizes_512k,
8e2d6c9d 100 "hantek-dso-2250.fw" },
88a13f30
BV
101 { 0x04b4, 0x5200, 0x04b5, 0x5200,
102 "Hantek", "DSO-5200",
034accb5 103 buffersizes_14k,
8e2d6c9d 104 "hantek-dso-5200.fw" },
88a13f30
BV
105 { 0x04b4, 0x520a, 0x04b5, 0x520a,
106 "Hantek", "DSO-5200A",
034accb5 107 buffersizes_512k,
8e2d6c9d 108 "hantek-dso-5200A.fw" },
1b4aedc0 109 ALL_ZERO
a370ef19
BV
110};
111
86bb3f4a 112static const uint64_t timebases[][2] = {
a370ef19
BV
113 /* microseconds */
114 { 10, 1000000 },
115 { 20, 1000000 },
116 { 40, 1000000 },
117 { 100, 1000000 },
118 { 200, 1000000 },
119 { 400, 1000000 },
120 /* milliseconds */
121 { 1, 1000 },
122 { 2, 1000 },
123 { 4, 1000 },
124 { 10, 1000 },
125 { 20, 1000 },
126 { 40, 1000 },
127 { 100, 1000 },
128 { 200, 1000 },
129 { 400, 1000 },
a370ef19
BV
130};
131
86bb3f4a 132static const uint64_t vdivs[][2] = {
313deed2
BV
133 /* millivolts */
134 { 10, 1000 },
135 { 20, 1000 },
136 { 50, 1000 },
137 { 100, 1000 },
138 { 200, 1000 },
139 { 500, 1000 },
140 /* volts */
141 { 1, 1 },
142 { 2, 1 },
143 { 5, 1 },
313deed2
BV
144};
145
62bb8840 146static const char *trigger_sources[] = {
f8195cb2 147 "CH1", "CH2", "EXT",
88a13f30 148 /* TODO: forced */
a370ef19 149};
3b533202 150
933defaa 151static const char *trigger_slopes[] = {
f8195cb2 152 "r", "f",
ebb781a6
BV
153};
154
62bb8840 155static const char *coupling[] = {
f8195cb2 156 "AC", "DC", "GND",
b58fbd99
BV
157};
158
15a5bfe4 159static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
160{
161 struct sr_dev_inst *sdi;
ba7dd8bb 162 struct sr_channel *ch;
933defaa 163 struct sr_channel_group *cg;
269971dd 164 struct dev_context *devc;
dcd438ee 165 unsigned int i;
3b533202 166
aac29cc1 167 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
168 sdi->status = SR_ST_INITIALIZING;
169 sdi->vendor = g_strdup(prof->vendor);
170 sdi->model = g_strdup(prof->model);
3b533202 171
e98b7f1b 172 /*
ba7dd8bb 173 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
174 * a trigger source internal to the device.
175 */
0f34cb47 176 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 177 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
178 cg = g_malloc0(sizeof(struct sr_channel_group));
179 cg->name = g_strdup(channel_names[i]);
180 cg->channels = g_slist_append(cg->channels, ch);
181 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
182 }
183
933defaa 184 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
185 devc->profile = prof;
186 devc->dev_state = IDLE;
187 devc->timebase = DEFAULT_TIMEBASE;
417412c8
AJ
188 devc->ch_enabled[0] = TRUE;
189 devc->ch_enabled[1] = TRUE;
933defaa
BV
190 devc->voltage[0] = DEFAULT_VOLTAGE;
191 devc->voltage[1] = DEFAULT_VOLTAGE;
192 devc->coupling[0] = DEFAULT_COUPLING;
193 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
194 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
195 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
196 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
197 devc->framesize = DEFAULT_FRAMESIZE;
198 devc->triggerslope = SLOPE_POSITIVE;
199 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
200 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
201 sdi->priv = devc;
3b533202
BV
202
203 return sdi;
204}
205
ba7dd8bb 206static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 207{
014359e3 208 struct dev_context *devc;
ba7dd8bb 209 struct sr_channel *ch;
62bb8840 210 const GSList *l;
69e19dd7 211 int p;
3b533202 212
014359e3
BV
213 devc = sdi->priv;
214
ba7dd8bb 215 g_slist_free(devc->enabled_channels);
417412c8 216 devc->ch_enabled[0] = devc->ch_enabled[1] = FALSE;
ba7dd8bb
UH
217 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
218 ch = l->data;
69e19dd7 219 if (p == 0)
417412c8 220 devc->ch_enabled[0] = ch->enabled;
69e19dd7 221 else
417412c8 222 devc->ch_enabled[1] = ch->enabled;
ba7dd8bb
UH
223 if (ch->enabled)
224 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
225 }
226
227 return SR_OK;
228}
229
3553451f 230static void clear_helper(struct dev_context *devc)
39cfdd75 231{
949b3dc0 232 g_free(devc->triggersource);
ba7dd8bb 233 g_slist_free(devc->enabled_channels);
949b3dc0 234}
39cfdd75 235
4f840ce9 236static int dev_clear(const struct sr_dev_driver *di)
949b3dc0 237{
3553451f 238 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
39cfdd75
BV
239}
240
4f840ce9 241static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 242{
269971dd
BV
243 struct drv_context *drvc;
244 struct dev_context *devc;
294dbac7 245 struct sr_dev_inst *sdi;
46a743c1
BV
246 struct sr_usb_dev_inst *usb;
247 struct sr_config *src;
294dbac7
BV
248 const struct dso_profile *prof;
249 GSList *l, *devices, *conn_devices;
39cfdd75 250 struct libusb_device_descriptor des;
3b533202 251 libusb_device **devlist;
2a8f2d41 252 int i, j;
46a743c1 253 const char *conn;
395206f4 254 char connection_id[64];
e98b7f1b 255
41812aca 256 drvc = di->context;
39cfdd75 257
4b97c74e
UH
258 devices = 0;
259
294dbac7
BV
260 conn = NULL;
261 for (l = options; l; l = l->next) {
262 src = l->data;
263 if (src->key == SR_CONF_CONN) {
264 conn = g_variant_get_string(src->data, NULL);
265 break;
266 }
267 }
268 if (conn)
269 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
270 else
271 conn_devices = NULL;
272
39cfdd75 273 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 274 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 275 for (i = 0; devlist[i]; i++) {
46a743c1 276 if (conn) {
294dbac7
BV
277 usb = NULL;
278 for (l = conn_devices; l; l = l->next) {
279 usb = l->data;
280 if (usb->bus == libusb_get_bus_number(devlist[i])
281 && usb->address == libusb_get_device_address(devlist[i]))
282 break;
283 }
284 if (!l)
285 /* This device matched none of the ones that
286 * matched the conn specification. */
287 continue;
46a743c1 288 }
294dbac7 289
2a8f2d41 290 libusb_get_device_descriptor(devlist[i], &des);
3b533202 291
395206f4
SA
292 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
293
3b533202
BV
294 prof = NULL;
295 for (j = 0; dev_profiles[j].orig_vid; j++) {
296 if (des.idVendor == dev_profiles[j].orig_vid
297 && des.idProduct == dev_profiles[j].orig_pid) {
298 /* Device matches the pre-firmware profile. */
299 prof = &dev_profiles[j];
e98b7f1b 300 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 301 sdi = dso_dev_new(prof);
395206f4 302 sdi->connection_id = g_strdup(connection_id);
39cfdd75 303 devices = g_slist_append(devices, sdi);
269971dd 304 devc = sdi->priv;
8e2d6c9d
DE
305 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
306 USB_CONFIGURATION, prof->firmware) == SR_OK)
3b533202 307 /* Remember when the firmware on this device was updated */
269971dd 308 devc->fw_updated = g_get_monotonic_time();
3b533202 309 else
395206f4 310 sr_err("Firmware upload failed");
3b533202 311 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 312 sdi->conn = sr_usb_dev_inst_new(
3b533202 313 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
314 break;
315 } else if (des.idVendor == dev_profiles[j].fw_vid
316 && des.idProduct == dev_profiles[j].fw_pid) {
317 /* Device matches the post-firmware profile. */
318 prof = &dev_profiles[j];
e98b7f1b 319 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 320 sdi = dso_dev_new(prof);
395206f4 321 sdi->connection_id = g_strdup(connection_id);
3b533202 322 sdi->status = SR_ST_INACTIVE;
39cfdd75 323 devices = g_slist_append(devices, sdi);
d0eec1ee 324 sdi->inst_type = SR_INST_USB;
c118080b 325 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
326 libusb_get_bus_number(devlist[i]),
327 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
328 break;
329 }
330 }
331 if (!prof)
332 /* not a supported VID/PID */
333 continue;
334 }
335 libusb_free_device_list(devlist, 1);
336
15a5bfe4 337 return std_scan_complete(di, devices);
3b533202
BV
338}
339
6078d2c9 340static int dev_open(struct sr_dev_inst *sdi)
3b533202 341{
269971dd 342 struct dev_context *devc;
c118080b 343 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
344 int64_t timediff_us, timediff_ms;
345 int err;
3b533202 346
269971dd 347 devc = sdi->priv;
c118080b 348 usb = sdi->conn;
3b533202
BV
349
350 /*
e98b7f1b
UH
351 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
352 * for the FX2 to renumerate.
3b533202 353 */
fc8fe3e3 354 err = SR_ERR;
269971dd 355 if (devc->fw_updated > 0) {
e98b7f1b
UH
356 sr_info("Waiting for device to reset.");
357 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 358 g_usleep(300 * 1000);
fc8fe3e3
BV
359 timediff_ms = 0;
360 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 361 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
362 break;
363 g_usleep(100 * 1000);
269971dd 364 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 365 timediff_ms = timediff_us / 1000;
e98b7f1b 366 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 367 }
6433156c 368 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 369 } else {
25a0f108 370 err = dso_open(sdi);
3b533202
BV
371 }
372
373 if (err != SR_OK) {
e98b7f1b 374 sr_err("Unable to open device.");
3b533202
BV
375 return SR_ERR;
376 }
377
c118080b 378 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 379 if (err != 0) {
d4928d71 380 sr_err("Unable to claim interface: %s.",
d9251a2c 381 libusb_error_name(err));
3b533202
BV
382 return SR_ERR;
383 }
384
385 return SR_OK;
386}
387
6078d2c9 388static int dev_close(struct sr_dev_inst *sdi)
3b533202 389{
3b533202
BV
390 dso_close(sdi);
391
392 return SR_OK;
393}
394
dd7a72ea
UH
395static int config_get(uint32_t key, GVariant **data,
396 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
79917848 397{
933defaa 398 struct dev_context *devc;
624f5b4c 399 struct sr_usb_dev_inst *usb;
2c240774 400 const char *s;
933defaa
BV
401 const uint64_t *vdiv;
402 int ch_idx;
79917848 403
584560f1 404 switch (key) {
bf622e6d 405 case SR_CONF_NUM_HDIV:
79917848
BV
406 *data = g_variant_new_int32(NUM_TIMEBASE);
407 break;
408 case SR_CONF_NUM_VDIV:
409 *data = g_variant_new_int32(NUM_VDIV);
410 break;
933defaa
BV
411 }
412
413 if (!sdi)
414 return SR_ERR_ARG;
415
416 devc = sdi->priv;
417 if (!cg) {
418 switch (key) {
419 case SR_CONF_CONN:
420 if (!sdi->conn)
421 return SR_ERR_ARG;
422 usb = sdi->conn;
423 if (usb->address == 255)
424 /* Device still needs to re-enumerate after firmware
425 * upload, so we don't know its (future) address. */
426 return SR_ERR;
95c1fe62 427 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
933defaa
BV
428 break;
429 case SR_CONF_TIMEBASE:
430 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
431 timebases[devc->timebase][1]);
432 break;
433 case SR_CONF_BUFFERSIZE:
434 *data = g_variant_new_uint64(devc->framesize);
435 break;
436 case SR_CONF_TRIGGER_SOURCE:
437 *data = g_variant_new_string(devc->triggersource);
438 break;
439 case SR_CONF_TRIGGER_SLOPE:
c442ffda 440 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
441 *data = g_variant_new_string(s);
442 break;
443 case SR_CONF_HORIZ_TRIGGERPOS:
444 *data = g_variant_new_double(devc->triggerposition);
445 break;
446 default:
447 return SR_ERR_NA;
448 }
449 } else {
450 if (sdi->channel_groups->data == cg)
451 ch_idx = 0;
452 else if (sdi->channel_groups->next->data == cg)
453 ch_idx = 1;
454 else
455 return SR_ERR_ARG;
0c5f2abc 456 switch (key) {
933defaa
BV
457 case SR_CONF_FILTER:
458 *data = g_variant_new_boolean(devc->filter[ch_idx]);
459 break;
460 case SR_CONF_VDIV:
461 vdiv = vdivs[devc->voltage[ch_idx]];
462 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
463 break;
464 case SR_CONF_COUPLING:
465 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
466 break;
467 }
79917848
BV
468 }
469
470 return SR_OK;
471}
472
dd7a72ea
UH
473static int config_set(uint32_t key, GVariant *data,
474 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
3b533202 475{
269971dd 476 struct dev_context *devc;
f627afd6 477 double tmp_double;
86bb3f4a 478 uint64_t tmp_u64, p, q;
a9010323 479 int tmp_int, ch_idx;
f627afd6
BV
480 unsigned int i;
481 const char *tmp_str;
8f996b89 482
269971dd 483 devc = sdi->priv;
933defaa
BV
484 if (!cg) {
485 switch (key) {
486 case SR_CONF_LIMIT_FRAMES:
487 devc->limit_frames = g_variant_get_uint64(data);
488 break;
489 case SR_CONF_TRIGGER_SLOPE:
490 tmp_str = g_variant_get_string(data, NULL);
491 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
492 return SR_ERR_ARG;
493 devc->triggerslope = (tmp_str[0] == 'r')
494 ? SLOPE_POSITIVE : SLOPE_NEGATIVE;
495 break;
496 case SR_CONF_HORIZ_TRIGGERPOS:
497 tmp_double = g_variant_get_double(data);
498 if (tmp_double < 0.0 || tmp_double > 1.0) {
499 sr_err("Trigger position should be between 0.0 and 1.0.");
a9010323 500 return SR_ERR_ARG;
933defaa
BV
501 } else
502 devc->triggerposition = tmp_double;
503 break;
504 case SR_CONF_BUFFERSIZE:
505 tmp_u64 = g_variant_get_uint64(data);
07ffa5b3 506 for (i = 0; i < NUM_BUFFER_SIZES; i++) {
933defaa
BV
507 if (devc->profile->buffersizes[i] == tmp_u64) {
508 devc->framesize = tmp_u64;
509 break;
510 }
a370ef19 511 }
07ffa5b3 512 if (i == NUM_BUFFER_SIZES)
a9010323 513 return SR_ERR_ARG;
933defaa
BV
514 break;
515 case SR_CONF_TIMEBASE:
516 g_variant_get(data, "(tt)", &p, &q);
517 tmp_int = -1;
518 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
519 if (timebases[i][0] == p && timebases[i][1] == q) {
520 tmp_int = i;
521 break;
522 }
a370ef19 523 }
933defaa
BV
524 if (tmp_int >= 0)
525 devc->timebase = tmp_int;
526 else
a9010323 527 return SR_ERR_ARG;
933defaa
BV
528 break;
529 case SR_CONF_TRIGGER_SOURCE:
530 tmp_str = g_variant_get_string(data, NULL);
531 for (i = 0; trigger_sources[i]; i++) {
532 if (!strcmp(tmp_str, trigger_sources[i])) {
533 devc->triggersource = g_strdup(tmp_str);
534 break;
535 }
ebb781a6 536 }
933defaa 537 if (trigger_sources[i] == 0)
a9010323 538 return SR_ERR_ARG;
933defaa
BV
539 break;
540 default:
a9010323 541 return SR_ERR_NA;
ebb781a6 542 }
933defaa
BV
543 } else {
544 if (sdi->channel_groups->data == cg)
545 ch_idx = 0;
546 else if (sdi->channel_groups->next->data == cg)
547 ch_idx = 1;
548 else
549 return SR_ERR_ARG;
550 switch (key) {
551 case SR_CONF_FILTER:
552 devc->filter[ch_idx] = g_variant_get_boolean(data);
553 break;
554 case SR_CONF_VDIV:
555 g_variant_get(data, "(tt)", &p, &q);
556 tmp_int = -1;
557 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
558 if (vdivs[i][0] == p && vdivs[i][1] == q) {
559 tmp_int = i;
560 break;
561 }
313deed2 562 }
933defaa
BV
563 if (tmp_int >= 0) {
564 devc->voltage[ch_idx] = tmp_int;
565 } else
a9010323 566 return SR_ERR_ARG;
933defaa
BV
567 break;
568 case SR_CONF_COUPLING:
569 tmp_str = g_variant_get_string(data, NULL);
570 for (i = 0; coupling[i]; i++) {
571 if (!strcmp(tmp_str, coupling[i])) {
572 devc->coupling[ch_idx] = i;
573 break;
574 }
b58fbd99 575 }
933defaa 576 if (coupling[i] == 0)
a9010323 577 return SR_ERR_ARG;
933defaa
BV
578 break;
579 default:
a9010323 580 return SR_ERR_NA;
b58fbd99 581 }
3b533202
BV
582 }
583
a9010323 584 return SR_OK;
3b533202
BV
585}
586
dd7a72ea
UH
587static int config_list(uint32_t key, GVariant **data,
588 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 589{
034accb5 590 struct dev_context *devc;
a1c743fc 591
933defaa 592 if (!cg) {
93b118da 593 switch (key) {
e66d1892 594 case SR_CONF_SCAN_OPTIONS:
933defaa 595 case SR_CONF_DEVICE_OPTIONS:
e66d1892 596 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
933defaa
BV
597 case SR_CONF_BUFFERSIZE:
598 if (!sdi)
599 return SR_ERR_ARG;
600 devc = sdi->priv;
105df674 601 *data = std_gvar_array_u64(devc->profile->buffersizes, NUM_BUFFER_SIZES);
933defaa
BV
602 break;
603 case SR_CONF_TIMEBASE:
58ffcf97 604 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(timebases));
933defaa
BV
605 break;
606 case SR_CONF_TRIGGER_SOURCE:
53012da6 607 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_sources));
933defaa
BV
608 break;
609 case SR_CONF_TRIGGER_SLOPE:
53012da6 610 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
933defaa
BV
611 break;
612 default:
613 return SR_ERR_NA;
3973ee26 614 }
933defaa 615 } else {
93b118da 616 switch (key) {
933defaa 617 case SR_CONF_DEVICE_OPTIONS:
53012da6 618 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
933defaa
BV
619 break;
620 case SR_CONF_COUPLING:
53012da6 621 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
933defaa
BV
622 break;
623 case SR_CONF_VDIV:
58ffcf97 624 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(vdivs));
933defaa
BV
625 break;
626 default:
627 return SR_ERR_NA;
3973ee26 628 }
a1c743fc
BV
629 }
630
631 return SR_OK;
632}
633
69e19dd7 634static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 635 int num_samples)
3b533202
BV
636{
637 struct sr_datafeed_packet packet;
ae7d8a58
UH
638 struct sr_datafeed_analog analog;
639 struct sr_analog_encoding encoding;
640 struct sr_analog_meaning meaning;
641 struct sr_analog_spec spec;
417412c8
AJ
642 struct dev_context *devc = sdi->priv;
643 GSList *channels = devc->enabled_channels;
3b533202 644
ae7d8a58 645 packet.type = SR_DF_ANALOG;
3b533202 646 packet.payload = &analog;
6e71ef3b 647 /* TODO: support for 5xxx series 9-bit samples */
ae7d8a58 648 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
e749a8cb 649 analog.num_samples = num_samples;
ae7d8a58
UH
650 analog.meaning->mq = SR_MQ_VOLTAGE;
651 analog.meaning->unit = SR_UNIT_VOLT;
652 analog.meaning->mqflags = 0;
886a52b6 653 /* TODO: Check malloc return value. */
417412c8
AJ
654 analog.data = g_try_malloc(num_samples * sizeof(float));
655
656 for (int ch = 0; ch < 2; ch++) {
657 if (!devc->ch_enabled[ch])
658 continue;
659
660 float range = ((float)vdivs[devc->voltage[ch]][0] / vdivs[devc->voltage[ch]][1]) * 8;
661 float vdivlog = log10f(range / 255);
662 int digits = -(int)vdivlog + (vdivlog < 0.0);
663 analog.encoding->digits = digits;
664 analog.spec->spec_digits = digits;
665 analog.meaning->channels = g_slist_append(NULL, channels->data);
666
667 for (int i = 0; i < num_samples; i++) {
668 /*
669 * The device always sends data for both channels. If a channel
670 * is disabled, it contains a copy of the enabled channel's
671 * data. However, we only send the requested channels to
672 * the bus.
673 *
674 * Voltage values are encoded as a value 0-255 (0-512 on the
675 * DSO-5200*), where the value is a point in the range
676 * represented by the vdiv setting. There are 8 vertical divs,
677 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
678 * and 255 = +2V.
679 */
680 /* TODO: Support for DSO-5xxx series 9-bit samples. */
681 ((float *)analog.data)[i] = range / 255 * *(buf + i * 2 + 1 - ch) - range / 2;
6e71ef3b 682 }
417412c8
AJ
683 sr_session_send(sdi, &packet);
684 g_slist_free(analog.meaning->channels);
685
686 channels = channels->next;
3b533202 687 }
1e6b5b93 688 g_free(analog.data);
e749a8cb
BV
689}
690
e98b7f1b
UH
691/*
692 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 693 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 694 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
695 * the libsigrok session bus.
696 */
55462b8b 697static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb
BV
698{
699 struct sr_datafeed_packet packet;
69e19dd7 700 struct sr_dev_inst *sdi;
269971dd 701 struct dev_context *devc;
e749a8cb
BV
702 int num_samples, pre;
703
69e19dd7
BV
704 sdi = transfer->user_data;
705 devc = sdi->priv;
eb8e6cd2
UH
706 sr_spew("receive_transfer(): status %s received %d bytes.",
707 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
708
709 if (transfer->actual_length == 0)
710 /* Nothing to send to the bus. */
711 return;
712
713 num_samples = transfer->actual_length / 2;
714
d4007311 715 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
d9251a2c 716 devc->samp_received + num_samples, devc->framesize);
e749a8cb 717
e98b7f1b
UH
718 /*
719 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
720 * doesn't represent the trigger point. The offset at which the trigger
721 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
722 * from there up the session bus. The samples in the frame buffer
723 * before that trigger point came after the end of the device's frame
724 * buffer was reached, and it wrapped around to overwrite up until the
725 * trigger point.
e749a8cb 726 */
269971dd 727 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 728 /* Trigger point not yet reached. */
269971dd 729 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 730 /* The entire chunk is before the trigger point. */
269971dd 731 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 732 transfer->buffer, num_samples * 2);
269971dd 733 devc->samp_buffered += num_samples;
e749a8cb 734 } else {
e98b7f1b
UH
735 /*
736 * This chunk hits or overruns the trigger point.
e749a8cb 737 * Store the part before the trigger fired, and
e98b7f1b
UH
738 * send the rest up to the session bus.
739 */
269971dd
BV
740 pre = devc->trigger_offset - devc->samp_received;
741 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 742 transfer->buffer, pre * 2);
269971dd 743 devc->samp_buffered += pre;
e749a8cb
BV
744
745 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 746 sr_dbg("Reached trigger point, %d samples buffered.",
d9251a2c 747 devc->samp_buffered);
e749a8cb
BV
748
749 /* Avoid the corner case where the chunk ended at
750 * exactly the trigger point. */
751 if (num_samples > pre)
69e19dd7 752 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
753 num_samples - pre);
754 }
755 } else {
756 /* Already past the trigger point, just send it all out. */
a95f142e 757 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
758 }
759
269971dd 760 devc->samp_received += num_samples;
e749a8cb
BV
761
762 /* Everything in this transfer was either copied to the buffer or
763 * sent to the session bus. */
3b533202
BV
764 g_free(transfer->buffer);
765 libusb_free_transfer(transfer);
3b533202 766
269971dd 767 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
768 /* That was the last chunk in this frame. Send the buffered
769 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 770 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
d9251a2c 771 devc->samp_buffered);
69e19dd7 772 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
773
774 /* Mark the end of this frame. */
ae88b97b 775 packet.type = SR_DF_FRAME_END;
695dc859 776 sr_session_send(sdi, &packet);
ae88b97b 777
269971dd 778 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 779 /* Terminate session */
a3508e33 780 devc->dev_state = STOPPING;
ae88b97b 781 } else {
269971dd 782 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
783 }
784 }
3b533202
BV
785}
786
787static int handle_event(int fd, int revents, void *cb_data)
788{
a3508e33 789 const struct sr_dev_inst *sdi;
ae88b97b 790 struct sr_datafeed_packet packet;
3b533202 791 struct timeval tv;
4f840ce9 792 struct sr_dev_driver *di;
269971dd 793 struct dev_context *devc;
4f840ce9 794 struct drv_context *drvc;
ba7dd8bb 795 int num_channels;
6e6eeff4
BV
796 uint32_t trigger_offset;
797 uint8_t capturestate;
3b533202 798
3b533202
BV
799 (void)fd;
800 (void)revents;
801
269971dd 802 sdi = cb_data;
4f840ce9 803 di = sdi->driver;
41812aca 804 drvc = di->context;
269971dd 805 devc = sdi->priv;
a3508e33
BV
806 if (devc->dev_state == STOPPING) {
807 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
808 sr_dbg("Stopping acquisition.");
809 /*
810 * TODO: Doesn't really cancel pending transfers so they might
811 * come in after SR_DF_END is sent.
812 */
102f1239 813 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 814
bee2b016 815 std_session_send_df_end(sdi);
a3508e33
BV
816
817 devc->dev_state = IDLE;
818
819 return TRUE;
820 }
821
3b533202
BV
822 /* Always handle pending libusb events. */
823 tv.tv_sec = tv.tv_usec = 0;
d4abb463 824 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 825
3b533202 826 /* TODO: ugh */
269971dd 827 if (devc->dev_state == NEW_CAPTURE) {
c118080b 828 if (dso_capture_start(sdi) != SR_OK)
3b533202 829 return TRUE;
c118080b 830 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 831 return TRUE;
c118080b 832// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 833// return TRUE;
e98b7f1b 834 sr_dbg("Successfully requested next chunk.");
269971dd 835 devc->dev_state = CAPTURE;
3b533202
BV
836 return TRUE;
837 }
269971dd 838 if (devc->dev_state != CAPTURE)
3b533202
BV
839 return TRUE;
840
c118080b 841 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 842 return TRUE;
3b533202 843
e98b7f1b
UH
844 sr_dbg("Capturestate %d.", capturestate);
845 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
846 switch (capturestate) {
847 case CAPTURE_EMPTY:
269971dd
BV
848 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
849 devc->capture_empty_count = 0;
c118080b 850 if (dso_capture_start(sdi) != SR_OK)
3b533202 851 break;
c118080b 852 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 853 break;
c118080b 854// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 855// break;
e98b7f1b 856 sr_dbg("Successfully requested next chunk.");
3b533202
BV
857 }
858 break;
859 case CAPTURE_FILLING:
e98b7f1b 860 /* No data yet. */
3b533202
BV
861 break;
862 case CAPTURE_READY_8BIT:
e749a8cb 863 /* Remember where in the captured frame the trigger is. */
269971dd 864 devc->trigger_offset = trigger_offset;
e749a8cb 865
417412c8 866 num_channels = (devc->ch_enabled[0] && devc->ch_enabled[1]) ? 2 : 1;
a95f142e 867 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 868 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 869
3b533202 870 /* Tell the scope to send us the first frame. */
69e19dd7 871 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 872 break;
ae88b97b 873
e98b7f1b
UH
874 /*
875 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
876 * the data we just told the scope to send.
877 */
269971dd 878 devc->dev_state = FETCH_DATA;
ae88b97b
BV
879
880 /* Tell the frontend a new frame is on the way. */
881 packet.type = SR_DF_FRAME_BEGIN;
269971dd 882 sr_session_send(sdi, &packet);
3b533202
BV
883 break;
884 case CAPTURE_READY_9BIT:
885 /* TODO */
e98b7f1b 886 sr_err("Not yet supported.");
3b533202
BV
887 break;
888 case CAPTURE_TIMEOUT:
889 /* Doesn't matter, we'll try again next time. */
890 break;
891 default:
e98b7f1b
UH
892 sr_dbg("Unknown capture state: %d.", capturestate);
893 break;
3b533202
BV
894 }
895
896 return TRUE;
897}
898
695dc859 899static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 900{
269971dd 901 struct dev_context *devc;
4f840ce9 902 struct sr_dev_driver *di = sdi->driver;
41812aca 903 struct drv_context *drvc = di->context;
3b533202 904
269971dd 905 devc = sdi->priv;
3b533202 906
ba7dd8bb
UH
907 if (configure_channels(sdi) != SR_OK) {
908 sr_err("Failed to configure channels.");
014359e3
BV
909 return SR_ERR;
910 }
911
c118080b 912 if (dso_init(sdi) != SR_OK)
3b533202
BV
913 return SR_ERR;
914
c118080b 915 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
916 return SR_ERR;
917
269971dd 918 devc->dev_state = CAPTURE;
102f1239 919 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 920
bee2b016 921 std_session_send_df_header(sdi);
3b533202 922
3b533202
BV
923 return SR_OK;
924}
925
695dc859 926static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 927{
269971dd
BV
928 struct dev_context *devc;
929
a3508e33
BV
930 devc = sdi->priv;
931 devc->dev_state = STOPPING;
3b533202
BV
932
933 return SR_OK;
934}
935
dd5c48a6 936static struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
937 .name = "hantek-dso",
938 .longname = "Hantek DSO",
939 .api_version = 1,
c2fdcc25 940 .init = std_init,
700d6b64 941 .cleanup = std_cleanup,
6078d2c9 942 .scan = scan,
c01bf34c 943 .dev_list = std_dev_list,
3b412e3a 944 .dev_clear = dev_clear,
79917848 945 .config_get = config_get,
035a1078 946 .config_set = config_set,
a1c743fc 947 .config_list = config_list,
6078d2c9
UH
948 .dev_open = dev_open,
949 .dev_close = dev_close,
950 .dev_acquisition_start = dev_acquisition_start,
951 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 952 .context = NULL,
3b533202 953};
dd5c48a6 954SR_REGISTER_DEV_DRIVER(hantek_dso_driver_info);