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hantek-dso: dso2250: It's not HORIZ_TRIGGERPOS but CAPTURE_RATIO.
[libsigrok.git] / src / hardware / hantek-dso / api.c
CommitLineData
3b533202 1/*
50985c20 2 * This file is part of the libsigrok project.
3b533202
BV
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
417412c8 21#include <math.h>
3b533202
BV
22#include <stdio.h>
23#include <stdint.h>
24#include <stdlib.h>
25#include <sys/types.h>
26#include <sys/stat.h>
27#include <fcntl.h>
28#include <unistd.h>
29#include <string.h>
30#include <sys/time.h>
31#include <inttypes.h>
3b533202
BV
32#include <glib.h>
33#include <libusb.h>
c1aae900 34#include <libsigrok/libsigrok.h>
45c59c8b 35#include "libsigrok-internal.h"
caeb8d7a 36#include "protocol.h"
3b533202 37
fc8fe3e3
BV
38/* Max time in ms before we want to check on USB events */
39/* TODO tune this properly */
e98b7f1b 40#define TICK 1
3b533202 41
d9251a2c
UH
42#define NUM_TIMEBASE 10
43#define NUM_VDIV 8
79917848 44
07ffa5b3
UH
45#define NUM_BUFFER_SIZES 2
46
584560f1 47static const uint32_t scanopts[] = {
624f5b4c
BV
48 SR_CONF_CONN,
49};
50
5ecd9049 51static const uint32_t drvopts[] = {
1953564a 52 SR_CONF_OSCILLOSCOPE,
933defaa
BV
53};
54
5ecd9049 55static const uint32_t devopts[] = {
e91bb0a6 56 SR_CONF_CONTINUOUS,
933defaa 57 SR_CONF_CONN | SR_CONF_GET,
86621306 58 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
933defaa 59 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 60 SR_CONF_NUM_HDIV | SR_CONF_GET,
95983cc3 61 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
933defaa
BV
62 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET,
86621306 64 SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3b2b7031 65 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 66 SR_CONF_NUM_VDIV | SR_CONF_GET,
3b533202
BV
67};
68
933defaa 69static const uint32_t devopts_cg[] = {
933defaa
BV
70 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
71 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 72 SR_CONF_FILTER | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
933defaa
BV
73};
74
ba7dd8bb 75static const char *channel_names[] = {
78693401 76 "CH1", "CH2",
3b533202
BV
77};
78
034accb5 79static const uint64_t buffersizes_32k[] = {
1a46cc62 80 (10 * 1024), (32 * 1024),
034accb5
BV
81};
82static const uint64_t buffersizes_512k[] = {
1a46cc62 83 (10 * 1024), (512 * 1024),
034accb5
BV
84};
85static const uint64_t buffersizes_14k[] = {
1a46cc62 86 (10 * 1024), (14 * 1024),
034accb5
BV
87};
88
62bb8840 89static const struct dso_profile dev_profiles[] = {
88a13f30 90 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 91 "Hantek", "DSO-2090",
034accb5 92 buffersizes_32k,
8e2d6c9d 93 "hantek-dso-2090.fw" },
88a13f30
BV
94 { 0x04b4, 0x2150, 0x04b5, 0x2150,
95 "Hantek", "DSO-2150",
034accb5 96 buffersizes_32k,
8e2d6c9d 97 "hantek-dso-2150.fw" },
88a13f30
BV
98 { 0x04b4, 0x2250, 0x04b5, 0x2250,
99 "Hantek", "DSO-2250",
034accb5 100 buffersizes_512k,
8e2d6c9d 101 "hantek-dso-2250.fw" },
88a13f30
BV
102 { 0x04b4, 0x5200, 0x04b5, 0x5200,
103 "Hantek", "DSO-5200",
034accb5 104 buffersizes_14k,
8e2d6c9d 105 "hantek-dso-5200.fw" },
88a13f30
BV
106 { 0x04b4, 0x520a, 0x04b5, 0x520a,
107 "Hantek", "DSO-5200A",
034accb5 108 buffersizes_512k,
8e2d6c9d 109 "hantek-dso-5200A.fw" },
1b4aedc0 110 ALL_ZERO
a370ef19
BV
111};
112
86bb3f4a 113static const uint64_t timebases[][2] = {
a370ef19
BV
114 /* microseconds */
115 { 10, 1000000 },
116 { 20, 1000000 },
117 { 40, 1000000 },
118 { 100, 1000000 },
119 { 200, 1000000 },
120 { 400, 1000000 },
121 /* milliseconds */
122 { 1, 1000 },
123 { 2, 1000 },
124 { 4, 1000 },
125 { 10, 1000 },
126 { 20, 1000 },
127 { 40, 1000 },
128 { 100, 1000 },
129 { 200, 1000 },
130 { 400, 1000 },
a370ef19
BV
131};
132
11e33196
PM
133static const uint64_t samplerates[] = {
134 SR_KHZ(20),
135 SR_KHZ(25),
136 SR_KHZ(50),
137 SR_KHZ(100),
138 SR_KHZ(200),
139 SR_KHZ(250),
140 SR_KHZ(500),
141 SR_MHZ(1),
142 SR_MHZ(2),
143 SR_MHZ(5),
144 SR_MHZ(10),
145 SR_MHZ(20),
146 SR_MHZ(25),
147 SR_MHZ(50),
148 SR_MHZ(100),
149 SR_MHZ(125),
150 /* fast mode not supported yet
151 SR_MHZ(200),
152 SR_MHZ(250), */
153};
154
86bb3f4a 155static const uint64_t vdivs[][2] = {
313deed2
BV
156 /* millivolts */
157 { 10, 1000 },
158 { 20, 1000 },
159 { 50, 1000 },
160 { 100, 1000 },
161 { 200, 1000 },
162 { 500, 1000 },
163 /* volts */
164 { 1, 1 },
165 { 2, 1 },
166 { 5, 1 },
313deed2
BV
167};
168
62bb8840 169static const char *trigger_sources[] = {
f8195cb2 170 "CH1", "CH2", "EXT",
88a13f30 171 /* TODO: forced */
a370ef19 172};
3b533202 173
933defaa 174static const char *trigger_slopes[] = {
f8195cb2 175 "r", "f",
ebb781a6
BV
176};
177
62bb8840 178static const char *coupling[] = {
f8195cb2 179 "AC", "DC", "GND",
b58fbd99
BV
180};
181
15a5bfe4 182static struct sr_dev_inst *dso_dev_new(const struct dso_profile *prof)
3b533202
BV
183{
184 struct sr_dev_inst *sdi;
ba7dd8bb 185 struct sr_channel *ch;
933defaa 186 struct sr_channel_group *cg;
269971dd 187 struct dev_context *devc;
dcd438ee 188 unsigned int i;
3b533202 189
aac29cc1 190 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
191 sdi->status = SR_ST_INITIALIZING;
192 sdi->vendor = g_strdup(prof->vendor);
193 sdi->model = g_strdup(prof->model);
3b533202 194
e98b7f1b 195 /*
ba7dd8bb 196 * Add only the real channels -- EXT isn't a source of data, only
87ca93c5
BV
197 * a trigger source internal to the device.
198 */
0f34cb47 199 for (i = 0; i < ARRAY_SIZE(channel_names); i++) {
5e23fcab 200 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_names[i]);
933defaa
BV
201 cg = g_malloc0(sizeof(struct sr_channel_group));
202 cg->name = g_strdup(channel_names[i]);
203 cg->channels = g_slist_append(cg->channels, ch);
204 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
87ca93c5
BV
205 }
206
933defaa 207 devc = g_malloc0(sizeof(struct dev_context));
269971dd
BV
208 devc->profile = prof;
209 devc->dev_state = IDLE;
210 devc->timebase = DEFAULT_TIMEBASE;
11e33196 211 devc->samplerate = DEFAULT_SAMPLERATE;
417412c8
AJ
212 devc->ch_enabled[0] = TRUE;
213 devc->ch_enabled[1] = TRUE;
933defaa
BV
214 devc->voltage[0] = DEFAULT_VOLTAGE;
215 devc->voltage[1] = DEFAULT_VOLTAGE;
216 devc->coupling[0] = DEFAULT_COUPLING;
217 devc->coupling[1] = DEFAULT_COUPLING;
269971dd
BV
218 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
219 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
220 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
221 devc->framesize = DEFAULT_FRAMESIZE;
222 devc->triggerslope = SLOPE_POSITIVE;
223 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
95983cc3 224 devc->capture_ratio = DEFAULT_CAPTURE_RATIO;
269971dd 225 sdi->priv = devc;
3b533202
BV
226
227 return sdi;
228}
229
ba7dd8bb 230static int configure_channels(const struct sr_dev_inst *sdi)
3b533202 231{
014359e3 232 struct dev_context *devc;
ba7dd8bb 233 struct sr_channel *ch;
62bb8840 234 const GSList *l;
69e19dd7 235 int p;
3b533202 236
014359e3
BV
237 devc = sdi->priv;
238
ba7dd8bb 239 g_slist_free(devc->enabled_channels);
417412c8 240 devc->ch_enabled[0] = devc->ch_enabled[1] = FALSE;
ba7dd8bb
UH
241 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
242 ch = l->data;
69e19dd7 243 if (p == 0)
417412c8 244 devc->ch_enabled[0] = ch->enabled;
69e19dd7 245 else
417412c8 246 devc->ch_enabled[1] = ch->enabled;
ba7dd8bb
UH
247 if (ch->enabled)
248 devc->enabled_channels = g_slist_append(devc->enabled_channels, ch);
3b533202
BV
249 }
250
251 return SR_OK;
252}
253
3553451f 254static void clear_helper(struct dev_context *devc)
39cfdd75 255{
949b3dc0 256 g_free(devc->triggersource);
ba7dd8bb 257 g_slist_free(devc->enabled_channels);
949b3dc0 258}
39cfdd75 259
4f840ce9 260static int dev_clear(const struct sr_dev_driver *di)
949b3dc0 261{
3553451f 262 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
39cfdd75
BV
263}
264
4f840ce9 265static GSList *scan(struct sr_dev_driver *di, GSList *options)
3b533202 266{
269971dd
BV
267 struct drv_context *drvc;
268 struct dev_context *devc;
294dbac7 269 struct sr_dev_inst *sdi;
46a743c1
BV
270 struct sr_usb_dev_inst *usb;
271 struct sr_config *src;
294dbac7
BV
272 const struct dso_profile *prof;
273 GSList *l, *devices, *conn_devices;
39cfdd75 274 struct libusb_device_descriptor des;
3b533202 275 libusb_device **devlist;
2a8f2d41 276 int i, j;
46a743c1 277 const char *conn;
395206f4 278 char connection_id[64];
e98b7f1b 279
41812aca 280 drvc = di->context;
39cfdd75 281
4b97c74e
UH
282 devices = 0;
283
294dbac7
BV
284 conn = NULL;
285 for (l = options; l; l = l->next) {
286 src = l->data;
287 if (src->key == SR_CONF_CONN) {
288 conn = g_variant_get_string(src->data, NULL);
289 break;
290 }
291 }
292 if (conn)
293 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
294 else
295 conn_devices = NULL;
296
39cfdd75 297 /* Find all Hantek DSO devices and upload firmware to all of them. */
d4abb463 298 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
3b533202 299 for (i = 0; devlist[i]; i++) {
46a743c1 300 if (conn) {
294dbac7
BV
301 usb = NULL;
302 for (l = conn_devices; l; l = l->next) {
303 usb = l->data;
304 if (usb->bus == libusb_get_bus_number(devlist[i])
305 && usb->address == libusb_get_device_address(devlist[i]))
306 break;
307 }
308 if (!l)
309 /* This device matched none of the ones that
310 * matched the conn specification. */
311 continue;
46a743c1 312 }
294dbac7 313
2a8f2d41 314 libusb_get_device_descriptor(devlist[i], &des);
3b533202 315
395206f4
SA
316 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
317
3b533202
BV
318 prof = NULL;
319 for (j = 0; dev_profiles[j].orig_vid; j++) {
320 if (des.idVendor == dev_profiles[j].orig_vid
321 && des.idProduct == dev_profiles[j].orig_pid) {
322 /* Device matches the pre-firmware profile. */
323 prof = &dev_profiles[j];
e98b7f1b 324 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 325 sdi = dso_dev_new(prof);
395206f4 326 sdi->connection_id = g_strdup(connection_id);
39cfdd75 327 devices = g_slist_append(devices, sdi);
269971dd 328 devc = sdi->priv;
8e2d6c9d
DE
329 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
330 USB_CONFIGURATION, prof->firmware) == SR_OK)
3b533202 331 /* Remember when the firmware on this device was updated */
269971dd 332 devc->fw_updated = g_get_monotonic_time();
3b533202 333 else
395206f4 334 sr_err("Firmware upload failed");
3b533202 335 /* Dummy USB address of 0xff will get overwritten later. */
c118080b 336 sdi->conn = sr_usb_dev_inst_new(
3b533202 337 libusb_get_bus_number(devlist[i]), 0xff, NULL);
3b533202
BV
338 break;
339 } else if (des.idVendor == dev_profiles[j].fw_vid
340 && des.idProduct == dev_profiles[j].fw_pid) {
341 /* Device matches the post-firmware profile. */
342 prof = &dev_profiles[j];
e98b7f1b 343 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
15a5bfe4 344 sdi = dso_dev_new(prof);
395206f4 345 sdi->connection_id = g_strdup(connection_id);
3b533202 346 sdi->status = SR_ST_INACTIVE;
39cfdd75 347 devices = g_slist_append(devices, sdi);
d0eec1ee 348 sdi->inst_type = SR_INST_USB;
c118080b 349 sdi->conn = sr_usb_dev_inst_new(
3b533202
BV
350 libusb_get_bus_number(devlist[i]),
351 libusb_get_device_address(devlist[i]), NULL);
3b533202
BV
352 break;
353 }
354 }
355 if (!prof)
356 /* not a supported VID/PID */
357 continue;
358 }
359 libusb_free_device_list(devlist, 1);
360
15a5bfe4 361 return std_scan_complete(di, devices);
3b533202
BV
362}
363
6078d2c9 364static int dev_open(struct sr_dev_inst *sdi)
3b533202 365{
269971dd 366 struct dev_context *devc;
c118080b 367 struct sr_usb_dev_inst *usb;
fc8fe3e3
BV
368 int64_t timediff_us, timediff_ms;
369 int err;
3b533202 370
269971dd 371 devc = sdi->priv;
c118080b 372 usb = sdi->conn;
3b533202
BV
373
374 /*
e98b7f1b
UH
375 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
376 * for the FX2 to renumerate.
3b533202 377 */
fc8fe3e3 378 err = SR_ERR;
269971dd 379 if (devc->fw_updated > 0) {
e98b7f1b
UH
380 sr_info("Waiting for device to reset.");
381 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 382 g_usleep(300 * 1000);
fc8fe3e3
BV
383 timediff_ms = 0;
384 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 385 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
386 break;
387 g_usleep(100 * 1000);
269971dd 388 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 389 timediff_ms = timediff_us / 1000;
e98b7f1b 390 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 391 }
6433156c 392 sr_info("Device came back after %" PRIi64 " ms.", timediff_ms);
3b533202 393 } else {
25a0f108 394 err = dso_open(sdi);
3b533202
BV
395 }
396
397 if (err != SR_OK) {
e98b7f1b 398 sr_err("Unable to open device.");
3b533202
BV
399 return SR_ERR;
400 }
401
c118080b 402 err = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
3b533202 403 if (err != 0) {
d4928d71 404 sr_err("Unable to claim interface: %s.",
d9251a2c 405 libusb_error_name(err));
3b533202
BV
406 return SR_ERR;
407 }
408
409 return SR_OK;
410}
411
6078d2c9 412static int dev_close(struct sr_dev_inst *sdi)
3b533202 413{
3b533202
BV
414 dso_close(sdi);
415
416 return SR_OK;
417}
418
dd7a72ea
UH
419static int config_get(uint32_t key, GVariant **data,
420 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
79917848 421{
933defaa 422 struct dev_context *devc;
624f5b4c 423 struct sr_usb_dev_inst *usb;
2c240774 424 const char *s;
933defaa
BV
425 const uint64_t *vdiv;
426 int ch_idx;
79917848 427
584560f1 428 switch (key) {
bf622e6d 429 case SR_CONF_NUM_HDIV:
79917848
BV
430 *data = g_variant_new_int32(NUM_TIMEBASE);
431 break;
432 case SR_CONF_NUM_VDIV:
433 *data = g_variant_new_int32(NUM_VDIV);
434 break;
933defaa
BV
435 }
436
437 if (!sdi)
438 return SR_ERR_ARG;
439
440 devc = sdi->priv;
441 if (!cg) {
442 switch (key) {
443 case SR_CONF_CONN:
444 if (!sdi->conn)
445 return SR_ERR_ARG;
446 usb = sdi->conn;
447 if (usb->address == 255)
448 /* Device still needs to re-enumerate after firmware
449 * upload, so we don't know its (future) address. */
450 return SR_ERR;
95c1fe62 451 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
933defaa
BV
452 break;
453 case SR_CONF_TIMEBASE:
454 *data = g_variant_new("(tt)", timebases[devc->timebase][0],
455 timebases[devc->timebase][1]);
456 break;
3b2b7031 457 case SR_CONF_SAMPLERATE:
11e33196 458 *data = g_variant_new_uint64(devc->samplerate);
3b2b7031 459 break;
933defaa
BV
460 case SR_CONF_BUFFERSIZE:
461 *data = g_variant_new_uint64(devc->framesize);
462 break;
463 case SR_CONF_TRIGGER_SOURCE:
464 *data = g_variant_new_string(devc->triggersource);
465 break;
466 case SR_CONF_TRIGGER_SLOPE:
c442ffda 467 s = (devc->triggerslope == SLOPE_POSITIVE) ? "r" : "f";
933defaa
BV
468 *data = g_variant_new_string(s);
469 break;
95983cc3
PM
470 case SR_CONF_CAPTURE_RATIO:
471 *data = g_variant_new_uint64(devc->capture_ratio);
933defaa
BV
472 break;
473 default:
474 return SR_ERR_NA;
475 }
476 } else {
477 if (sdi->channel_groups->data == cg)
478 ch_idx = 0;
479 else if (sdi->channel_groups->next->data == cg)
480 ch_idx = 1;
481 else
482 return SR_ERR_ARG;
0c5f2abc 483 switch (key) {
933defaa
BV
484 case SR_CONF_FILTER:
485 *data = g_variant_new_boolean(devc->filter[ch_idx]);
486 break;
487 case SR_CONF_VDIV:
488 vdiv = vdivs[devc->voltage[ch_idx]];
489 *data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
490 break;
491 case SR_CONF_COUPLING:
492 *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
493 break;
494 }
79917848
BV
495 }
496
497 return SR_OK;
498}
499
dd7a72ea
UH
500static int config_set(uint32_t key, GVariant *data,
501 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
3b533202 502{
269971dd 503 struct dev_context *devc;
95983cc3 504 int rat;
697fb6dd 505 int ch_idx, idx;
8f996b89 506
269971dd 507 devc = sdi->priv;
933defaa
BV
508 if (!cg) {
509 switch (key) {
510 case SR_CONF_LIMIT_FRAMES:
511 devc->limit_frames = g_variant_get_uint64(data);
512 break;
513 case SR_CONF_TRIGGER_SLOPE:
697fb6dd 514 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
933defaa 515 return SR_ERR_ARG;
db85496e 516 devc->triggerslope = idx;
933defaa 517 break;
95983cc3
PM
518 case SR_CONF_CAPTURE_RATIO:
519 rat = g_variant_get_uint64(data);
520 if (rat < 0 || rat > 100) {
521 sr_err("Capture ratio must be in [0,100].");
a9010323 522 return SR_ERR_ARG;
933defaa 523 } else
95983cc3 524 devc->capture_ratio = rat;
933defaa
BV
525 break;
526 case SR_CONF_BUFFERSIZE:
697fb6dd 527 if ((idx = std_u64_idx(data, devc->profile->buffersizes, NUM_BUFFER_SIZES)) < 0)
a9010323 528 return SR_ERR_ARG;
697fb6dd 529 devc->framesize = devc->profile->buffersizes[idx];
933defaa
BV
530 break;
531 case SR_CONF_TIMEBASE:
697fb6dd 532 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(timebases))) < 0)
a9010323 533 return SR_ERR_ARG;
697fb6dd 534 devc->timebase = idx;
933defaa 535 break;
11e33196
PM
536 case SR_CONF_SAMPLERATE:
537 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(samplerates))) < 0)
538 return SR_ERR_ARG;
539 devc->samplerate = samplerates[idx];
540 if (dso_set_trigger_samplerate(sdi) != SR_OK)
541 return SR_ERR;
95983cc3 542 sr_dbg("got new sample rate %d, idx %d", devc->samplerate, idx);
11e33196 543 break;
933defaa 544 case SR_CONF_TRIGGER_SOURCE:
697fb6dd 545 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_sources))) < 0)
a9010323 546 return SR_ERR_ARG;
697fb6dd 547 devc->triggersource = g_strdup(trigger_sources[idx]);
933defaa
BV
548 break;
549 default:
a9010323 550 return SR_ERR_NA;
ebb781a6 551 }
933defaa
BV
552 } else {
553 if (sdi->channel_groups->data == cg)
554 ch_idx = 0;
555 else if (sdi->channel_groups->next->data == cg)
556 ch_idx = 1;
557 else
558 return SR_ERR_ARG;
559 switch (key) {
560 case SR_CONF_FILTER:
561 devc->filter[ch_idx] = g_variant_get_boolean(data);
562 break;
563 case SR_CONF_VDIV:
697fb6dd 564 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
a9010323 565 return SR_ERR_ARG;
697fb6dd 566 devc->voltage[ch_idx] = idx;
933defaa
BV
567 break;
568 case SR_CONF_COUPLING:
697fb6dd 569 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
a9010323 570 return SR_ERR_ARG;
697fb6dd 571 devc->coupling[ch_idx] = idx;
933defaa
BV
572 break;
573 default:
a9010323 574 return SR_ERR_NA;
b58fbd99 575 }
3b533202
BV
576 }
577
a9010323 578 return SR_OK;
3b533202
BV
579}
580
dd7a72ea
UH
581static int config_list(uint32_t key, GVariant **data,
582 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 583{
034accb5 584 struct dev_context *devc;
a1c743fc 585
933defaa 586 if (!cg) {
93b118da 587 switch (key) {
e66d1892 588 case SR_CONF_SCAN_OPTIONS:
933defaa 589 case SR_CONF_DEVICE_OPTIONS:
e66d1892 590 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
933defaa
BV
591 case SR_CONF_BUFFERSIZE:
592 if (!sdi)
593 return SR_ERR_ARG;
594 devc = sdi->priv;
105df674 595 *data = std_gvar_array_u64(devc->profile->buffersizes, NUM_BUFFER_SIZES);
933defaa 596 break;
11e33196
PM
597 case SR_CONF_SAMPLERATE:
598 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
599 break;
933defaa 600 case SR_CONF_TIMEBASE:
58ffcf97 601 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(timebases));
933defaa
BV
602 break;
603 case SR_CONF_TRIGGER_SOURCE:
53012da6 604 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_sources));
933defaa
BV
605 break;
606 case SR_CONF_TRIGGER_SLOPE:
53012da6 607 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
933defaa
BV
608 break;
609 default:
610 return SR_ERR_NA;
3973ee26 611 }
933defaa 612 } else {
93b118da 613 switch (key) {
933defaa 614 case SR_CONF_DEVICE_OPTIONS:
53012da6 615 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg));
933defaa
BV
616 break;
617 case SR_CONF_COUPLING:
53012da6 618 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
933defaa
BV
619 break;
620 case SR_CONF_VDIV:
58ffcf97 621 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(vdivs));
933defaa
BV
622 break;
623 default:
624 return SR_ERR_NA;
3973ee26 625 }
a1c743fc
BV
626 }
627
628 return SR_OK;
629}
630
69e19dd7 631static void send_chunk(struct sr_dev_inst *sdi, unsigned char *buf,
e749a8cb 632 int num_samples)
3b533202
BV
633{
634 struct sr_datafeed_packet packet;
ae7d8a58
UH
635 struct sr_datafeed_analog analog;
636 struct sr_analog_encoding encoding;
637 struct sr_analog_meaning meaning;
638 struct sr_analog_spec spec;
417412c8
AJ
639 struct dev_context *devc = sdi->priv;
640 GSList *channels = devc->enabled_channels;
3b533202 641
ae7d8a58 642 packet.type = SR_DF_ANALOG;
3b533202 643 packet.payload = &analog;
6e71ef3b 644 /* TODO: support for 5xxx series 9-bit samples */
ae7d8a58 645 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
e749a8cb 646 analog.num_samples = num_samples;
ae7d8a58
UH
647 analog.meaning->mq = SR_MQ_VOLTAGE;
648 analog.meaning->unit = SR_UNIT_VOLT;
649 analog.meaning->mqflags = 0;
886a52b6 650 /* TODO: Check malloc return value. */
417412c8
AJ
651 analog.data = g_try_malloc(num_samples * sizeof(float));
652
b3fd0993 653 for (int ch = 0; ch < NUM_CHANNELS; ch++) {
417412c8
AJ
654 if (!devc->ch_enabled[ch])
655 continue;
656
657 float range = ((float)vdivs[devc->voltage[ch]][0] / vdivs[devc->voltage[ch]][1]) * 8;
658 float vdivlog = log10f(range / 255);
659 int digits = -(int)vdivlog + (vdivlog < 0.0);
660 analog.encoding->digits = digits;
661 analog.spec->spec_digits = digits;
662 analog.meaning->channels = g_slist_append(NULL, channels->data);
663
664 for (int i = 0; i < num_samples; i++) {
665 /*
666 * The device always sends data for both channels. If a channel
667 * is disabled, it contains a copy of the enabled channel's
668 * data. However, we only send the requested channels to
669 * the bus.
670 *
671 * Voltage values are encoded as a value 0-255 (0-512 on the
672 * DSO-5200*), where the value is a point in the range
673 * represented by the vdiv setting. There are 8 vertical divs,
674 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
675 * and 255 = +2V.
676 */
677 /* TODO: Support for DSO-5xxx series 9-bit samples. */
678 ((float *)analog.data)[i] = range / 255 * *(buf + i * 2 + 1 - ch) - range / 2;
6e71ef3b 679 }
417412c8
AJ
680 sr_session_send(sdi, &packet);
681 g_slist_free(analog.meaning->channels);
682
683 channels = channels->next;
3b533202 684 }
1e6b5b93 685 g_free(analog.data);
e749a8cb
BV
686}
687
e98b7f1b
UH
688/*
689 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 690 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 691 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
692 * the libsigrok session bus.
693 */
55462b8b 694static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
e749a8cb
BV
695{
696 struct sr_datafeed_packet packet;
69e19dd7 697 struct sr_dev_inst *sdi;
269971dd 698 struct dev_context *devc;
e749a8cb
BV
699 int num_samples, pre;
700
69e19dd7
BV
701 sdi = transfer->user_data;
702 devc = sdi->priv;
eb8e6cd2
UH
703 sr_spew("receive_transfer(): status %s received %d bytes.",
704 libusb_error_name(transfer->status), transfer->actual_length);
e749a8cb
BV
705
706 if (transfer->actual_length == 0)
707 /* Nothing to send to the bus. */
708 return;
709
710 num_samples = transfer->actual_length / 2;
711
d4007311 712 sr_spew("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
d9251a2c 713 devc->samp_received + num_samples, devc->framesize);
e749a8cb 714
e98b7f1b
UH
715 /*
716 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
717 * doesn't represent the trigger point. The offset at which the trigger
718 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
719 * from there up the session bus. The samples in the frame buffer
720 * before that trigger point came after the end of the device's frame
721 * buffer was reached, and it wrapped around to overwrite up until the
722 * trigger point.
e749a8cb 723 */
269971dd 724 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 725 /* Trigger point not yet reached. */
269971dd 726 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 727 /* The entire chunk is before the trigger point. */
269971dd 728 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 729 transfer->buffer, num_samples * 2);
269971dd 730 devc->samp_buffered += num_samples;
e749a8cb 731 } else {
e98b7f1b
UH
732 /*
733 * This chunk hits or overruns the trigger point.
e749a8cb 734 * Store the part before the trigger fired, and
e98b7f1b
UH
735 * send the rest up to the session bus.
736 */
269971dd
BV
737 pre = devc->trigger_offset - devc->samp_received;
738 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 739 transfer->buffer, pre * 2);
269971dd 740 devc->samp_buffered += pre;
e749a8cb
BV
741
742 /* The rest of this chunk starts with the trigger point. */
e98b7f1b 743 sr_dbg("Reached trigger point, %d samples buffered.",
d9251a2c 744 devc->samp_buffered);
e749a8cb
BV
745
746 /* Avoid the corner case where the chunk ended at
747 * exactly the trigger point. */
748 if (num_samples > pre)
69e19dd7 749 send_chunk(sdi, transfer->buffer + pre * 2,
e749a8cb
BV
750 num_samples - pre);
751 }
752 } else {
753 /* Already past the trigger point, just send it all out. */
a95f142e 754 send_chunk(sdi, transfer->buffer, num_samples);
e749a8cb
BV
755 }
756
269971dd 757 devc->samp_received += num_samples;
e749a8cb
BV
758
759 /* Everything in this transfer was either copied to the buffer or
760 * sent to the session bus. */
3b533202
BV
761 g_free(transfer->buffer);
762 libusb_free_transfer(transfer);
3b533202 763
269971dd 764 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
765 /* That was the last chunk in this frame. Send the buffered
766 * pre-trigger samples out now, in one big chunk. */
e98b7f1b 767 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
d9251a2c 768 devc->samp_buffered);
69e19dd7 769 send_chunk(sdi, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
770
771 /* Mark the end of this frame. */
ae88b97b 772 packet.type = SR_DF_FRAME_END;
695dc859 773 sr_session_send(sdi, &packet);
ae88b97b 774
269971dd 775 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 776 /* Terminate session */
a3508e33 777 devc->dev_state = STOPPING;
ae88b97b 778 } else {
269971dd 779 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
780 }
781 }
3b533202
BV
782}
783
784static int handle_event(int fd, int revents, void *cb_data)
785{
a3508e33 786 const struct sr_dev_inst *sdi;
ae88b97b 787 struct sr_datafeed_packet packet;
3b533202 788 struct timeval tv;
4f840ce9 789 struct sr_dev_driver *di;
269971dd 790 struct dev_context *devc;
4f840ce9 791 struct drv_context *drvc;
ba7dd8bb 792 int num_channels;
6e6eeff4
BV
793 uint32_t trigger_offset;
794 uint8_t capturestate;
3b533202 795
3b533202
BV
796 (void)fd;
797 (void)revents;
798
269971dd 799 sdi = cb_data;
4f840ce9 800 di = sdi->driver;
41812aca 801 drvc = di->context;
269971dd 802 devc = sdi->priv;
a3508e33
BV
803 if (devc->dev_state == STOPPING) {
804 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
805 sr_dbg("Stopping acquisition.");
806 /*
807 * TODO: Doesn't really cancel pending transfers so they might
808 * come in after SR_DF_END is sent.
809 */
102f1239 810 usb_source_remove(sdi->session, drvc->sr_ctx);
a3508e33 811
bee2b016 812 std_session_send_df_end(sdi);
a3508e33
BV
813
814 devc->dev_state = IDLE;
815
816 return TRUE;
817 }
818
3b533202
BV
819 /* Always handle pending libusb events. */
820 tv.tv_sec = tv.tv_usec = 0;
d4abb463 821 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
3b533202 822
3b533202 823 /* TODO: ugh */
269971dd 824 if (devc->dev_state == NEW_CAPTURE) {
c118080b 825 if (dso_capture_start(sdi) != SR_OK)
3b533202 826 return TRUE;
c118080b 827 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 828 return TRUE;
c118080b 829// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 830// return TRUE;
e98b7f1b 831 sr_dbg("Successfully requested next chunk.");
269971dd 832 devc->dev_state = CAPTURE;
3b533202
BV
833 return TRUE;
834 }
269971dd 835 if (devc->dev_state != CAPTURE)
3b533202
BV
836 return TRUE;
837
c118080b 838 if ((dso_get_capturestate(sdi, &capturestate, &trigger_offset)) != SR_OK)
3b533202 839 return TRUE;
3b533202 840
e98b7f1b
UH
841 sr_dbg("Capturestate %d.", capturestate);
842 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
843 switch (capturestate) {
844 case CAPTURE_EMPTY:
269971dd
BV
845 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
846 devc->capture_empty_count = 0;
c118080b 847 if (dso_capture_start(sdi) != SR_OK)
3b533202 848 break;
c118080b 849 if (dso_enable_trigger(sdi) != SR_OK)
3b533202 850 break;
c118080b 851// if (dso_force_trigger(sdi) != SR_OK)
a370ef19 852// break;
e98b7f1b 853 sr_dbg("Successfully requested next chunk.");
3b533202
BV
854 }
855 break;
856 case CAPTURE_FILLING:
e98b7f1b 857 /* No data yet. */
3b533202
BV
858 break;
859 case CAPTURE_READY_8BIT:
87f56d01 860 case CAPTURE_READY2250:
e749a8cb 861 /* Remember where in the captured frame the trigger is. */
269971dd 862 devc->trigger_offset = trigger_offset;
e749a8cb 863
417412c8 864 num_channels = (devc->ch_enabled[0] && devc->ch_enabled[1]) ? 2 : 1;
a95f142e 865 devc->framebuf = g_malloc(devc->framesize * num_channels * 2);
269971dd 866 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 867
3b533202 868 /* Tell the scope to send us the first frame. */
69e19dd7 869 if (dso_get_channeldata(sdi, receive_transfer) != SR_OK)
3b533202 870 break;
ae88b97b 871
e98b7f1b
UH
872 /*
873 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
874 * the data we just told the scope to send.
875 */
269971dd 876 devc->dev_state = FETCH_DATA;
ae88b97b
BV
877
878 /* Tell the frontend a new frame is on the way. */
879 packet.type = SR_DF_FRAME_BEGIN;
269971dd 880 sr_session_send(sdi, &packet);
3b533202
BV
881 break;
882 case CAPTURE_READY_9BIT:
883 /* TODO */
e98b7f1b 884 sr_err("Not yet supported.");
3b533202
BV
885 break;
886 case CAPTURE_TIMEOUT:
887 /* Doesn't matter, we'll try again next time. */
888 break;
889 default:
e98b7f1b
UH
890 sr_dbg("Unknown capture state: %d.", capturestate);
891 break;
3b533202
BV
892 }
893
894 return TRUE;
895}
896
695dc859 897static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3b533202 898{
269971dd 899 struct dev_context *devc;
4f840ce9 900 struct sr_dev_driver *di = sdi->driver;
41812aca 901 struct drv_context *drvc = di->context;
3b533202 902
269971dd 903 devc = sdi->priv;
3b533202 904
ba7dd8bb
UH
905 if (configure_channels(sdi) != SR_OK) {
906 sr_err("Failed to configure channels.");
014359e3
BV
907 return SR_ERR;
908 }
909
c118080b 910 if (dso_init(sdi) != SR_OK)
3b533202
BV
911 return SR_ERR;
912
c118080b 913 if (dso_capture_start(sdi) != SR_OK)
3b533202
BV
914 return SR_ERR;
915
269971dd 916 devc->dev_state = CAPTURE;
102f1239 917 usb_source_add(sdi->session, drvc->sr_ctx, TICK, handle_event, (void *)sdi);
3b533202 918
bee2b016 919 std_session_send_df_header(sdi);
3b533202 920
3b533202
BV
921 return SR_OK;
922}
923
695dc859 924static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3b533202 925{
269971dd
BV
926 struct dev_context *devc;
927
a3508e33
BV
928 devc = sdi->priv;
929 devc->dev_state = STOPPING;
3b533202
BV
930
931 return SR_OK;
932}
933
dd5c48a6 934static struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
935 .name = "hantek-dso",
936 .longname = "Hantek DSO",
937 .api_version = 1,
c2fdcc25 938 .init = std_init,
700d6b64 939 .cleanup = std_cleanup,
6078d2c9 940 .scan = scan,
c01bf34c 941 .dev_list = std_dev_list,
3b412e3a 942 .dev_clear = dev_clear,
79917848 943 .config_get = config_get,
035a1078 944 .config_set = config_set,
a1c743fc 945 .config_list = config_list,
6078d2c9
UH
946 .dev_open = dev_open,
947 .dev_close = dev_close,
948 .dev_acquisition_start = dev_acquisition_start,
949 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 950 .context = NULL,
3b533202 951};
dd5c48a6 952SR_REGISTER_DEV_DRIVER(hantek_dso_driver_info);