]> sigrok.org Git - libsigrok.git/blame - src/hardware/devantech-eth008/protocol.h
devantech-eth008: first driver implementation, relay output only
[libsigrok.git] / src / hardware / devantech-eth008 / protocol.h
CommitLineData
c12ca361
GS
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2023 Gerhard Sittig <gerhard.sittig@gmx.net>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef LIBSIGROK_HARDWARE_DEVANTECH_ETH008_PROTOCOL_H
21#define LIBSIGROK_HARDWARE_DEVANTECH_ETH008_PROTOCOL_H
22
c12ca361
GS
23#include <glib.h>
24#include <libsigrok/libsigrok.h>
8712c783
GS
25#include <stdint.h>
26
c12ca361
GS
27#include "libsigrok-internal.h"
28
29#define LOG_PREFIX "devantech-eth008"
30
8712c783
GS
31/*
32 * Models have differing capabilities, and slightly different protocol
33 * variants. Setting the output state of individual relays usually takes
34 * one byte which carries the channel number. Requests are of identical
35 * length. Getting relay state takes a variable number of bytes to carry
36 * the bit fields. Response length depends on the model's relay count.
37 * As does request length for setting the state of several relays at the
38 * same time.
39 *
40 * Some models have digital inputs and analog inputs. These features
41 * currently are not supported in this implementation.
42 */
43struct devantech_eth008_model {
44 uint8_t code;
45 const char *name;
46 size_t ch_count_do;
47 uint8_t min_serno_fw;
48 size_t width_do;
49};
50
51enum devantech_eth008_channel_type {
52 DV_CH_DIGITAL_OUTPUT,
53 DV_CH_SUPPLY_VOLTAGE,
54};
55
56struct channel_group_context {
57 size_t index;
58 size_t number;
59 enum devantech_eth008_channel_type ch_type;
60};
61
c12ca361 62struct dev_context {
8712c783
GS
63 uint8_t model_code, hardware_version, firmware_version;
64 const struct devantech_eth008_model *model;
65 uint32_t mask_do;
66 uint32_t curr_do;
c12ca361
GS
67};
68
8712c783
GS
69SR_PRIV int devantech_eth008_get_model(struct sr_serial_dev_inst *serial,
70 uint8_t *model_code, uint8_t *hw_version, uint8_t *fw_version);
71SR_PRIV int devantech_eth008_get_serno(struct sr_serial_dev_inst *serial,
72 char *text_buffer, size_t text_length);
73SR_PRIV int devantech_eth008_cache_state(const struct sr_dev_inst *sdi);
74SR_PRIV int devantech_eth008_query_do(const struct sr_dev_inst *sdi,
75 const struct sr_channel_group *cg, gboolean *on);
76SR_PRIV int devantech_eth008_setup_do(const struct sr_dev_inst *sdi,
77 const struct sr_channel_group *cg, gboolean on);
78SR_PRIV int devantech_eth008_query_supply(const struct sr_dev_inst *sdi,
79 const struct sr_channel_group *cg, uint16_t *millivolts);
c12ca361
GS
80
81#endif