]> sigrok.org Git - libsigrok.git/blame - src/hardware/atten-pps3xxx/api.c
drivers: Add and use STD_CONFIG_LIST().
[libsigrok.git] / src / hardware / atten-pps3xxx / api.c
CommitLineData
fa0d6afe
BV
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
33c40990 21#include <string.h>
fa0d6afe
BV
22#include "protocol.h"
23
33c40990
BV
24/*
25 * The default serial communication settings on the device are 9600
26 * baud, 9 data bits. The 9th bit isn't actually used, and the vendor
27 * software uses Mark parity to absorb the extra bit.
28 *
29 * Since 9 data bits is not a standard available in POSIX, we use two
30 * stop bits to skip over the extra bit instead.
31 */
32#define SERIALCOMM "9600/8n2"
33
584560f1 34static const uint32_t scanopts[] = {
33c40990
BV
35 SR_CONF_CONN,
36 SR_CONF_SERIALCOMM,
37};
38
1f889afd 39static const uint32_t drvopts[] = {
33c40990 40 SR_CONF_POWER_SUPPLY,
d6fa8ace
BV
41};
42
1f889afd 43static const uint32_t devopts[] = {
e91bb0a6 44 SR_CONF_CONTINUOUS,
7a0b98b5 45 SR_CONF_CHANNEL_CONFIG | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 46 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
33c40990
BV
47};
48
584560f1 49static const uint32_t devopts_cg[] = {
7a0b98b5
AJ
50 SR_CONF_VOLTAGE | SR_CONF_GET,
51 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_CURRENT | SR_CONF_GET,
53 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
33c40990
BV
55};
56
57static const char *channel_modes[] = {
58 "Independent",
59 "Series",
60 "Parallel",
61};
62
329733d9 63static const struct pps_model models[] = {
33c40990
BV
64 { PPS_3203T_3S, "PPS3203T-3S",
65 CHANMODE_INDEPENDENT | CHANMODE_SERIES | CHANMODE_PARALLEL,
66 3,
67 {
68 /* Channel 1 */
69 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
70 /* Channel 2 */
71 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
72 /* Channel 3 */
73 { { 0, 6, 0.01 }, { 0, 3, 0.001 } },
74 },
75 },
76};
77
4f840ce9 78static GSList *scan(struct sr_dev_driver *di, GSList *options, int modelid)
fa0d6afe 79{
33c40990 80 struct sr_dev_inst *sdi;
33c40990
BV
81 struct dev_context *devc;
82 struct sr_config *src;
ba7dd8bb 83 struct sr_channel *ch;
40fd0264 84 struct sr_channel_group *cg;
33c40990 85 struct sr_serial_dev_inst *serial;
43376f33 86 GSList *l;
329733d9 87 const struct pps_model *model;
33c40990
BV
88 uint8_t packet[PACKET_SIZE];
89 unsigned int i;
2eb1612d 90 int delay_ms, ret;
33c40990
BV
91 const char *conn, *serialcomm;
92 char channel[10];
fa0d6afe 93
33c40990
BV
94 conn = serialcomm = NULL;
95 for (l = options; l; l = l->next) {
96 src = l->data;
97 switch (src->key) {
98 case SR_CONF_CONN:
99 conn = g_variant_get_string(src->data, NULL);
100 break;
101 case SR_CONF_SERIALCOMM:
102 serialcomm = g_variant_get_string(src->data, NULL);
103 break;
104 }
105 }
106 if (!conn)
107 return NULL;
108 if (!serialcomm)
109 serialcomm = SERIALCOMM;
110
91219afc 111 serial = sr_serial_dev_inst_new(conn, serialcomm);
33c40990 112
5305266a 113 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
33c40990 114 return NULL;
91219afc 115
33c40990
BV
116 serial_flush(serial);
117
945cfd4f 118 /* This is how the vendor software scans for hardware. */
33c40990
BV
119 memset(packet, 0, PACKET_SIZE);
120 packet[0] = 0xaa;
121 packet[1] = 0xaa;
2eb1612d
BV
122 delay_ms = serial_timeout(serial, PACKET_SIZE);
123 if (serial_write_blocking(serial, packet, PACKET_SIZE, delay_ms) < PACKET_SIZE) {
081c214e 124 sr_err("Unable to write while probing for hardware.");
33c40990
BV
125 return NULL;
126 }
127 /* The device responds with a 24-byte packet when it receives a packet.
128 * At 9600 baud, 300ms is long enough for it to have arrived. */
129 g_usleep(300 * 1000);
130 memset(packet, 0, PACKET_SIZE);
131 if ((ret = serial_read_nonblocking(serial, packet, PACKET_SIZE)) < 0) {
132 sr_err("Unable to read while probing for hardware: %s",
8d522801 133 sr_strerror(ret));
33c40990
BV
134 return NULL;
135 }
136 if (ret != PACKET_SIZE || packet[0] != 0xaa || packet[1] != 0xaa) {
137 /* Doesn't look like an Atten PPS. */
138 return NULL;
139 }
140
141 model = NULL;
142 for (i = 0; i < ARRAY_SIZE(models); i++) {
143 if (models[i].modelid == modelid) {
144 model = &models[i];
145 break;
146 }
147 }
148 if (!model) {
149 sr_err("Unknown modelid %d", modelid);
150 return NULL;
151 }
152
aac29cc1 153 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
154 sdi->status = SR_ST_INACTIVE;
155 sdi->vendor = g_strdup("Atten");
156 sdi->model = g_strdup(model->name);
33c40990
BV
157 sdi->inst_type = SR_INST_SERIAL;
158 sdi->conn = serial;
159 for (i = 0; i < MAX_CHANNELS; i++) {
160 snprintf(channel, 10, "CH%d", i + 1);
5e23fcab 161 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel);
40fd0264
UH
162 cg = g_malloc(sizeof(struct sr_channel_group));
163 cg->name = g_strdup(channel);
ba7dd8bb 164 cg->channels = g_slist_append(NULL, ch);
40fd0264
UH
165 cg->priv = NULL;
166 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
33c40990
BV
167 }
168
169 devc = g_malloc0(sizeof(struct dev_context));
170 devc->model = model;
171 devc->config = g_malloc0(sizeof(struct per_channel_config) * model->num_channels);
2eb1612d 172 devc->delay_ms = delay_ms;
33c40990 173 sdi->priv = devc;
33c40990
BV
174
175 serial_close(serial);
fa0d6afe 176
43376f33 177 return std_scan_complete(di, g_slist_append(NULL, sdi));
fa0d6afe
BV
178}
179
4f840ce9 180static GSList *scan_3203(struct sr_dev_driver *di, GSList *options)
33c40990 181{
4f840ce9 182 return scan(di, options, PPS_3203T_3S);
33c40990
BV
183}
184
584560f1 185static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 186 const struct sr_channel_group *cg)
fa0d6afe 187{
33c40990 188 struct dev_context *devc;
ba7dd8bb 189 struct sr_channel *ch;
a9010323 190 int channel;
33c40990
BV
191
192 if (!sdi)
193 return SR_ERR_ARG;
fa0d6afe 194
33c40990 195 devc = sdi->priv;
fa0d6afe 196
53b4680f 197 if (!cg) {
660e398f 198 /* No channel group: global options. */
33c40990 199 switch (key) {
7a0b98b5 200 case SR_CONF_CHANNEL_CONFIG:
fe997353 201 *data = g_variant_new_string(channel_modes[devc->channel_mode]);
33c40990 202 break;
a1eaa9e0 203 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
33c40990
BV
204 *data = g_variant_new_boolean(devc->over_current_protection);
205 break;
206 default:
207 return SR_ERR_NA;
208 }
209 } else {
660e398f 210 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
211 ch = cg->channels->data;
212 channel = ch->index;
33c40990
BV
213
214 switch (key) {
7a0b98b5 215 case SR_CONF_VOLTAGE:
33c40990
BV
216 *data = g_variant_new_double(devc->config[channel].output_voltage_last);
217 break;
7a0b98b5 218 case SR_CONF_VOLTAGE_TARGET:
33c40990
BV
219 *data = g_variant_new_double(devc->config[channel].output_voltage_max);
220 break;
7a0b98b5 221 case SR_CONF_CURRENT:
33c40990
BV
222 *data = g_variant_new_double(devc->config[channel].output_current_last);
223 break;
7a0b98b5 224 case SR_CONF_CURRENT_LIMIT:
33c40990
BV
225 *data = g_variant_new_double(devc->config[channel].output_current_max);
226 break;
7a0b98b5 227 case SR_CONF_ENABLED:
33c40990
BV
228 *data = g_variant_new_boolean(devc->config[channel].output_enabled);
229 break;
230 default:
231 return SR_ERR_NA;
232 }
fa0d6afe
BV
233 }
234
a9010323 235 return SR_OK;
fa0d6afe
BV
236}
237
33c40990
BV
238static int find_str(const char *str, const char **strings, int array_size)
239{
240 int idx, i;
241
242 idx = -1;
243 for (i = 0; i < array_size; i++) {
244 if (!strcmp(str, strings[i])) {
245 idx = i;
246 break;
247 }
248 }
249
250 return idx;
251}
252
584560f1 253static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 254 const struct sr_channel_group *cg)
fa0d6afe 255{
33c40990 256 struct dev_context *devc;
ba7dd8bb 257 struct sr_channel *ch;
33c40990
BV
258 gdouble dval;
259 int channel, ret, ival;
260 const char *sval;
261 gboolean bval;
fa0d6afe 262
fa0d6afe 263 ret = SR_OK;
33c40990 264 devc = sdi->priv;
53b4680f 265 if (!cg) {
660e398f 266 /* No channel group: global options. */
33c40990 267 switch (key) {
7a0b98b5 268 case SR_CONF_CHANNEL_CONFIG:
33c40990
BV
269 sval = g_variant_get_string(data, NULL);
270 if ((ival = find_str(sval, channel_modes,
271 ARRAY_SIZE(channel_modes))) == -1) {
272 ret = SR_ERR_ARG;
273 break;
274 }
275 if (devc->model->channel_modes && (1 << ival) == 0) {
276 /* Not supported on this model. */
277 ret = SR_ERR_ARG;
278 }
279 if (ival == devc->channel_mode_set)
280 /* Nothing to do. */
281 break;
282 devc->channel_mode_set = ival;
ab988ecb 283 devc->config_dirty = TRUE;
33c40990 284 break;
a1eaa9e0 285 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
33c40990
BV
286 bval = g_variant_get_boolean(data);
287 if (bval == devc->over_current_protection_set)
288 /* Nothing to do. */
289 break;
290 devc->over_current_protection_set = bval;
ab988ecb 291 devc->config_dirty = TRUE;
33c40990
BV
292 break;
293 default:
294 return SR_ERR_NA;
295 }
296 } else {
660e398f
UH
297 /* Channel group specified: per-channel options. */
298 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
299 ch = cg->channels->data;
300 channel = ch->index;
33c40990
BV
301
302 switch (key) {
7a0b98b5 303 case SR_CONF_VOLTAGE_TARGET:
33c40990
BV
304 dval = g_variant_get_double(data);
305 if (dval < 0 || dval > devc->model->channels[channel].voltage[1])
306 ret = SR_ERR_ARG;
307 devc->config[channel].output_voltage_max = dval;
ab988ecb 308 devc->config_dirty = TRUE;
33c40990 309 break;
7a0b98b5 310 case SR_CONF_CURRENT_LIMIT:
33c40990
BV
311 dval = g_variant_get_double(data);
312 if (dval < 0 || dval > devc->model->channels[channel].current[1])
313 ret = SR_ERR_ARG;
314 devc->config[channel].output_current_max = dval;
ab988ecb 315 devc->config_dirty = TRUE;
33c40990 316 break;
7a0b98b5 317 case SR_CONF_ENABLED:
33c40990
BV
318 bval = g_variant_get_boolean(data);
319 if (bval == devc->config[channel].output_enabled_set)
320 /* Nothing to do. */
321 break;
322 devc->config[channel].output_enabled_set = bval;
ab988ecb 323 devc->config_dirty = TRUE;
33c40990
BV
324 break;
325 default:
326 ret = SR_ERR_NA;
327 }
fa0d6afe
BV
328 }
329
330 return ret;
331}
332
584560f1 333static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 334 const struct sr_channel_group *cg)
fa0d6afe 335{
33c40990 336 struct dev_context *devc;
ba7dd8bb 337 struct sr_channel *ch;
33c40990
BV
338 GVariant *gvar;
339 GVariantBuilder gvb;
a9010323 340 int channel, i;
33c40990 341
e66d1892 342 devc = (sdi) ? sdi->priv : NULL;
a9010323 343
53b4680f 344 if (!cg) {
660e398f 345 /* No channel group: global options. */
33c40990 346 switch (key) {
e66d1892 347 case SR_CONF_SCAN_OPTIONS:
33c40990 348 case SR_CONF_DEVICE_OPTIONS:
e66d1892 349 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
7a0b98b5 350 case SR_CONF_CHANNEL_CONFIG:
33c40990
BV
351 if (devc->model->channel_modes == CHANMODE_INDEPENDENT) {
352 /* The 1-channel models. */
353 *data = g_variant_new_strv(channel_modes, 1);
354 } else {
355 /* The other models support all modes. */
356 *data = g_variant_new_strv(channel_modes, ARRAY_SIZE(channel_modes));
357 }
358 break;
359 default:
360 return SR_ERR_NA;
361 }
362 } else {
660e398f 363 /* Channel group specified: per-channel options. */
e66d1892 364
660e398f 365 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
366 ch = cg->channels->data;
367 channel = ch->index;
33c40990
BV
368
369 switch (key) {
370 case SR_CONF_DEVICE_OPTIONS:
584560f1
BV
371 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
372 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
33c40990 373 break;
7a0b98b5 374 case SR_CONF_VOLTAGE_TARGET:
33c40990
BV
375 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
376 /* Min, max, step. */
377 for (i = 0; i < 3; i++) {
378 gvar = g_variant_new_double(devc->model->channels[channel].voltage[i]);
379 g_variant_builder_add_value(&gvb, gvar);
380 }
381 *data = g_variant_builder_end(&gvb);
382 break;
7a0b98b5 383 case SR_CONF_CURRENT_LIMIT:
33c40990
BV
384 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
385 /* Min, max, step. */
386 for (i = 0; i < 3; i++) {
387 gvar = g_variant_new_double(devc->model->channels[channel].current[i]);
388 g_variant_builder_add_value(&gvb, gvar);
389 }
390 *data = g_variant_builder_end(&gvb);
391 break;
392 default:
393 return SR_ERR_NA;
394 }
fa0d6afe
BV
395 }
396
a9010323 397 return SR_OK;
fa0d6afe
BV
398}
399
ab988ecb
BV
400static int dev_close(struct sr_dev_inst *sdi)
401{
402 struct dev_context *devc;
403
404 devc = sdi->priv;
f1ba6b4b 405
ab988ecb
BV
406 if (devc->config_dirty)
407 /* Some configuration changes were queued up but didn't
408 * get sent to the device, likely because we were never
409 * in acquisition mode. Send them out now. */
410 send_config(sdi);
411
412 return std_serial_dev_close(sdi);
413}
414
695dc859 415static int dev_acquisition_start(const struct sr_dev_inst *sdi)
fa0d6afe 416{
33c40990
BV
417 struct dev_context *devc;
418 struct sr_serial_dev_inst *serial;
419 uint8_t packet[PACKET_SIZE];
420
33c40990
BV
421 devc = sdi->priv;
422 memset(devc->packet, 0x44, PACKET_SIZE);
423 devc->packet_size = 0;
424
425 devc->acquisition_running = TRUE;
426
427 serial = sdi->conn;
102f1239
BV
428 serial_source_add(sdi->session, serial, G_IO_IN, 50,
429 atten_pps3xxx_receive_data, (void *)sdi);
bee2b016 430 std_session_send_df_header(sdi);
33c40990 431
ba7dd8bb 432 /* Send a "channel" configuration packet now. */
33c40990
BV
433 memset(packet, 0, PACKET_SIZE);
434 packet[0] = 0xaa;
435 packet[1] = 0xaa;
436 send_packet(sdi, packet);
fa0d6afe
BV
437
438 return SR_OK;
439}
440
695dc859 441static int dev_acquisition_stop(struct sr_dev_inst *sdi)
fa0d6afe 442{
33c40990
BV
443 struct dev_context *devc;
444
33c40990
BV
445 devc = sdi->priv;
446 devc->acquisition_running = FALSE;
fa0d6afe
BV
447
448 return SR_OK;
449}
450
dd5c48a6 451static struct sr_dev_driver atten_pps3203_driver_info = {
33c40990
BV
452 .name = "atten-pps3203",
453 .longname = "Atten PPS3203T-3S",
fa0d6afe 454 .api_version = 1,
c2fdcc25 455 .init = std_init,
700d6b64 456 .cleanup = std_cleanup,
33c40990 457 .scan = scan_3203,
c01bf34c 458 .dev_list = std_dev_list,
f778bf02 459 .dev_clear = std_dev_clear,
fa0d6afe
BV
460 .config_get = config_get,
461 .config_set = config_set,
462 .config_list = config_list,
33c40990 463 .dev_open = std_serial_dev_open,
ab988ecb 464 .dev_close = dev_close,
fa0d6afe
BV
465 .dev_acquisition_start = dev_acquisition_start,
466 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 467 .context = NULL,
fa0d6afe 468};
dd5c48a6 469SR_REGISTER_DEV_DRIVER(atten_pps3203_driver_info);