[libsigrok.git] / src / hardware / asix-sigma / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
 * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <config.h>
#include "protocol.h"

/*
 * Channel numbers seem to go from 1-16, according to this image:
 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
 * (the cable has two additional GND pins, and a TI and TO pin)
 */
static const char *channel_names[] = {
	"1", "2", "3", "4", "5", "6", "7", "8",
	"9", "10", "11", "12", "13", "14", "15", "16",
};

static const uint32_t scanopts[] = {
	SR_CONF_CONN,
};

static const uint32_t drvopts[] = {
	SR_CONF_LOGIC_ANALYZER,
};

static const uint32_t devopts[] = {
	SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_CONN | SR_CONF_GET,
	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
#if ASIX_SIGMA_WITH_TRIGGER
	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
#endif
};

#if ASIX_SIGMA_WITH_TRIGGER
static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
	SR_TRIGGER_RISING,
	SR_TRIGGER_FALLING,
};
#endif

static void clear_helper(struct dev_context *devc)
{
	(void)sigma_force_close(devc);
}

static int dev_clear(const struct sr_dev_driver *di)
{
	return std_dev_clear_with_callback(di,
		(std_dev_clear_callback)clear_helper);
}

static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
{
	struct sr_usb_dev_inst *usb;

	for (/* EMPTY */; devs; devs = devs->next) {
		usb = devs->data;
		if (usb->bus == bus && usb->address == addr)
			return TRUE;
	}

	return FALSE;
}

static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
{
	gboolean is_sigma, is_omega;

	if (des->idVendor != USB_VENDOR_ASIX)
		return FALSE;
	is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
	is_omega = des->idProduct == USB_PRODUCT_OMEGA;
	if (!is_sigma && !is_omega)
		return FALSE;
	return TRUE;
}

static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
	struct drv_context *drvc;
	libusb_context *usbctx;
	const char *conn;
	GSList *l, *conn_devices;
	struct sr_config *src;
	GSList *devices;
	libusb_device **devlist, *devitem;
	int bus, addr;
	struct libusb_device_descriptor des;
	struct libusb_device_handle *hdl;
	int ret;
	char conn_id[20];
	char serno_txt[16];
	char *end;
	long serno_num, serno_pre;
	enum asix_device_type dev_type;
	const char *dev_text;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	size_t devidx, chidx;

	drvc = di->context;
	usbctx = drvc->sr_ctx->libusb_ctx;

	/* Find all devices which match an (optional) conn= spec. */
	conn = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	conn_devices = NULL;
	if (conn)
		conn_devices = sr_usb_find(usbctx, conn);
	if (conn && !conn_devices)
		return NULL;

	/* Find all ASIX logic analyzers (which match the connection spec). */
	devices = NULL;
	libusb_get_device_list(usbctx, &devlist);
	for (devidx = 0; devlist[devidx]; devidx++) {
		devitem = devlist[devidx];

		/* Check for connection match if a user spec was given. */
		bus = libusb_get_bus_number(devitem);
		addr = libusb_get_device_address(devitem);
		if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
			continue;
		snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);

		/*
		 * Check for known VID:PID pairs. Get the serial number,
		 * to then derive the device type from it.
		 */
		libusb_get_device_descriptor(devitem, &des);
		if (!known_vid_pid(&des))
			continue;
		if (!des.iSerialNumber) {
			sr_warn("Cannot get serial number (index 0).");
			continue;
		}
		ret = libusb_open(devitem, &hdl);
		if (ret < 0) {
			sr_warn("Cannot open USB device %04x.%04x: %s.",
				des.idVendor, des.idProduct,
				libusb_error_name(ret));
			continue;
		}
		ret = libusb_get_string_descriptor_ascii(hdl,
			des.iSerialNumber,
			(unsigned char *)serno_txt, sizeof(serno_txt));
		if (ret < 0) {
			sr_warn("Cannot get serial number (%s).",
				libusb_error_name(ret));
			libusb_close(hdl);
			continue;
		}
		libusb_close(hdl);

		/*
		 * All ASIX logic analyzers have a serial number, which
		 * reads as a hex number, and tells the device type.
		 */
		ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
		if (ret != SR_OK || !end || *end) {
			sr_warn("Cannot interpret serial number %s.", serno_txt);
			continue;
		}
		dev_type = ASIX_TYPE_NONE;
		dev_text = NULL;
		serno_pre = serno_num >> 16;
		switch (serno_pre) {
		case 0xa601:
			dev_type = ASIX_TYPE_SIGMA;
			dev_text = "SIGMA";
			sr_info("Found SIGMA, serno %s.", serno_txt);
			break;
		case 0xa602:
			dev_type = ASIX_TYPE_SIGMA;
			dev_text = "SIGMA2";
			sr_info("Found SIGMA2, serno %s.", serno_txt);
			break;
		case 0xa603:
			dev_type = ASIX_TYPE_OMEGA;
			dev_text = "OMEGA";
			sr_info("Found OMEGA, serno %s.", serno_txt);
			if (!ASIX_WITH_OMEGA) {
				sr_warn("OMEGA support is not implemented yet.");
				continue;
			}
			break;
		default:
			sr_warn("Unknown serno %s, skipping.", serno_txt);
			continue;
		}

		/* Create a device instance, add it to the result set. */

		sdi = g_malloc0(sizeof(*sdi));
		devices = g_slist_append(devices, sdi);
		sdi->status = SR_ST_INITIALIZING;
		sdi->vendor = g_strdup("ASIX");
		sdi->model = g_strdup(dev_text);
		sdi->serial_num = g_strdup(serno_txt);
		sdi->connection_id = g_strdup(conn_id);
		for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
			sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
				TRUE, channel_names[chidx]);

		devc = g_malloc0(sizeof(*devc));
		sdi->priv = devc;
		devc->id.vid = des.idVendor;
		devc->id.pid = des.idProduct;
		devc->id.serno = serno_num;
		devc->id.prefix = serno_pre;
		devc->id.type = dev_type;
		sr_sw_limits_init(&devc->cfg_limits);
		devc->capture_ratio = 50;
		devc->use_triggers = 0;

		/* TODO Retrieve some of this state from hardware? */
		devc->firmware_idx = SIGMA_FW_NONE;
		devc->samplerate = sigma_get_samplerate(sdi);
	}
	libusb_free_device_list(devlist, 1);
	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);

	return std_scan_complete(di, devices);
}

static int dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
		sr_err("OMEGA support is not implemented yet.");
		return SR_ERR_NA;
	}

	return sigma_force_open(sdi);
}

static int dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	return sigma_force_close(devc);
}

static int config_get(uint32_t key, GVariant **data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR;
	devc = sdi->priv;

	switch (key) {
	case SR_CONF_CONN:
		*data = g_variant_new_string(sdi->connection_id);
		break;
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->samplerate);
		break;
	case SR_CONF_LIMIT_MSEC:
	case SR_CONF_LIMIT_SAMPLES:
		return sr_sw_limits_config_get(&devc->cfg_limits, key, data);
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	int ret;
	uint64_t want_rate, have_rate;

	(void)cg;

	devc = sdi->priv;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		want_rate = g_variant_get_uint64(data);
		ret = sigma_normalize_samplerate(want_rate, &have_rate);
		if (ret != SR_OK)
			return ret;
		if (have_rate != want_rate) {
			char *text_want, *text_have;
			text_want = sr_samplerate_string(want_rate);
			text_have = sr_samplerate_string(have_rate);
			sr_info("Adjusted samplerate %s to %s.",
				text_want, text_have);
			g_free(text_want);
			g_free(text_have);
		}
		devc->samplerate = have_rate;
		break;
	case SR_CONF_LIMIT_MSEC:
	case SR_CONF_LIMIT_SAMPLES:
		return sr_sw_limits_config_set(&devc->cfg_limits, key, data);
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_list(uint32_t key, GVariant **data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
	case SR_CONF_DEVICE_OPTIONS:
		if (cg)
			return SR_ERR_NA;
		return STD_CONFIG_LIST(key, data, sdi, cg,
			scanopts, drvopts, devopts);
	case SR_CONF_SAMPLERATE:
		*data = sigma_get_samplerates_list();
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_TRIGGER_MATCH:
		*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	uint16_t pindis_mask;
	uint8_t async, div;
	int triggerpin, ret;
	uint8_t trigsel2;
	struct triggerinout triggerinout_conf;
	struct triggerlut lut;
	uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr;
	size_t count;

	devc = sdi->priv;

	/*
	 * Setup the device's samplerate from the value which up to now
	 * just got checked and stored. As a byproduct this can pick and
	 * send firmware to the device, reduce the number of available
	 * logic channels, etc.
	 *
	 * Determine an acquisition timeout from optionally configured
	 * sample count or time limits. Which depends on the samplerate.
	 */
	ret = sigma_set_samplerate(sdi);
	if (ret != SR_OK)
		return ret;
	ret = sigma_set_acquire_timeout(devc);
	if (ret != SR_OK)
		return ret;

	ret = sigma_convert_trigger(sdi);
	if (ret != SR_OK) {
		sr_err("Could not configure triggers.");
		return ret;
	}

	/* Enter trigger programming mode. */
	trigsel2 = TRGSEL2_RESET;
	ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
	if (ret != SR_OK)
		return ret;

	trigsel2 = 0;
	if (devc->samplerate >= SR_MHZ(100)) {
		/* 100 and 200 MHz mode. */
		/* TODO Decipher the 0x81 magic number's purpose. */
		ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
		if (ret != SR_OK)
			return ret;

		/* Find which pin to trigger on from mask. */
		for (triggerpin = 0; triggerpin < 8; triggerpin++) {
			if (devc->trigger.risingmask & (1 << triggerpin))
				break;
			if (devc->trigger.fallingmask & (1 << triggerpin))
				break;
		}

		/* Set trigger pin and light LED on trigger. */
		trigsel2 = triggerpin & TRGSEL2_PINS_MASK;
		trigsel2 |= TRGSEL2_LEDSEL1;

		/* Default rising edge. */
		/* TODO Documentation disagrees, bit set means _rising_ edge. */
		if (devc->trigger.fallingmask)
			trigsel2 |= TRGSEL2_PINPOL_RISE;

	} else if (devc->samplerate <= SR_MHZ(50)) {
		/* 50MHz firmware modes. */

		/* Translate application specs to hardware perspective. */
		ret = sigma_build_basic_trigger(devc, &lut);
		if (ret != SR_OK)
			return ret;

		/* Communicate resulting register values to the device. */
		ret = sigma_write_trigger_lut(devc, &lut);
		if (ret != SR_OK)
			return ret;

		trigsel2 = TRGSEL2_LEDSEL1 | TRGSEL2_LEDSEL0;
	}

	/* Setup trigger in and out pins to default values. */
	memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
	triggerinout_conf.trgout_bytrigger = 1;
	triggerinout_conf.trgout_enable = 1;
	/* TODO
	 * Verify the correctness of this implementation. The previous
	 * version used to assign to a C language struct with bit fields
	 * which is highly non-portable and hard to guess the resulting
	 * raw memory layout or wire transfer content. The C struct's
	 * field names did not match the vendor documentation's names.
	 * Which means that I could not verify "on paper" either. Let's
	 * re-visit this code later during research for trigger support.
	 */
	wrptr = trgconf_bytes;
	regval = 0;
	if (triggerinout_conf.trgout_bytrigger)
		regval |= TRGOPT_TRGOOUTEN;
	write_u8_inc(&wrptr, regval);
	regval &= ~TRGOPT_CLEAR_MASK;
	if (triggerinout_conf.trgout_enable)
		regval |= TRGOPT_TRGOEN;
	write_u8_inc(&wrptr, regval);
	count = wrptr - trgconf_bytes;
	ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
		trgconf_bytes, count);
	if (ret != SR_OK)
		return ret;

	/* Leave trigger programming mode. */
	ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
	if (ret != SR_OK)
		return ret;

	/*
	 * Samplerate dependent clock and channels configuration. Some
	 * channels by design are not available at higher clock rates.
	 * Register layout differs between firmware variants (depth 1
	 * with LSB channel mask above 50MHz, depth 4 with more details
	 * up to 50MHz).
	 *
	 * Derive a mask where bits are set for unavailable channels.
	 * Either send the single byte, or the full byte sequence.
	 */
	pindis_mask = ~((1UL << devc->num_channels) - 1);
	if (devc->samplerate > SR_MHZ(50)) {
		ret = sigma_set_register(devc, WRITE_CLOCK_SELECT,
			pindis_mask & 0xff);
	} else {
		wrptr = clock_bytes;
		/* Select 50MHz base clock, and divider. */
		async = 0;
		div = SR_MHZ(50) / devc->samplerate - 1;
		/*
		 * TODO Optionally use external clock.
		 * async[0] = 1 to enable external clock
		 * div[5] = 1 to select falling edge
		 * div[4] = 1 to select rising edge
		 * div[3:0] = 1..16 to select clock pin
		 */
		write_u8_inc(&wrptr, async);
		write_u8_inc(&wrptr, div);
		write_u16be_inc(&wrptr, pindis_mask);
		ret = sigma_write_register(devc, WRITE_CLOCK_SELECT,
			clock_bytes, wrptr - clock_bytes);
	}
	if (ret != SR_OK)
		return ret;

	/* Setup maximum post trigger time. */
	ret = sigma_set_register(devc, WRITE_POST_TRIGGER,
		(devc->capture_ratio * 255) / 100);
	if (ret != SR_OK)
		return ret;

	/* Start acqusition. */
	regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
#if ASIX_SIGMA_WITH_TRIGGER
	regval |= WMR_TRGEN;
#endif
	ret = sigma_set_register(devc, WRITE_MODE, regval);
	if (ret != SR_OK)
		return ret;

	ret = std_session_send_df_header(sdi);
	if (ret != SR_OK)
		return ret;

	/* Add capture source. */
	ret = sr_session_source_add(sdi->session, -1, 0, 10,
		sigma_receive_data, (void *)sdi);
	if (ret != SR_OK)
		return ret;

	devc->state.state = SIGMA_CAPTURE;

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	/*
	 * When acquisition is currently running, keep the receive
	 * routine registered and have it stop the acquisition upon the
	 * next invocation. Else unregister the receive routine here
	 * already. The detour is required to have sample data retrieved
	 * for forced acquisition stops.
	 */
	if (devc->state.state == SIGMA_CAPTURE) {
		devc->state.state = SIGMA_STOPPING;
	} else {
		devc->state.state = SIGMA_IDLE;
		(void)sr_session_source_remove(sdi->session, -1);
	}

	return SR_OK;
}

static struct sr_dev_driver asix_sigma_driver_info = {
	.name = "asix-sigma",
	.longname = "ASIX SIGMA/SIGMA2",
	.api_version = 1,
	.init = std_init,
	.cleanup = std_cleanup,
	.scan = scan,
	.dev_list = std_dev_list,
	.dev_clear = dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = dev_open,
	.dev_close = dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.context = NULL,
};
SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);
Commit	Line	Data
3ba56876	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
	5	* Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
	6	* Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
9334ed6c	7	* Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
3ba56876	8	*
	9	* This program is free software: you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation, either version 3 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	21	*/
	22
3ba56876	23	#include <config.h>
	24	#include "protocol.h"
	25
3ba56876	26	/*
	27	* Channel numbers seem to go from 1-16, according to this image:
	28	* http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
	29	* (the cable has two additional GND pins, and a TI and TO pin)
	30	*/
	31	static const char *channel_names[] = {
	32	"1", "2", "3", "4", "5", "6", "7", "8",
	33	"9", "10", "11", "12", "13", "14", "15", "16",
	34	};
	35
53a939ab GS	36	static const uint32_t scanopts[] = {
	37	SR_CONF_CONN,
	38	};
	39
3ba56876	40	static const uint32_t drvopts[] = {
	41	SR_CONF_LOGIC_ANALYZER,
	42	};
	43
	44	static const uint32_t devopts[] = {
	45	SR_CONF_LIMIT_MSEC \| SR_CONF_GET \| SR_CONF_SET,
2f7e529c	46	SR_CONF_LIMIT_SAMPLES \| SR_CONF_GET \| SR_CONF_SET,
53a939ab	47	SR_CONF_CONN \| SR_CONF_GET,
3ba56876	48	SR_CONF_SAMPLERATE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
de3f7acb	49	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	50	SR_CONF_TRIGGER_MATCH \| SR_CONF_LIST,
3ba56876	51	SR_CONF_CAPTURE_RATIO \| SR_CONF_GET \| SR_CONF_SET,
de3f7acb	52	#endif
3ba56876	53	};
3ba56876	54
eac48b34	55	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	56	static const int32_t trigger_matches[] = {
	57	SR_TRIGGER_ZERO,
	58	SR_TRIGGER_ONE,
	59	SR_TRIGGER_RISING,
	60	SR_TRIGGER_FALLING,
	61	};
eac48b34	62	#endif
3ba56876	63
3553451f	64	static void clear_helper(struct dev_context *devc)
53279f13	65	{
7fe1f91f	66	(void)sigma_force_close(devc);
53279f13 UH	67	}
53279f13 UH	68
3ba56876	69	static int dev_clear(const struct sr_dev_driver *di)
3ba56876	70	{
9b4d261f GS	71	return std_dev_clear_with_callback(di,
9b4d261f GS	72	(std_dev_clear_callback)clear_helper);
3ba56876	73	}
3ba56876	74
53a939ab	75	static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
3ba56876	76	{
53a939ab	77	struct sr_usb_dev_inst *usb;
3ba56876	78
53a939ab GS	79	for (/* EMPTY */; devs; devs = devs->next) {
	80	usb = devs->data;
	81	if (usb->bus == bus && usb->address == addr)
	82	return TRUE;
	83	}
3ba56876	84
53a939ab GS	85	return FALSE;
53a939ab GS	86	}
3ba56876	87
53a939ab GS	88	static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
53a939ab GS	89	{
9b4d261f GS	90	gboolean is_sigma, is_omega;
9b4d261f GS	91
53a939ab GS	92	if (des->idVendor != USB_VENDOR_ASIX)
53a939ab GS	93	return FALSE;
9b4d261f GS	94	is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
	95	is_omega = des->idProduct == USB_PRODUCT_OMEGA;
	96	if (!is_sigma && !is_omega)
53a939ab GS	97	return FALSE;
	98	return TRUE;
	99	}
3ba56876	100
53a939ab GS	101	static GSList scan(struct sr_dev_driver di, GSList *options)
	102	{
	103	struct drv_context *drvc;
	104	libusb_context *usbctx;
	105	const char *conn;
	106	GSList l, conn_devices;
	107	struct sr_config *src;
	108	GSList *devices;
	109	libusb_device *devlist, devitem;
	110	int bus, addr;
	111	struct libusb_device_descriptor des;
	112	struct libusb_device_handle *hdl;
	113	int ret;
	114	char conn_id[20];
	115	char serno_txt[16];
	116	char *end;
	117	long serno_num, serno_pre;
	118	enum asix_device_type dev_type;
	119	const char *dev_text;
	120	struct sr_dev_inst *sdi;
	121	struct dev_context *devc;
	122	size_t devidx, chidx;
	123
	124	drvc = di->context;
	125	usbctx = drvc->sr_ctx->libusb_ctx;
	126
	127	/* Find all devices which match an (optional) conn= spec. */
	128	conn = NULL;
	129	for (l = options; l; l = l->next) {
	130	src = l->data;
	131	switch (src->key) {
	132	case SR_CONF_CONN:
	133	conn = g_variant_get_string(src->data, NULL);
	134	break;
	135	}
3ba56876	136	}
53a939ab GS	137	conn_devices = NULL;
	138	if (conn)
	139	conn_devices = sr_usb_find(usbctx, conn);
	140	if (conn && !conn_devices)
	141	return NULL;
	142
	143	/* Find all ASIX logic analyzers (which match the connection spec). */
	144	devices = NULL;
	145	libusb_get_device_list(usbctx, &devlist);
	146	for (devidx = 0; devlist[devidx]; devidx++) {
	147	devitem = devlist[devidx];
	148
	149	/* Check for connection match if a user spec was given. */
	150	bus = libusb_get_bus_number(devitem);
	151	addr = libusb_get_device_address(devitem);
	152	if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
	153	continue;
	154	snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);
	155
	156	/*
	157	* Check for known VID:PID pairs. Get the serial number,
	158	* to then derive the device type from it.
	159	*/
	160	libusb_get_device_descriptor(devitem, &des);
	161	if (!known_vid_pid(&des))
	162	continue;
	163	if (!des.iSerialNumber) {
	164	sr_warn("Cannot get serial number (index 0).");
	165	continue;
	166	}
	167	ret = libusb_open(devitem, &hdl);
	168	if (ret < 0) {
	169	sr_warn("Cannot open USB device %04x.%04x: %s.",
	170	des.idVendor, des.idProduct,
	171	libusb_error_name(ret));
	172	continue;
	173	}
	174	ret = libusb_get_string_descriptor_ascii(hdl,
	175	des.iSerialNumber,
	176	(unsigned char *)serno_txt, sizeof(serno_txt));
	177	if (ret < 0) {
	178	sr_warn("Cannot get serial number (%s).",
	179	libusb_error_name(ret));
	180	libusb_close(hdl);
	181	continue;
	182	}
	183	libusb_close(hdl);
	184
	185	/*
	186	* All ASIX logic analyzers have a serial number, which
	187	* reads as a hex number, and tells the device type.
	188	*/
	189	ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
	190	if (ret != SR_OK \|\| !end \|\| *end) {
	191	sr_warn("Cannot interpret serial number %s.", serno_txt);
	192	continue;
	193	}
	194	dev_type = ASIX_TYPE_NONE;
	195	dev_text = NULL;
	196	serno_pre = serno_num >> 16;
	197	switch (serno_pre) {
	198	case 0xa601:
	199	dev_type = ASIX_TYPE_SIGMA;
	200	dev_text = "SIGMA";
201	sr_info("Found SIGMA, serno %s.", serno_txt);
202	break;
203	case 0xa602:
204	dev_type = ASIX_TYPE_SIGMA;
205	dev_text = "SIGMA2";
206	sr_info("Found SIGMA2, serno %s.", serno_txt);
207	break;
208	case 0xa603:
209	dev_type = ASIX_TYPE_OMEGA;
210	dev_text = "OMEGA";
211	sr_info("Found OMEGA, serno %s.", serno_txt);
212	if (!ASIX_WITH_OMEGA) {
213	sr_warn("OMEGA support is not implemented yet.");
214	continue;
215	}
216	break;
217	default:
218	sr_warn("Unknown serno %s, skipping.", serno_txt);
219	continue;
220	}
221
222	/* Create a device instance, add it to the result set. */
223
224	sdi = g_malloc0(sizeof(*sdi));
225	devices = g_slist_append(devices, sdi);
226	sdi->status = SR_ST_INITIALIZING;
227	sdi->vendor = g_strdup("ASIX");
228	sdi->model = g_strdup(dev_text);
229	sdi->serial_num = g_strdup(serno_txt);
230	sdi->connection_id = g_strdup(conn_id);
231	for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
232	sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
233	TRUE, channel_names[chidx]);
234
235	devc = g_malloc0(sizeof(*devc));
236	sdi->priv = devc;
237	devc->id.vid = des.idVendor;
238	devc->id.pid = des.idProduct;
239	devc->id.serno = serno_num;
240	devc->id.prefix = serno_pre;
241	devc->id.type = dev_type;
5e78a564	242	sr_sw_limits_init(&devc->cfg_limits);
53a939ab GS	243	devc->capture_ratio = 50;
53a939ab GS	244	devc->use_triggers = 0;
7fe1f91f GS	245
	246	/* TODO Retrieve some of this state from hardware? */
	247	devc->firmware_idx = SIGMA_FW_NONE;
abcd4771	248	devc->samplerate = sigma_get_samplerate(sdi);
3ba56876	249	}
53a939ab GS	250	libusb_free_device_list(devlist, 1);
53a939ab GS	251	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
3ba56876	252
53a939ab	253	return std_scan_complete(di, devices);
3ba56876	254	}
3ba56876	255
3ba56876	256	static int dev_open(struct sr_dev_inst *sdi)
	257	{
	258	struct dev_context *devc;
3ba56876	259
	260	devc = sdi->priv;
	261
53a939ab GS	262	if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
	263	sr_err("OMEGA support is not implemented yet.");
	264	return SR_ERR_NA;
	265	}
3ba56876	266
7fe1f91f	267	return sigma_force_open(sdi);
3ba56876	268	}
	269
	270	static int dev_close(struct sr_dev_inst *sdi)
	271	{
	272	struct dev_context *devc;
	273
	274	devc = sdi->priv;
	275
7fe1f91f	276	return sigma_force_close(devc);
3ba56876	277	}
3ba56876	278
dd7a72ea UH	279	static int config_get(uint32_t key, GVariant **data,
dd7a72ea UH	280	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
3ba56876	281	{
	282	struct dev_context *devc;
	283
	284	(void)cg;
	285
	286	if (!sdi)
	287	return SR_ERR;
	288	devc = sdi->priv;
	289
	290	switch (key) {
53a939ab GS	291	case SR_CONF_CONN:
	292	*data = g_variant_new_string(sdi->connection_id);
	293	break;
3ba56876	294	case SR_CONF_SAMPLERATE:
5e78a564	295	*data = g_variant_new_uint64(devc->samplerate);
3ba56876	296	break;
3ba56876	297	case SR_CONF_LIMIT_MSEC:
2f7e529c	298	case SR_CONF_LIMIT_SAMPLES:
5e78a564	299	return sr_sw_limits_config_get(&devc->cfg_limits, key, data);
de3f7acb	300	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	301	case SR_CONF_CAPTURE_RATIO:
	302	*data = g_variant_new_uint64(devc->capture_ratio);
	303	break;
de3f7acb	304	#endif
3ba56876	305	default:
	306	return SR_ERR_NA;
	307	}
	308
	309	return SR_OK;
	310	}
	311
dd7a72ea UH	312	static int config_set(uint32_t key, GVariant *data,
dd7a72ea UH	313	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
3ba56876	314	{
3ba56876	315	struct dev_context *devc;
5e78a564 GS	316	int ret;
5e78a564 GS	317	uint64_t want_rate, have_rate;
3ba56876	318
	319	(void)cg;
	320
3ba56876	321	devc = sdi->priv;
3ba56876	322
3ba56876	323	switch (key) {
3ba56876	324	case SR_CONF_SAMPLERATE:
5e78a564 GS	325	want_rate = g_variant_get_uint64(data);
	326	ret = sigma_normalize_samplerate(want_rate, &have_rate);
	327	if (ret != SR_OK)
	328	return ret;
	329	if (have_rate != want_rate) {
	330	char text_want, text_have;
	331	text_want = sr_samplerate_string(want_rate);
	332	text_have = sr_samplerate_string(have_rate);
	333	sr_info("Adjusted samplerate %s to %s.",
	334	text_want, text_have);
	335	g_free(text_want);
	336	g_free(text_have);
	337	}
	338	devc->samplerate = have_rate;
3ba56876	339	break;
5e78a564	340	case SR_CONF_LIMIT_MSEC:
3ba56876	341	case SR_CONF_LIMIT_SAMPLES:
5e78a564	342	return sr_sw_limits_config_set(&devc->cfg_limits, key, data);
de3f7acb	343	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	344	case SR_CONF_CAPTURE_RATIO:
efad7ccc	345	devc->capture_ratio = g_variant_get_uint64(data);
3ba56876	346	break;
de3f7acb	347	#endif
3ba56876	348	default:
758906aa	349	return SR_ERR_NA;
3ba56876	350	}
3ba56876	351
758906aa	352	return SR_OK;
3ba56876	353	}
3ba56876	354
dd7a72ea UH	355	static int config_list(uint32_t key, GVariant **data,
dd7a72ea UH	356	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
3ba56876	357	{
3ba56876	358	switch (key) {
53a939ab	359	case SR_CONF_SCAN_OPTIONS:
3ba56876	360	case SR_CONF_DEVICE_OPTIONS:
53a939ab GS	361	if (cg)
53a939ab GS	362	return SR_ERR_NA;
9b4d261f GS	363	return STD_CONFIG_LIST(key, data, sdi, cg,
9b4d261f GS	364	scanopts, drvopts, devopts);
3ba56876	365	case SR_CONF_SAMPLERATE:
abcd4771	366	*data = sigma_get_samplerates_list();
3ba56876	367	break;
de3f7acb	368	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	369	case SR_CONF_TRIGGER_MATCH:
53012da6	370	*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
3ba56876	371	break;
de3f7acb	372	#endif
3ba56876	373	default:
	374	return SR_ERR_NA;
	375	}
	376
	377	return SR_OK;
	378	}
	379
695dc859	380	static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3ba56876	381	{
3ba56876	382	struct dev_context *devc;
419f1095 GS	383	uint16_t pindis_mask;
419f1095 GS	384	uint8_t async, div;
8256ed15	385	int triggerpin, ret;
419f1095	386	uint8_t trigsel2;
3ba56876	387	struct triggerinout triggerinout_conf;
3ba56876	388	struct triggerlut lut;
a53b8e4d GS	389	uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr;
a53b8e4d GS	390	size_t count;
3ba56876	391
3ba56876	392	devc = sdi->priv;
3ba56876	393
5e78a564 GS	394	/*
	395	* Setup the device's samplerate from the value which up to now
	396	* just got checked and stored. As a byproduct this can pick and
	397	* send firmware to the device, reduce the number of available
	398	* logic channels, etc.
	399	*
	400	* Determine an acquisition timeout from optionally configured
	401	* sample count or time limits. Which depends on the samplerate.
	402	*/
	403	ret = sigma_set_samplerate(sdi);
	404	if (ret != SR_OK)
	405	return ret;
	406	ret = sigma_set_acquire_timeout(devc);
	407	if (ret != SR_OK)
	408	return ret;
	409
88a5f9ea GS	410	ret = sigma_convert_trigger(sdi);
	411	if (ret != SR_OK) {
	412	sr_err("Could not configure triggers.");
	413	return ret;
3ba56876	414	}
3ba56876	415
3ba56876	416	/* Enter trigger programming mode. */
0f017b7d GS	417	trigsel2 = TRGSEL2_RESET;
0f017b7d GS	418	ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
88a5f9ea GS	419	if (ret != SR_OK)
88a5f9ea GS	420	return ret;
3ba56876	421
419f1095	422	trigsel2 = 0;
5e78a564	423	if (devc->samplerate >= SR_MHZ(100)) {
f06fb3e9	424	/* 100 and 200 MHz mode. */
419f1095	425	/* TODO Decipher the 0x81 magic number's purpose. */
88a5f9ea GS	426	ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
	427	if (ret != SR_OK)
	428	return ret;
3ba56876	429
3ba56876	430	/* Find which pin to trigger on from mask. */
9b4d261f GS	431	for (triggerpin = 0; triggerpin < 8; triggerpin++) {
	432	if (devc->trigger.risingmask & (1 << triggerpin))
	433	break;
	434	if (devc->trigger.fallingmask & (1 << triggerpin))
3ba56876	435	break;
9b4d261f	436	}
3ba56876	437
3ba56876	438	/* Set trigger pin and light LED on trigger. */
419f1095 GS	439	trigsel2 = triggerpin & TRGSEL2_PINS_MASK;
419f1095 GS	440	trigsel2 \|= TRGSEL2_LEDSEL1;
3ba56876	441
3ba56876	442	/* Default rising edge. */
419f1095	443	/* TODO Documentation disagrees, bit set means _rising_ edge. */
3ba56876	444	if (devc->trigger.fallingmask)
419f1095	445	trigsel2 \|= TRGSEL2_PINPOL_RISE;
3ba56876	446
5e78a564	447	} else if (devc->samplerate <= SR_MHZ(50)) {
419f1095 GS	448	/* 50MHz firmware modes. */
	449
	450	/* Translate application specs to hardware perspective. */
88a5f9ea GS	451	ret = sigma_build_basic_trigger(devc, &lut);
	452	if (ret != SR_OK)
	453	return ret;
3ba56876	454
419f1095	455	/* Communicate resulting register values to the device. */
88a5f9ea GS	456	ret = sigma_write_trigger_lut(devc, &lut);
	457	if (ret != SR_OK)
	458	return ret;
3ba56876	459
419f1095	460	trigsel2 = TRGSEL2_LEDSEL1 \| TRGSEL2_LEDSEL0;
3ba56876	461	}
	462
	463	/* Setup trigger in and out pins to default values. */
5c231fc4	464	memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
3ba56876	465	triggerinout_conf.trgout_bytrigger = 1;
3ba56876	466	triggerinout_conf.trgout_enable = 1;
a53b8e4d GS	467	/* TODO
	468	* Verify the correctness of this implementation. The previous
	469	* version used to assign to a C language struct with bit fields
	470	* which is highly non-portable and hard to guess the resulting
	471	* raw memory layout or wire transfer content. The C struct's
	472	* field names did not match the vendor documentation's names.
	473	* Which means that I could not verify "on paper" either. Let's
	474	* re-visit this code later during research for trigger support.
	475	*/
	476	wrptr = trgconf_bytes;
	477	regval = 0;
	478	if (triggerinout_conf.trgout_bytrigger)
	479	regval \|= TRGOPT_TRGOOUTEN;
	480	write_u8_inc(&wrptr, regval);
	481	regval &= ~TRGOPT_CLEAR_MASK;
	482	if (triggerinout_conf.trgout_enable)
	483	regval \|= TRGOPT_TRGOEN;
	484	write_u8_inc(&wrptr, regval);
	485	count = wrptr - trgconf_bytes;
88a5f9ea GS	486	ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
	487	trgconf_bytes, count);
	488	if (ret != SR_OK)
	489	return ret;
a53b8e4d GS	490
a53b8e4d GS	491	/* Leave trigger programming mode. */
419f1095	492	ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
88a5f9ea GS	493	if (ret != SR_OK)
88a5f9ea GS	494	return ret;
3ba56876	495
419f1095 GS	496	/*
	497	* Samplerate dependent clock and channels configuration. Some
	498	* channels by design are not available at higher clock rates.
	499	* Register layout differs between firmware variants (depth 1
	500	* with LSB channel mask above 50MHz, depth 4 with more details
	501	* up to 50MHz).
	502	*
	503	* Derive a mask where bits are set for unavailable channels.
	504	* Either send the single byte, or the full byte sequence.
	505	*/
	506	pindis_mask = ~((1UL << devc->num_channels) - 1);
	507	if (devc->samplerate > SR_MHZ(50)) {
	508	ret = sigma_set_register(devc, WRITE_CLOCK_SELECT,
	509	pindis_mask & 0xff);
8256ed15	510	} else {
419f1095 GS	511	wrptr = clock_bytes;
	512	/* Select 50MHz base clock, and divider. */
	513	async = 0;
	514	div = SR_MHZ(50) / devc->samplerate - 1;
3ba56876	515	/*
419f1095 GS	516	* TODO Optionally use external clock.
	517	* async[0] = 1 to enable external clock
	518	* div[5] = 1 to select falling edge
	519	* div[4] = 1 to select rising edge
	520	* div[3:0] = 1..16 to select clock pin
3ba56876	521	*/
419f1095 GS	522	write_u8_inc(&wrptr, async);
	523	write_u8_inc(&wrptr, div);
	524	write_u16be_inc(&wrptr, pindis_mask);
	525	ret = sigma_write_register(devc, WRITE_CLOCK_SELECT,
	526	clock_bytes, wrptr - clock_bytes);
3ba56876	527	}
88a5f9ea GS	528	if (ret != SR_OK)
88a5f9ea GS	529	return ret;
3ba56876	530
3ba56876	531	/* Setup maximum post trigger time. */
88a5f9ea	532	ret = sigma_set_register(devc, WRITE_POST_TRIGGER,
9b4d261f	533	(devc->capture_ratio * 255) / 100);
88a5f9ea GS	534	if (ret != SR_OK)
88a5f9ea GS	535	return ret;
3ba56876	536
3ba56876	537	/* Start acqusition. */
9b4d261f	538	regval = WMR_TRGRES \| WMR_SDRAMWRITEEN;
22f64ed8 GS	539	#if ASIX_SIGMA_WITH_TRIGGER
	540	regval \|= WMR_TRGEN;
	541	#endif
88a5f9ea GS	542	ret = sigma_set_register(devc, WRITE_MODE, regval);
	543	if (ret != SR_OK)
	544	return ret;
3ba56876	545
88a5f9ea GS	546	ret = std_session_send_df_header(sdi);
	547	if (ret != SR_OK)
	548	return ret;
3ba56876	549
3ba56876	550	/* Add capture source. */
88a5f9ea	551	ret = sr_session_source_add(sdi->session, -1, 0, 10,
9b4d261f	552	sigma_receive_data, (void *)sdi);
88a5f9ea GS	553	if (ret != SR_OK)
88a5f9ea GS	554	return ret;
3ba56876	555
	556	devc->state.state = SIGMA_CAPTURE;
	557
	558	return SR_OK;
	559	}
	560
695dc859	561	static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3ba56876	562	{
	563	struct dev_context *devc;
	564
3ba56876	565	devc = sdi->priv;
3ba56876	566
dde0175d GS	567	/*
	568	* When acquisition is currently running, keep the receive
	569	* routine registered and have it stop the acquisition upon the
	570	* next invocation. Else unregister the receive routine here
	571	* already. The detour is required to have sample data retrieved
	572	* for forced acquisition stops.
	573	*/
	574	if (devc->state.state == SIGMA_CAPTURE) {
	575	devc->state.state = SIGMA_STOPPING;
	576	} else {
	577	devc->state.state = SIGMA_IDLE;
88a5f9ea	578	(void)sr_session_source_remove(sdi->session, -1);
dde0175d	579	}
3ba56876	580
	581	return SR_OK;
	582	}
	583
dd5c48a6	584	static struct sr_dev_driver asix_sigma_driver_info = {
3ba56876	585	.name = "asix-sigma",
	586	.longname = "ASIX SIGMA/SIGMA2",
	587	.api_version = 1,
c2fdcc25	588	.init = std_init,
700d6b64	589	.cleanup = std_cleanup,
3ba56876	590	.scan = scan,
c01bf34c	591	.dev_list = std_dev_list,
3ba56876	592	.dev_clear = dev_clear,
	593	.config_get = config_get,
	594	.config_set = config_set,
	595	.config_list = config_list,
	596	.dev_open = dev_open,
	597	.dev_close = dev_close,
	598	.dev_acquisition_start = dev_acquisition_start,
	599	.dev_acquisition_stop = dev_acquisition_stop,
	600	.context = NULL,
	601	};
dd5c48a6	602	SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);