[libsigrok.git] / hardware / openbench-logic-sniffer / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "protocol.h"
#include <libserialport.h>

#define SERIALCOMM "115200/8n1"

static const int32_t hwopts[] = {
	SR_CONF_CONN,
	SR_CONF_SERIALCOMM,
};

static const int32_t hwcaps[] = {
	SR_CONF_LOGIC_ANALYZER,
	SR_CONF_SAMPLERATE,
	SR_CONF_TRIGGER_TYPE,
	SR_CONF_CAPTURE_RATIO,
	SR_CONF_LIMIT_SAMPLES,
	SR_CONF_EXTERNAL_CLOCK,
	SR_CONF_PATTERN_MODE,
	SR_CONF_SWAP,
	SR_CONF_RLE,
};

#define STR_PATTERN_EXTERNAL "external"
#define STR_PATTERN_INTERNAL "internal"

/* Supported methods of test pattern outputs */
enum {
	/**
	 * Capture pins 31:16 (unbuffered wing) output a test pattern
	 * that can captured on pins 0:15.
	 */
	PATTERN_EXTERNAL,

	/** Route test pattern internally to capture buffer. */
	PATTERN_INTERNAL,
};

static const char *patterns[] = {
	STR_PATTERN_EXTERNAL,
	STR_PATTERN_INTERNAL,
};

/* Probes are numbered 0-31 (on the PCB silkscreen). */
SR_PRIV const char *ols_probe_names[NUM_PROBES + 1] = {
	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	"24", "25", "26", "27", "28", "29", "30", "31",
	NULL,
};

/* Default supported samplerates, can be overridden by device metadata. */
static const uint64_t samplerates[] = {
	SR_HZ(10),
	SR_MHZ(200),
	SR_HZ(1),
};

SR_PRIV struct sr_dev_driver ols_driver_info;
static struct sr_dev_driver *di = &ols_driver_info;

static int dev_clear(void)
{
	return std_dev_clear(di, NULL);
}

static int init(struct sr_context *sr_ctx)
{
	return std_init(sr_ctx, di, LOG_PREFIX);
}

static GSList *scan(GSList *options)
{
	struct sr_config *src;
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	struct sr_probe *probe;
	struct sr_serial_dev_inst *serial;
	GPollFD probefd;
	GSList *l, *devices;
	int ret, i;
	const char *conn, *serialcomm;
	char buf[8];

	drvc = di->priv;

	devices = NULL;

	conn = serialcomm = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		case SR_CONF_SERIALCOMM:
			serialcomm = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	if (!conn)
		return NULL;

	if (serialcomm == NULL)
		serialcomm = SERIALCOMM;

	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
		return NULL;

	/* The discovery procedure is like this: first send the Reset
	 * command (0x00) 5 times, since the device could be anywhere
	 * in a 5-byte command. Then send the ID command (0x02).
	 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	 * have a match.
	 */
	sr_info("Probing %s.", conn);
	if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
		return NULL;

	ret = SR_OK;
	for (i = 0; i < 5; i++) {
		if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
			sr_err("Port %s is not writable.", conn);
			break;
		}
	}
	if (ret != SR_OK) {
		serial_close(serial);
		sr_err("Could not use port %s. Quitting.", conn);
		return NULL;
	}
	send_shortcommand(serial, CMD_ID);

	/* Wait 10ms for a response. */
	g_usleep(10000);

	sp_get_port_handle(serial->data, &probefd.fd);
	probefd.events = G_IO_IN;
	g_poll(&probefd, 1, 1);

	if (probefd.revents != G_IO_IN)
		return NULL;
	if (serial_read_blocking(serial, buf, 4) != 4)
		return NULL;
	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
		return NULL;

	/* Definitely using the OLS protocol, check if it supports
	 * the metadata command.
	 */
	send_shortcommand(serial, CMD_METADATA);
	if (g_poll(&probefd, 1, 10) > 0) {
		/* Got metadata. */
		sdi = get_metadata(serial);
		sdi->index = 0;
		devc = sdi->priv;
	} else {
		/* Not an OLS -- some other board that uses the sump protocol. */
		sr_info("Device does not support metadata.");
		sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
				"Sump", "Logic Analyzer", "v1.0");
		sdi->driver = di;
		for (i = 0; i < 32; i++) {
			if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
					ols_probe_names[i])))
				return 0;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}
		devc = ols_dev_new();
		sdi->priv = devc;
	}
	/* Configure samplerate and divider. */
	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
		sr_dbg("Failed to set default samplerate (%"PRIu64").",
				DEFAULT_SAMPLERATE);
	/* Clear trigger masks, values and stages. */
	ols_configure_probes(sdi);
	sdi->inst_type = SR_INST_SERIAL;
	sdi->conn = serial;

	drvc->instances = g_slist_append(drvc->instances, sdi);
	devices = g_slist_append(devices, sdi);

	serial_close(serial);

	return devices;
}

static GSList *dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int cleanup(void)
{
	return dev_clear();
}

static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_probe_group *probe_group)
{
	struct dev_context *devc;

	(void)probe_group;

	if (!sdi)
		return SR_ERR_ARG;

	devc = sdi->priv;
	switch (id) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
	case SR_CONF_PATTERN_MODE:
		if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
		else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_INTERNAL);
		break;
	case SR_CONF_RLE:
		*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_probe_group *probe_group)
{
	struct dev_context *devc;
	int ret;
	uint64_t tmp_u64;
	const char *stropt;

	(void)probe_group;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;

	switch (id) {
	case SR_CONF_SAMPLERATE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
			return SR_ERR_SAMPLERATE;
		ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < MIN_NUM_SAMPLES)
			return SR_ERR;
		devc->limit_samples = tmp_u64;
		ret = SR_OK;
		break;
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
			devc->capture_ratio = 0;
			ret = SR_ERR;
		} else
			ret = SR_OK;
		break;
	case SR_CONF_EXTERNAL_CLOCK:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling external clock.");
			devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
		} else {
			sr_info("Disabled external clock.");
			devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
		}
		ret = SR_OK;
		break;
	case SR_CONF_PATTERN_MODE:
		stropt = g_variant_get_string(data, NULL);
		ret = SR_OK;
		if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
			sr_info("Enabling internal test mode.");
			devc->flag_reg |= FLAG_INTERNAL_TEST_MODE;
		} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
			sr_info("Enabling external test mode.");
			devc->flag_reg |= FLAG_EXTERNAL_TEST_MODE;
		} else {
			ret = SR_ERR;
		}
		break;
	case SR_CONF_SWAP:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling channel swapping.");
			devc->flag_reg |= FLAG_SWAP_PROBES;
		} else {
			sr_info("Disabling channel swapping.");
			devc->flag_reg &= ~FLAG_SWAP_PROBES;
		}
		ret = SR_OK;
		break;

	case SR_CONF_RLE:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling RLE.");
			devc->flag_reg |= FLAG_RLE;
		} else {
			sr_info("Disabling RLE.");
			devc->flag_reg &= ~FLAG_RLE;
		}
		ret = SR_OK;
		break;
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_probe_group *probe_group)
{
	struct dev_context *devc;
	GVariant *gvar, *grange[2];
	GVariantBuilder gvb;
	int num_channels, i;

	(void)probe_group;

	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
		break;
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				ARRAY_SIZE(samplerates), sizeof(uint64_t));
		g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_TYPE:
		*data = g_variant_new_string(TRIGGER_TYPE);
		break;
	case SR_CONF_PATTERN_MODE:
		*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		if (!sdi)
			return SR_ERR_ARG;
		devc = sdi->priv;
		if (devc->flag_reg & FLAG_RLE)
			return SR_ERR_NA;
		if (devc->max_samples == 0)
			/* Device didn't specify sample memory size in metadata. */
			return SR_ERR_NA;
		/*
		 * Channel groups are turned off if no probes in that group are
		 * enabled, making more room for samples for the enabled group.
		*/
		ols_configure_probes(sdi);
		num_channels = 0;
		for (i = 0; i < 4; i++) {
			if (devc->probe_mask & (0xff << (i * 8)))
				num_channels++;
		}
		grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
		*data = g_variant_new_tuple(grange, 2);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi,
		void *cb_data)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint32_t trigger_config[4];
	uint32_t data;
	uint16_t readcount, delaycount;
	uint8_t changrp_mask;
	int num_channels;
	int i;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;
	serial = sdi->conn;

	if (ols_configure_probes(sdi) != SR_OK) {
		sr_err("Failed to configure probes.");
		return SR_ERR;
	}

	/*
	 * Enable/disable channel groups in the flag register according to the
	 * probe mask. Calculate this here, because num_channels is needed
	 * to limit readcount.
	 */
	changrp_mask = 0;
	num_channels = 0;
	for (i = 0; i < 4; i++) {
		if (devc->probe_mask & (0xff << (i * 8))) {
			changrp_mask |= (1 << i);
			num_channels++;
		}
	}

	/*
	 * Limit readcount to prevent reading past the end of the hardware
	 * buffer.
	 */
	readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;

	memset(trigger_config, 0, 16);
	trigger_config[devc->num_stages] |= 0x08;
	if (devc->trigger_mask[0]) {
		delaycount = readcount * (1 - devc->capture_ratio / 100.0);
		devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;

		if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
			reverse32(devc->trigger_mask[0])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
			reverse32(devc->trigger_value[0])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
			trigger_config[0]) != SR_OK)
			return SR_ERR;

		if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_1,
			reverse32(devc->trigger_mask[1])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_1,
			reverse32(devc->trigger_value[1])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_1,
			trigger_config[1]) != SR_OK)
			return SR_ERR;

		if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_2,
			reverse32(devc->trigger_mask[2])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_2,
			reverse32(devc->trigger_value[2])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_2,
			trigger_config[2]) != SR_OK)
			return SR_ERR;

		if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_3,
			reverse32(devc->trigger_mask[3])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_3,
			reverse32(devc->trigger_value[3])) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_3,
			trigger_config[3]) != SR_OK)
			return SR_ERR;
	} else {
		if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
				devc->trigger_mask[0]) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
				devc->trigger_value[0]) != SR_OK)
			return SR_ERR;
		if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
		     0x00000008) != SR_OK)
			return SR_ERR;
		delaycount = readcount;
	}

	sr_info("Setting samplerate to %" PRIu64 "Hz (divider %u, "
		"demux %s, noise_filter %s)", devc->cur_samplerate,
		devc->cur_samplerate_divider,
		devc->flag_reg & FLAG_DEMUX ? "on" : "off",
		devc->flag_reg & FLAG_FILTER ? "on": "off");
	if (send_longcommand(serial, CMD_SET_DIVIDER,
			reverse32(devc->cur_samplerate_divider)) != SR_OK)
		return SR_ERR;

	/* Send sample limit and pre/post-trigger capture ratio. */
	data = ((readcount - 1) & 0xffff) << 16;
	data |= (delaycount - 1) & 0xffff;
	if (send_longcommand(serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
		return SR_ERR;

	/* The flag register wants them here, and 1 means "disable channel". */
	devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
	devc->rle_count = 0;
	data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
	if (send_longcommand(serial, CMD_SET_FLAGS, data) != SR_OK)
		return SR_ERR;

	/* Start acquisition on the device. */
	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
		return SR_ERR;

	/* Reset all operational states. */
	devc->num_transfers = devc->num_samples = devc->num_bytes = 0;
	memset(devc->sample, 0, 4);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, LOG_PREFIX);

	serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	(void)cb_data;

	abort_acquisition(sdi);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver ols_driver_info = {
	.name = "ols",
	.longname = "Openbench Logic Sniffer",
	.api_version = 1,
	.init = init,
	.cleanup = cleanup,
	.scan = scan,
	.dev_list = dev_list,
	.dev_clear = dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = std_serial_dev_open,
	.dev_close = std_serial_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
0aba65da	1	/*
50985c20	2	* This file is part of the libsigrok project.
0aba65da	3	*
13d8e03c	4	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
0aba65da UH	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "protocol.h"
bf72f649	21	#include <libserialport.h>
0aba65da UH	22
	23	#define SERIALCOMM "115200/8n1"
	24
e46aa4f6	25	static const int32_t hwopts[] = {
1953564a BV	26	SR_CONF_CONN,
1953564a BV	27	SR_CONF_SERIALCOMM,
aeabd308 UH	28	};
aeabd308 UH	29
e46aa4f6	30	static const int32_t hwcaps[] = {
1953564a BV	31	SR_CONF_LOGIC_ANALYZER,
1953564a BV	32	SR_CONF_SAMPLERATE,
0c05591a	33	SR_CONF_TRIGGER_TYPE,
1953564a BV	34	SR_CONF_CAPTURE_RATIO,
1953564a BV	35	SR_CONF_LIMIT_SAMPLES,
eb1b610b	36	SR_CONF_EXTERNAL_CLOCK,
967760a8	37	SR_CONF_PATTERN_MODE,
7b0a57fd	38	SR_CONF_SWAP,
1953564a	39	SR_CONF_RLE,
0aba65da UH	40	};
0aba65da UH	41
967760a8 MR	42	#define STR_PATTERN_EXTERNAL "external"
	43	#define STR_PATTERN_INTERNAL "internal"
	44
	45	/* Supported methods of test pattern outputs */
	46	enum {
	47	/**
	48	* Capture pins 31:16 (unbuffered wing) output a test pattern
	49	* that can captured on pins 0:15.
	50	*/
	51	PATTERN_EXTERNAL,
	52
	53	/** Route test pattern internally to capture buffer. */
	54	PATTERN_INTERNAL,
	55	};
	56
7c07a178 UH	57	static const char *patterns[] = {
	58	STR_PATTERN_EXTERNAL,
	59	STR_PATTERN_INTERNAL,
	60	};
	61
0aba65da UH	62	/* Probes are numbered 0-31 (on the PCB silkscreen). */
0aba65da UH	63	SR_PRIV const char *ols_probe_names[NUM_PROBES + 1] = {
78693401 UH	64	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	65	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	66	"24", "25", "26", "27", "28", "29", "30", "31",
0aba65da UH	67	NULL,
	68	};
	69
d3b38ad3	70	/* Default supported samplerates, can be overridden by device metadata. */
e46aa4f6 BV	71	static const uint64_t samplerates[] = {
	72	SR_HZ(10),
	73	SR_MHZ(200),
	74	SR_HZ(1),
0aba65da UH	75	};
	76
	77	SR_PRIV struct sr_dev_driver ols_driver_info;
	78	static struct sr_dev_driver *di = &ols_driver_info;
	79
eea49cf1 UH	80	static int dev_clear(void)
	81	{
	82	return std_dev_clear(di, NULL);
	83	}
	84
03f4de8c	85	static int init(struct sr_context *sr_ctx)
0aba65da	86	{
f6beaac5	87	return std_init(sr_ctx, di, LOG_PREFIX);
0aba65da UH	88	}
0aba65da UH	89
03f4de8c	90	static GSList scan(GSList options)
0aba65da	91	{
1987b8d6	92	struct sr_config *src;
0aba65da UH	93	struct sr_dev_inst *sdi;
	94	struct drv_context *drvc;
	95	struct dev_context *devc;
	96	struct sr_probe *probe;
	97	struct sr_serial_dev_inst *serial;
	98	GPollFD probefd;
	99	GSList l, devices;
	100	int ret, i;
	101	const char conn, serialcomm;
	102	char buf[8];
	103
0aba65da	104	drvc = di->priv;
4b97c74e	105
0aba65da UH	106	devices = NULL;
	107
	108	conn = serialcomm = NULL;
	109	for (l = options; l; l = l->next) {
1987b8d6 BV	110	src = l->data;
1987b8d6 BV	111	switch (src->key) {
1953564a	112	case SR_CONF_CONN:
e46aa4f6	113	conn = g_variant_get_string(src->data, NULL);
0aba65da	114	break;
1953564a	115	case SR_CONF_SERIALCOMM:
e46aa4f6	116	serialcomm = g_variant_get_string(src->data, NULL);
0aba65da UH	117	break;
	118	}
	119	}
	120	if (!conn)
	121	return NULL;
	122
	123	if (serialcomm == NULL)
	124	serialcomm = SERIALCOMM;
	125
	126	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
	127	return NULL;
	128
	129	/* The discovery procedure is like this: first send the Reset
	130	* command (0x00) 5 times, since the device could be anywhere
	131	* in a 5-byte command. Then send the ID command (0x02).
	132	* If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	133	* have a match.
	134	*/
	135	sr_info("Probing %s.", conn);
	136	if (serial_open(serial, SERIAL_RDWR \| SERIAL_NONBLOCK) != SR_OK)
	137	return NULL;
	138
	139	ret = SR_OK;
	140	for (i = 0; i < 5; i++) {
	141	if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
	142	sr_err("Port %s is not writable.", conn);
	143	break;
	144	}
	145	}
	146	if (ret != SR_OK) {
	147	serial_close(serial);
	148	sr_err("Could not use port %s. Quitting.", conn);
	149	return NULL;
	150	}
	151	send_shortcommand(serial, CMD_ID);
	152
	153	/* Wait 10ms for a response. */
	154	g_usleep(10000);
	155
bf72f649	156	sp_get_port_handle(serial->data, &probefd.fd);
0aba65da UH	157	probefd.events = G_IO_IN;
	158	g_poll(&probefd, 1, 1);
	159
	160	if (probefd.revents != G_IO_IN)
	161	return NULL;
9f5d4c3c	162	if (serial_read_blocking(serial, buf, 4) != 4)
0aba65da UH	163	return NULL;
	164	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
	165	return NULL;
	166
	167	/* Definitely using the OLS protocol, check if it supports
	168	* the metadata command.
	169	*/
	170	send_shortcommand(serial, CMD_METADATA);
	171	if (g_poll(&probefd, 1, 10) > 0) {
	172	/* Got metadata. */
	173	sdi = get_metadata(serial);
	174	sdi->index = 0;
	175	devc = sdi->priv;
	176	} else {
	177	/* Not an OLS -- some other board that uses the sump protocol. */
72cd99b8	178	sr_info("Device does not support metadata.");
0aba65da UH	179	sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
	180	"Sump", "Logic Analyzer", "v1.0");
	181	sdi->driver = di;
0aba65da UH	182	for (i = 0; i < 32; i++) {
	183	if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
	184	ols_probe_names[i])))
	185	return 0;
	186	sdi->probes = g_slist_append(sdi->probes, probe);
	187	}
bf256783	188	devc = ols_dev_new();
0aba65da UH	189	sdi->priv = devc;
0aba65da UH	190	}
bf256783 BV	191	/* Configure samplerate and divider. */
	192	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
	193	sr_dbg("Failed to set default samplerate (%"PRIu64").",
	194	DEFAULT_SAMPLERATE);
	195	/* Clear trigger masks, values and stages. */
	196	ols_configure_probes(sdi);
459a0f26 BV	197	sdi->inst_type = SR_INST_SERIAL;
459a0f26 BV	198	sdi->conn = serial;
bf256783	199
0aba65da UH	200	drvc->instances = g_slist_append(drvc->instances, sdi);
	201	devices = g_slist_append(devices, sdi);
	202
	203	serial_close(serial);
	204
	205	return devices;
	206	}
	207
03f4de8c	208	static GSList *dev_list(void)
0aba65da	209	{
0e94d524	210	return ((struct drv_context *)(di->priv))->instances;
0aba65da UH	211	}
0aba65da UH	212
eea49cf1	213	static int cleanup(void)
0aba65da	214	{
eea49cf1	215	return dev_clear();
0aba65da UH	216	}
0aba65da UH	217
8f996b89 ML	218	static int config_get(int id, GVariant *data, const struct sr_dev_inst sdi,
8f996b89 ML	219	const struct sr_probe_group *probe_group)
0aba65da UH	220	{
	221	struct dev_context *devc;
	222
8f996b89 ML	223	(void)probe_group;
8f996b89 ML	224
0c05591a BV	225	if (!sdi)
	226	return SR_ERR_ARG;
	227
	228	devc = sdi->priv;
035a1078	229	switch (id) {
123e1313	230	case SR_CONF_SAMPLERATE:
0c05591a BV	231	*data = g_variant_new_uint64(devc->cur_samplerate);
	232	break;
	233	case SR_CONF_CAPTURE_RATIO:
	234	*data = g_variant_new_uint64(devc->capture_ratio);
	235	break;
	236	case SR_CONF_LIMIT_SAMPLES:
	237	*data = g_variant_new_uint64(devc->limit_samples);
	238	break;
967760a8 MR	239	case SR_CONF_PATTERN_MODE:
	240	if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
	241	*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
	242	else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
	243	*data = g_variant_new_string(STR_PATTERN_INTERNAL);
	244	break;
0c05591a BV	245	case SR_CONF_RLE:
0c05591a BV	246	*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
7730e4f0	247	break;
0aba65da	248	default:
bd6fbf62	249	return SR_ERR_NA;
0aba65da UH	250	}
	251
	252	return SR_OK;
	253	}
	254
8f996b89 ML	255	static int config_set(int id, GVariant data, const struct sr_dev_inst sdi,
8f996b89 ML	256	const struct sr_probe_group *probe_group)
0aba65da UH	257	{
	258	struct dev_context *devc;
	259	int ret;
e46aa4f6	260	uint64_t tmp_u64;
967760a8	261	const char *stropt;
0aba65da	262
8f996b89 ML	263	(void)probe_group;
8f996b89 ML	264
e73ffd42 BV	265	if (sdi->status != SR_ST_ACTIVE)
	266	return SR_ERR_DEV_CLOSED;
	267
0aba65da UH	268	devc = sdi->priv;
0aba65da UH	269
035a1078	270	switch (id) {
1953564a	271	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	272	tmp_u64 = g_variant_get_uint64(data);
	273	if (tmp_u64 < samplerates[0] \|\| tmp_u64 > samplerates[1])
	274	return SR_ERR_SAMPLERATE;
	275	ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
0aba65da	276	break;
1953564a	277	case SR_CONF_LIMIT_SAMPLES:
e46aa4f6 BV	278	tmp_u64 = g_variant_get_uint64(data);
e46aa4f6 BV	279	if (tmp_u64 < MIN_NUM_SAMPLES)
0aba65da	280	return SR_ERR;
e46aa4f6	281	devc->limit_samples = tmp_u64;
0aba65da UH	282	ret = SR_OK;
0aba65da UH	283	break;
1953564a	284	case SR_CONF_CAPTURE_RATIO:
e46aa4f6	285	devc->capture_ratio = g_variant_get_uint64(data);
0aba65da UH	286	if (devc->capture_ratio < 0 \|\| devc->capture_ratio > 100) {
	287	devc->capture_ratio = 0;
	288	ret = SR_ERR;
	289	} else
	290	ret = SR_OK;
	291	break;
eb1b610b MR	292	case SR_CONF_EXTERNAL_CLOCK:
	293	if (g_variant_get_boolean(data)) {
	294	sr_info("Enabling external clock.");
	295	devc->flag_reg \|= FLAG_CLOCK_EXTERNAL;
	296	} else {
	297	sr_info("Disabled external clock.");
	298	devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
	299	}
	300	ret = SR_OK;
	301	break;
967760a8 MR	302	case SR_CONF_PATTERN_MODE:
	303	stropt = g_variant_get_string(data, NULL);
	304	ret = SR_OK;
	305	if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
	306	sr_info("Enabling internal test mode.");
	307	devc->flag_reg \|= FLAG_INTERNAL_TEST_MODE;
	308	} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
	309	sr_info("Enabling external test mode.");
	310	devc->flag_reg \|= FLAG_EXTERNAL_TEST_MODE;
	311	} else {
	312	ret = SR_ERR;
	313	}
	314	break;
7b0a57fd MR	315	case SR_CONF_SWAP:
	316	if (g_variant_get_boolean(data)) {
	317	sr_info("Enabling channel swapping.");
	318	devc->flag_reg \|= FLAG_SWAP_PROBES;
	319	} else {
	320	sr_info("Disabling channel swapping.");
	321	devc->flag_reg &= ~FLAG_SWAP_PROBES;
	322	}
	323	ret = SR_OK;
	324	break;
	325
1953564a	326	case SR_CONF_RLE:
e46aa4f6	327	if (g_variant_get_boolean(data)) {
0aba65da UH	328	sr_info("Enabling RLE.");
0aba65da UH	329	devc->flag_reg \|= FLAG_RLE;
aeea0572 BV	330	} else {
	331	sr_info("Disabling RLE.");
	332	devc->flag_reg &= ~FLAG_RLE;
0aba65da UH	333	}
	334	ret = SR_OK;
	335	break;
	336	default:
bd6fbf62	337	ret = SR_ERR_NA;
0aba65da UH	338	}
	339
	340	return ret;
	341	}
	342
8f996b89 ML	343	static int config_list(int key, GVariant *data, const struct sr_dev_inst sdi,
8f996b89 ML	344	const struct sr_probe_group *probe_group)
a1c743fc	345	{
f0de2dd0 BV	346	struct dev_context *devc;
f0de2dd0 BV	347	GVariant gvar, grange[2];
e46aa4f6	348	GVariantBuilder gvb;
f0de2dd0	349	int num_channels, i;
a1c743fc	350
8f996b89	351	(void)probe_group;
a1c743fc BV	352
a1c743fc BV	353	switch (key) {
0d485e30	354	case SR_CONF_SCAN_OPTIONS:
e46aa4f6 BV	355	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
e46aa4f6 BV	356	hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
0d485e30	357	break;
9a6517d1	358	case SR_CONF_DEVICE_OPTIONS:
e46aa4f6 BV	359	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
e46aa4f6 BV	360	hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
9a6517d1	361	break;
a1c743fc	362	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	363	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	364	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
	365	ARRAY_SIZE(samplerates), sizeof(uint64_t));
	366	g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
	367	*data = g_variant_builder_end(&gvb);
a1c743fc	368	break;
c50277a6	369	case SR_CONF_TRIGGER_TYPE:
e46aa4f6	370	*data = g_variant_new_string(TRIGGER_TYPE);
c50277a6	371	break;
7c07a178 UH	372	case SR_CONF_PATTERN_MODE:
	373	*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
	374	break;
f0de2dd0 BV	375	case SR_CONF_LIMIT_SAMPLES:
	376	if (!sdi)
	377	return SR_ERR_ARG;
	378	devc = sdi->priv;
	379	if (devc->flag_reg & FLAG_RLE)
	380	return SR_ERR_NA;
	381	if (devc->max_samples == 0)
	382	/* Device didn't specify sample memory size in metadata. */
	383	return SR_ERR_NA;
	384	/*
	385	* Channel groups are turned off if no probes in that group are
	386	* enabled, making more room for samples for the enabled group.
	387	*/
	388	ols_configure_probes(sdi);
	389	num_channels = 0;
	390	for (i = 0; i < 4; i++) {
	391	if (devc->probe_mask & (0xff << (i * 8)))
	392	num_channels++;
	393	}
	394	grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
	395	grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
	396	*data = g_variant_new_tuple(grange, 2);
	397	break;
a1c743fc	398	default:
bd6fbf62	399	return SR_ERR_NA;
a1c743fc BV	400	}
	401
	402	return SR_OK;
	403	}
	404
03f4de8c	405	static int dev_acquisition_start(const struct sr_dev_inst *sdi,
0aba65da UH	406	void *cb_data)
0aba65da UH	407	{
0aba65da	408	struct dev_context *devc;
459a0f26	409	struct sr_serial_dev_inst *serial;
0aba65da UH	410	uint32_t trigger_config[4];
	411	uint32_t data;
	412	uint16_t readcount, delaycount;
	413	uint8_t changrp_mask;
	414	int num_channels;
	415	int i;
	416
e73ffd42 BV	417	if (sdi->status != SR_ST_ACTIVE)
	418	return SR_ERR_DEV_CLOSED;
	419
0aba65da	420	devc = sdi->priv;
459a0f26	421	serial = sdi->conn;
0aba65da	422
0aba65da UH	423	if (ols_configure_probes(sdi) != SR_OK) {
	424	sr_err("Failed to configure probes.");
	425	return SR_ERR;
	426	}
	427
	428	/*
	429	* Enable/disable channel groups in the flag register according to the
	430	* probe mask. Calculate this here, because num_channels is needed
	431	* to limit readcount.
	432	*/
	433	changrp_mask = 0;
	434	num_channels = 0;
	435	for (i = 0; i < 4; i++) {
	436	if (devc->probe_mask & (0xff << (i * 8))) {
	437	changrp_mask \|= (1 << i);
	438	num_channels++;
	439	}
	440	}
	441
	442	/*
	443	* Limit readcount to prevent reading past the end of the hardware
	444	* buffer.
	445	*/
	446	readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
	447
	448	memset(trigger_config, 0, 16);
2e5b73c0	449	trigger_config[devc->num_stages] \|= 0x08;
0aba65da UH	450	if (devc->trigger_mask[0]) {
	451	delaycount = readcount * (1 - devc->capture_ratio / 100.0);
	452	devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
	453
459a0f26	454	if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
0aba65da UH	455	reverse32(devc->trigger_mask[0])) != SR_OK)
0aba65da UH	456	return SR_ERR;
459a0f26	457	if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
0aba65da UH	458	reverse32(devc->trigger_value[0])) != SR_OK)
0aba65da UH	459	return SR_ERR;
459a0f26	460	if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
0aba65da UH	461	trigger_config[0]) != SR_OK)
	462	return SR_ERR;
	463
459a0f26	464	if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_1,
0aba65da UH	465	reverse32(devc->trigger_mask[1])) != SR_OK)
0aba65da UH	466	return SR_ERR;
459a0f26	467	if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_1,
0aba65da UH	468	reverse32(devc->trigger_value[1])) != SR_OK)
0aba65da UH	469	return SR_ERR;
459a0f26	470	if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_1,
0aba65da UH	471	trigger_config[1]) != SR_OK)
	472	return SR_ERR;
	473
459a0f26	474	if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_2,
0aba65da UH	475	reverse32(devc->trigger_mask[2])) != SR_OK)
0aba65da UH	476	return SR_ERR;
459a0f26	477	if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_2,
0aba65da UH	478	reverse32(devc->trigger_value[2])) != SR_OK)
0aba65da UH	479	return SR_ERR;
459a0f26	480	if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_2,
0aba65da UH	481	trigger_config[2]) != SR_OK)
	482	return SR_ERR;
	483
459a0f26	484	if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_3,
0aba65da UH	485	reverse32(devc->trigger_mask[3])) != SR_OK)
0aba65da UH	486	return SR_ERR;
459a0f26	487	if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_3,
0aba65da UH	488	reverse32(devc->trigger_value[3])) != SR_OK)
0aba65da UH	489	return SR_ERR;
459a0f26	490	if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_3,
0aba65da UH	491	trigger_config[3]) != SR_OK)
	492	return SR_ERR;
	493	} else {
459a0f26	494	if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
0aba65da UH	495	devc->trigger_mask[0]) != SR_OK)
0aba65da UH	496	return SR_ERR;
459a0f26	497	if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
0aba65da UH	498	devc->trigger_value[0]) != SR_OK)
0aba65da UH	499	return SR_ERR;
459a0f26	500	if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
0aba65da UH	501	0x00000008) != SR_OK)
	502	return SR_ERR;
	503	delaycount = readcount;
	504	}
	505
	506	sr_info("Setting samplerate to %" PRIu64 "Hz (divider %u, "
de524099 MR	507	"demux %s, noise_filter %s)", devc->cur_samplerate,
	508	devc->cur_samplerate_divider,
	509	devc->flag_reg & FLAG_DEMUX ? "on" : "off",
	510	devc->flag_reg & FLAG_FILTER ? "on": "off");
459a0f26	511	if (send_longcommand(serial, CMD_SET_DIVIDER,
0aba65da UH	512	reverse32(devc->cur_samplerate_divider)) != SR_OK)
	513	return SR_ERR;
	514
	515	/* Send sample limit and pre/post-trigger capture ratio. */
	516	data = ((readcount - 1) & 0xffff) << 16;
	517	data \|= (delaycount - 1) & 0xffff;
459a0f26	518	if (send_longcommand(serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
0aba65da UH	519	return SR_ERR;
	520
	521	/* The flag register wants them here, and 1 means "disable channel". */
	522	devc->flag_reg \|= ~(changrp_mask << 2) & 0x3c;
0aba65da UH	523	devc->rle_count = 0;
0aba65da UH	524	data = (devc->flag_reg << 24) \| ((devc->flag_reg << 8) & 0xff0000);
459a0f26	525	if (send_longcommand(serial, CMD_SET_FLAGS, data) != SR_OK)
0aba65da UH	526	return SR_ERR;
	527
	528	/* Start acquisition on the device. */
459a0f26	529	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
0aba65da UH	530	return SR_ERR;
0aba65da UH	531
bf256783 BV	532	/* Reset all operational states. */
bf256783 BV	533	devc->num_transfers = devc->num_samples = devc->num_bytes = 0;
abb39e6b	534	memset(devc->sample, 0, 4);
bf256783	535
4afdfd46	536	/* Send header packet to the session bus. */
29a27196	537	std_session_send_df_header(cb_data, LOG_PREFIX);
4afdfd46	538
abc4b335	539	serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);
0aba65da	540
0aba65da UH	541	return SR_OK;
	542	}
	543
03f4de8c	544	static int dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
0aba65da	545	{
0aba65da UH	546	(void)cb_data;
	547
	548	abort_acquisition(sdi);
	549
	550	return SR_OK;
	551	}
	552
	553	SR_PRIV struct sr_dev_driver ols_driver_info = {
	554	.name = "ols",
	555	.longname = "Openbench Logic Sniffer",
	556	.api_version = 1,
03f4de8c	557	.init = init,
eea49cf1	558	.cleanup = cleanup,
03f4de8c BV	559	.scan = scan,
	560	.dev_list = dev_list,
	561	.dev_clear = dev_clear,
035a1078 BV	562	.config_get = config_get,
035a1078 BV	563	.config_set = config_set,
a1c743fc	564	.config_list = config_list,
854434de	565	.dev_open = std_serial_dev_open,
bf2c987f	566	.dev_close = std_serial_dev_close,
03f4de8c BV	567	.dev_acquisition_start = dev_acquisition_start,
03f4de8c BV	568	.dev_acquisition_stop = dev_acquisition_stop,
0aba65da UH	569	.priv = NULL,
0aba65da UH	570	};