[libsigrok.git] / hardware / openbench-logic-sniffer / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "protocol.h"
#include <libserialport.h>

#define SERIALCOMM "115200/8n1"

static const int32_t hwopts[] = {
	SR_CONF_CONN,
	SR_CONF_SERIALCOMM,
};

static const int32_t hwcaps[] = {
	SR_CONF_LOGIC_ANALYZER,
	SR_CONF_SAMPLERATE,
	SR_CONF_TRIGGER_TYPE,
	SR_CONF_CAPTURE_RATIO,
	SR_CONF_LIMIT_SAMPLES,
	SR_CONF_EXTERNAL_CLOCK,
	SR_CONF_PATTERN_MODE,
	SR_CONF_SWAP,
	SR_CONF_RLE,
};

#define STR_PATTERN_NONE     "None"
#define STR_PATTERN_EXTERNAL "External"
#define STR_PATTERN_INTERNAL "Internal"

/* Supported methods of test pattern outputs */
enum {
	/**
	 * Capture pins 31:16 (unbuffered wing) output a test pattern
	 * that can captured on pins 0:15.
	 */
	PATTERN_EXTERNAL,

	/** Route test pattern internally to capture buffer. */
	PATTERN_INTERNAL,
};

static const char *patterns[] = {
	STR_PATTERN_NONE,
	STR_PATTERN_EXTERNAL,
	STR_PATTERN_INTERNAL,
};

/* Probes are numbered 0-31 (on the PCB silkscreen). */
SR_PRIV const char *ols_probe_names[NUM_PROBES + 1] = {
	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	"24", "25", "26", "27", "28", "29", "30", "31",
	NULL,
};

/* Default supported samplerates, can be overridden by device metadata. */
static const uint64_t samplerates[] = {
	SR_HZ(10),
	SR_MHZ(200),
	SR_HZ(1),
};

SR_PRIV struct sr_dev_driver ols_driver_info;
static struct sr_dev_driver *di = &ols_driver_info;

static int dev_clear(void)
{
	return std_dev_clear(di, NULL);
}

static int init(struct sr_context *sr_ctx)
{
	return std_init(sr_ctx, di, LOG_PREFIX);
}

static GSList *scan(GSList *options)
{
	struct sr_config *src;
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	struct sr_probe *probe;
	struct sr_serial_dev_inst *serial;
	GPollFD probefd;
	GSList *l, *devices;
	int ret, i;
	const char *conn, *serialcomm;
	char buf[8];

	drvc = di->priv;

	devices = NULL;

	conn = serialcomm = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		case SR_CONF_SERIALCOMM:
			serialcomm = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	if (!conn)
		return NULL;

	if (serialcomm == NULL)
		serialcomm = SERIALCOMM;

	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
		return NULL;

	/* The discovery procedure is like this: first send the Reset
	 * command (0x00) 5 times, since the device could be anywhere
	 * in a 5-byte command. Then send the ID command (0x02).
	 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	 * have a match.
	 */
	sr_info("Probing %s.", conn);
	if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
		return NULL;

	ret = SR_OK;
	for (i = 0; i < 5; i++) {
		if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
			sr_err("Port %s is not writable.", conn);
			break;
		}
	}
	if (ret != SR_OK) {
		serial_close(serial);
		sr_err("Could not use port %s. Quitting.", conn);
		return NULL;
	}
	send_shortcommand(serial, CMD_ID);

	/* Wait 10ms for a response. */
	g_usleep(10000);

	sp_get_port_handle(serial->data, &probefd.fd);
	probefd.events = G_IO_IN;
	g_poll(&probefd, 1, 1);

	if (probefd.revents != G_IO_IN)
		return NULL;
	if (serial_read_blocking(serial, buf, 4) != 4)
		return NULL;
	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
		return NULL;

	/* Definitely using the OLS protocol, check if it supports
	 * the metadata command.
	 */
	send_shortcommand(serial, CMD_METADATA);
	if (g_poll(&probefd, 1, 10) > 0) {
		/* Got metadata. */
		sdi = get_metadata(serial);
		sdi->index = 0;
		devc = sdi->priv;
	} else {
		/* Not an OLS -- some other board that uses the sump protocol. */
		sr_info("Device does not support metadata.");
		sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
				"Sump", "Logic Analyzer", "v1.0");
		sdi->driver = di;
		for (i = 0; i < 32; i++) {
			if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
					ols_probe_names[i])))
				return 0;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}
		devc = ols_dev_new();
		sdi->priv = devc;
	}
	/* Configure samplerate and divider. */
	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
		sr_dbg("Failed to set default samplerate (%"PRIu64").",
				DEFAULT_SAMPLERATE);
	/* Clear trigger masks, values and stages. */
	ols_configure_probes(sdi);
	sdi->inst_type = SR_INST_SERIAL;
	sdi->conn = serial;

	drvc->instances = g_slist_append(drvc->instances, sdi);
	devices = g_slist_append(devices, sdi);

	serial_close(serial);

	return devices;
}

static GSList *dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int cleanup(void)
{
	return dev_clear();
}

static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_probe_group *probe_group)
{
	struct dev_context *devc;

	(void)probe_group;

	if (!sdi)
		return SR_ERR_ARG;

	devc = sdi->priv;
	switch (id) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
	case SR_CONF_PATTERN_MODE:
		if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
		else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_INTERNAL);
		else
			*data = g_variant_new_string(STR_PATTERN_NONE);
		break;
	case SR_CONF_RLE:
		*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_probe_group *probe_group)
{
	struct dev_context *devc;
	uint16_t flag;
	uint64_t tmp_u64;
	int ret;
	const char *stropt;

	(void)probe_group;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;

	switch (id) {
	case SR_CONF_SAMPLERATE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
			return SR_ERR_SAMPLERATE;
		ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < MIN_NUM_SAMPLES)
			return SR_ERR;
		devc->limit_samples = tmp_u64;
		ret = SR_OK;
		break;
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
			devc->capture_ratio = 0;
			ret = SR_ERR;
		} else
			ret = SR_OK;
		break;
	case SR_CONF_EXTERNAL_CLOCK:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling external clock.");
			devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
		} else {
			sr_info("Disabled external clock.");
			devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
		}
		ret = SR_OK;
		break;
	case SR_CONF_PATTERN_MODE:
		stropt = g_variant_get_string(data, NULL);
		ret = SR_OK;
		flag = 0xffff;
		if (!strcmp(stropt, STR_PATTERN_NONE)) {
			sr_info("Disabling test modes.");
			flag = 0x0000;
		}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
			sr_info("Enabling internal test mode.");
			flag = FLAG_INTERNAL_TEST_MODE;
		} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
			sr_info("Enabling external test mode.");
			flag = FLAG_EXTERNAL_TEST_MODE;
		} else {
			ret = SR_ERR;
		}
		if (flag != 0xffff) {
			devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
			devc->flag_reg |= flag;
		}
		break;
	case SR_CONF_SWAP:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling channel swapping.");
			devc->flag_reg |= FLAG_SWAP_PROBES;
		} else {
			sr_info("Disabling channel swapping.");
			devc->flag_reg &= ~FLAG_SWAP_PROBES;
		}
		ret = SR_OK;
		break;

	case SR_CONF_RLE:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling RLE.");
			devc->flag_reg |= FLAG_RLE;
		} else {
			sr_info("Disabling RLE.");
			devc->flag_reg &= ~FLAG_RLE;
		}
		ret = SR_OK;
		break;
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_probe_group *probe_group)
{
	struct dev_context *devc;
	GVariant *gvar, *grange[2];
	GVariantBuilder gvb;
	int num_channels, i;

	(void)probe_group;

	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
		break;
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				ARRAY_SIZE(samplerates), sizeof(uint64_t));
		g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_TYPE:
		*data = g_variant_new_string(TRIGGER_TYPE);
		break;
	case SR_CONF_PATTERN_MODE:
		*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		if (!sdi)
			return SR_ERR_ARG;
		devc = sdi->priv;
		if (devc->flag_reg & FLAG_RLE)
			return SR_ERR_NA;
		if (devc->max_samples == 0)
			/* Device didn't specify sample memory size in metadata. */
			return SR_ERR_NA;
		/*
		 * Channel groups are turned off if no probes in that group are
		 * enabled, making more room for samples for the enabled group.
		*/
		ols_configure_probes(sdi);
		num_channels = 0;
		for (i = 0; i < 4; i++) {
			if (devc->probe_mask & (0xff << (i * 8)))
				num_channels++;
		}
		grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
		*data = g_variant_new_tuple(grange, 2);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int set_trigger(const struct sr_dev_inst *sdi, int stage)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint8_t cmd, arg[4];

	devc = sdi->priv;
	serial = sdi->conn;

	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	arg[0] = devc->trigger_mask[stage] & 0xff;
	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	arg[0] = devc->trigger_value[stage] & 0xff;
	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	arg[0] = arg[1] = arg[3] = 0x00;
	arg[2] = stage;
	if (stage == devc->num_stages)
		/* Last stage, fire when this one matches. */
		arg[3] |= TRIGGER_START;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi,
		void *cb_data)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint16_t samplecount, readcount, delaycount;
	uint8_t changrp_mask, arg[4];
	int num_channels;
	int ret, i;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;
	serial = sdi->conn;

	if (ols_configure_probes(sdi) != SR_OK) {
		sr_err("Failed to configure probes.");
		return SR_ERR;
	}

	/*
	 * Enable/disable channel groups in the flag register according to the
	 * probe mask. Calculate this here, because num_channels is needed
	 * to limit readcount.
	 */
	changrp_mask = 0;
	num_channels = 0;
	for (i = 0; i < 4; i++) {
		if (devc->probe_mask & (0xff << (i * 8))) {
			changrp_mask |= (1 << i);
			num_channels++;
		}
	}

	/*
	 * Limit readcount to prevent reading past the end of the hardware
	 * buffer.
	 */
	samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
	readcount = samplecount / 4;

	/* Rather read too many samples than too few. */
	if (samplecount % 4 != 0)
		readcount++;

	/* Basic triggers. */
	if (devc->trigger_mask[0] != 0x00000000) {
		/* At least one probe has a trigger on it. */
		delaycount = readcount * (1 - devc->capture_ratio / 100.0);
		devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
		for (i = 0; i <= devc->num_stages; i++) {
			sr_dbg("Setting stage %d trigger.", i);
			if ((ret = set_trigger(sdi, i)) != SR_OK)
				return ret;
		}
	} else {
		/* No triggers configured, force trigger on first stage. */
		sr_dbg("Forcing trigger at stage 0.");
		if ((ret = set_trigger(sdi, 0)) != SR_OK)
			return ret;
		delaycount = readcount;
	}

	/* Samplerate. */
	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
			devc->cur_samplerate, devc->cur_samplerate_divider);
	arg[0] = devc->cur_samplerate_divider & 0xff;
	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
		return SR_ERR;

	/* Send sample limit and pre/post-trigger capture ratio. */
	sr_dbg("Setting sample limit %d, trigger point at %d",
			(readcount - 1) * 4, (delaycount - 1) * 4);
	arg[0] = ((readcount - 1) & 0xff);
	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	arg[2] = ((delaycount - 1) & 0xff);
	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
		return SR_ERR;

	/* Flag register. */
	sr_dbg("Setting demux %s, noise_filter %s, extpat %s, intpat %s",
			devc->flag_reg & FLAG_DEMUX ? "on" : "off",
			devc->flag_reg & FLAG_FILTER ? "on": "off",
			devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off");
	/* 1 means "disable channel". */
	devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
	arg[0] = devc->flag_reg & 0xff;
	arg[1] = devc->flag_reg >> 8;
	arg[2] = arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
		return SR_ERR;

	/* Start acquisition on the device. */
	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
		return SR_ERR;

	/* Reset all operational states. */
	devc->rle_count = devc->num_transfers = 0;
	devc->num_samples = devc->num_bytes = 0;
	memset(devc->sample, 0, 4);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, LOG_PREFIX);

	serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	(void)cb_data;

	abort_acquisition(sdi);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver ols_driver_info = {
	.name = "ols",
	.longname = "Openbench Logic Sniffer",
	.api_version = 1,
	.init = init,
	.cleanup = cleanup,
	.scan = scan,
	.dev_list = dev_list,
	.dev_clear = dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = std_serial_dev_open,
	.dev_close = std_serial_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
0aba65da	1	/*
50985c20	2	* This file is part of the libsigrok project.
0aba65da	3	*
13d8e03c	4	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
0aba65da UH	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "protocol.h"
bf72f649	21	#include <libserialport.h>
0aba65da UH	22
	23	#define SERIALCOMM "115200/8n1"
	24
e46aa4f6	25	static const int32_t hwopts[] = {
1953564a BV	26	SR_CONF_CONN,
1953564a BV	27	SR_CONF_SERIALCOMM,
aeabd308 UH	28	};
aeabd308 UH	29
e46aa4f6	30	static const int32_t hwcaps[] = {
1953564a BV	31	SR_CONF_LOGIC_ANALYZER,
1953564a BV	32	SR_CONF_SAMPLERATE,
0c05591a	33	SR_CONF_TRIGGER_TYPE,
1953564a BV	34	SR_CONF_CAPTURE_RATIO,
1953564a BV	35	SR_CONF_LIMIT_SAMPLES,
eb1b610b	36	SR_CONF_EXTERNAL_CLOCK,
967760a8	37	SR_CONF_PATTERN_MODE,
7b0a57fd	38	SR_CONF_SWAP,
1953564a	39	SR_CONF_RLE,
0aba65da UH	40	};
0aba65da UH	41
6d16fdfb BV	42	#define STR_PATTERN_NONE "None"
	43	#define STR_PATTERN_EXTERNAL "External"
	44	#define STR_PATTERN_INTERNAL "Internal"
967760a8 MR	45
	46	/* Supported methods of test pattern outputs */
	47	enum {
	48	/**
	49	* Capture pins 31:16 (unbuffered wing) output a test pattern
	50	* that can captured on pins 0:15.
	51	*/
	52	PATTERN_EXTERNAL,
	53
	54	/** Route test pattern internally to capture buffer. */
	55	PATTERN_INTERNAL,
	56	};
	57
7c07a178	58	static const char *patterns[] = {
6d16fdfb	59	STR_PATTERN_NONE,
7c07a178 UH	60	STR_PATTERN_EXTERNAL,
	61	STR_PATTERN_INTERNAL,
	62	};
	63
0aba65da UH	64	/* Probes are numbered 0-31 (on the PCB silkscreen). */
0aba65da UH	65	SR_PRIV const char *ols_probe_names[NUM_PROBES + 1] = {
78693401 UH	66	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	67	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	68	"24", "25", "26", "27", "28", "29", "30", "31",
0aba65da UH	69	NULL,
	70	};
	71
d3b38ad3	72	/* Default supported samplerates, can be overridden by device metadata. */
e46aa4f6 BV	73	static const uint64_t samplerates[] = {
	74	SR_HZ(10),
	75	SR_MHZ(200),
	76	SR_HZ(1),
0aba65da UH	77	};
	78
	79	SR_PRIV struct sr_dev_driver ols_driver_info;
	80	static struct sr_dev_driver *di = &ols_driver_info;
	81
eea49cf1 UH	82	static int dev_clear(void)
	83	{
	84	return std_dev_clear(di, NULL);
	85	}
	86
03f4de8c	87	static int init(struct sr_context *sr_ctx)
0aba65da	88	{
f6beaac5	89	return std_init(sr_ctx, di, LOG_PREFIX);
0aba65da UH	90	}
0aba65da UH	91
03f4de8c	92	static GSList scan(GSList options)
0aba65da	93	{
1987b8d6	94	struct sr_config *src;
0aba65da UH	95	struct sr_dev_inst *sdi;
	96	struct drv_context *drvc;
	97	struct dev_context *devc;
	98	struct sr_probe *probe;
	99	struct sr_serial_dev_inst *serial;
	100	GPollFD probefd;
	101	GSList l, devices;
	102	int ret, i;
	103	const char conn, serialcomm;
	104	char buf[8];
	105
0aba65da	106	drvc = di->priv;
4b97c74e	107
0aba65da UH	108	devices = NULL;
	109
	110	conn = serialcomm = NULL;
	111	for (l = options; l; l = l->next) {
1987b8d6 BV	112	src = l->data;
1987b8d6 BV	113	switch (src->key) {
1953564a	114	case SR_CONF_CONN:
e46aa4f6	115	conn = g_variant_get_string(src->data, NULL);
0aba65da	116	break;
1953564a	117	case SR_CONF_SERIALCOMM:
e46aa4f6	118	serialcomm = g_variant_get_string(src->data, NULL);
0aba65da UH	119	break;
	120	}
	121	}
	122	if (!conn)
	123	return NULL;
	124
	125	if (serialcomm == NULL)
	126	serialcomm = SERIALCOMM;
	127
	128	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
	129	return NULL;
	130
	131	/* The discovery procedure is like this: first send the Reset
	132	* command (0x00) 5 times, since the device could be anywhere
	133	* in a 5-byte command. Then send the ID command (0x02).
	134	* If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	135	* have a match.
	136	*/
	137	sr_info("Probing %s.", conn);
	138	if (serial_open(serial, SERIAL_RDWR \| SERIAL_NONBLOCK) != SR_OK)
	139	return NULL;
	140
	141	ret = SR_OK;
	142	for (i = 0; i < 5; i++) {
	143	if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
	144	sr_err("Port %s is not writable.", conn);
	145	break;
	146	}
	147	}
	148	if (ret != SR_OK) {
	149	serial_close(serial);
	150	sr_err("Could not use port %s. Quitting.", conn);
	151	return NULL;
	152	}
	153	send_shortcommand(serial, CMD_ID);
	154
	155	/* Wait 10ms for a response. */
	156	g_usleep(10000);
	157
bf72f649	158	sp_get_port_handle(serial->data, &probefd.fd);
0aba65da UH	159	probefd.events = G_IO_IN;
	160	g_poll(&probefd, 1, 1);
	161
	162	if (probefd.revents != G_IO_IN)
	163	return NULL;
9f5d4c3c	164	if (serial_read_blocking(serial, buf, 4) != 4)
0aba65da UH	165	return NULL;
	166	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
	167	return NULL;
	168
	169	/* Definitely using the OLS protocol, check if it supports
	170	* the metadata command.
	171	*/
	172	send_shortcommand(serial, CMD_METADATA);
	173	if (g_poll(&probefd, 1, 10) > 0) {
	174	/* Got metadata. */
	175	sdi = get_metadata(serial);
	176	sdi->index = 0;
	177	devc = sdi->priv;
	178	} else {
	179	/* Not an OLS -- some other board that uses the sump protocol. */
72cd99b8	180	sr_info("Device does not support metadata.");
0aba65da UH	181	sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
	182	"Sump", "Logic Analyzer", "v1.0");
	183	sdi->driver = di;
0aba65da UH	184	for (i = 0; i < 32; i++) {
	185	if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
	186	ols_probe_names[i])))
	187	return 0;
	188	sdi->probes = g_slist_append(sdi->probes, probe);
	189	}
bf256783	190	devc = ols_dev_new();
0aba65da UH	191	sdi->priv = devc;
0aba65da UH	192	}
bf256783 BV	193	/* Configure samplerate and divider. */
	194	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
	195	sr_dbg("Failed to set default samplerate (%"PRIu64").",
	196	DEFAULT_SAMPLERATE);
	197	/* Clear trigger masks, values and stages. */
	198	ols_configure_probes(sdi);
459a0f26 BV	199	sdi->inst_type = SR_INST_SERIAL;
459a0f26 BV	200	sdi->conn = serial;
bf256783	201
0aba65da UH	202	drvc->instances = g_slist_append(drvc->instances, sdi);
	203	devices = g_slist_append(devices, sdi);
	204
	205	serial_close(serial);
	206
	207	return devices;
	208	}
	209
03f4de8c	210	static GSList *dev_list(void)
0aba65da	211	{
0e94d524	212	return ((struct drv_context *)(di->priv))->instances;
0aba65da UH	213	}
0aba65da UH	214
eea49cf1	215	static int cleanup(void)
0aba65da	216	{
eea49cf1	217	return dev_clear();
0aba65da UH	218	}
0aba65da UH	219
8f996b89 ML	220	static int config_get(int id, GVariant *data, const struct sr_dev_inst sdi,
8f996b89 ML	221	const struct sr_probe_group *probe_group)
0aba65da UH	222	{
	223	struct dev_context *devc;
	224
8f996b89 ML	225	(void)probe_group;
8f996b89 ML	226
0c05591a BV	227	if (!sdi)
	228	return SR_ERR_ARG;
	229
	230	devc = sdi->priv;
035a1078	231	switch (id) {
123e1313	232	case SR_CONF_SAMPLERATE:
0c05591a BV	233	*data = g_variant_new_uint64(devc->cur_samplerate);
	234	break;
	235	case SR_CONF_CAPTURE_RATIO:
	236	*data = g_variant_new_uint64(devc->capture_ratio);
	237	break;
	238	case SR_CONF_LIMIT_SAMPLES:
	239	*data = g_variant_new_uint64(devc->limit_samples);
	240	break;
967760a8 MR	241	case SR_CONF_PATTERN_MODE:
	242	if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
	243	*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
	244	else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
	245	*data = g_variant_new_string(STR_PATTERN_INTERNAL);
6d16fdfb BV	246	else
6d16fdfb BV	247	*data = g_variant_new_string(STR_PATTERN_NONE);
967760a8	248	break;
0c05591a BV	249	case SR_CONF_RLE:
0c05591a BV	250	*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
7730e4f0	251	break;
0aba65da	252	default:
bd6fbf62	253	return SR_ERR_NA;
0aba65da UH	254	}
	255
	256	return SR_OK;
	257	}
	258
8f996b89 ML	259	static int config_set(int id, GVariant data, const struct sr_dev_inst sdi,
8f996b89 ML	260	const struct sr_probe_group *probe_group)
0aba65da UH	261	{
0aba65da UH	262	struct dev_context *devc;
6d16fdfb	263	uint16_t flag;
e46aa4f6	264	uint64_t tmp_u64;
6d16fdfb	265	int ret;
967760a8	266	const char *stropt;
0aba65da	267
8f996b89 ML	268	(void)probe_group;
8f996b89 ML	269
e73ffd42 BV	270	if (sdi->status != SR_ST_ACTIVE)
	271	return SR_ERR_DEV_CLOSED;
	272
0aba65da UH	273	devc = sdi->priv;
0aba65da UH	274
035a1078	275	switch (id) {
1953564a	276	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	277	tmp_u64 = g_variant_get_uint64(data);
	278	if (tmp_u64 < samplerates[0] \|\| tmp_u64 > samplerates[1])
	279	return SR_ERR_SAMPLERATE;
	280	ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
0aba65da	281	break;
1953564a	282	case SR_CONF_LIMIT_SAMPLES:
e46aa4f6 BV	283	tmp_u64 = g_variant_get_uint64(data);
e46aa4f6 BV	284	if (tmp_u64 < MIN_NUM_SAMPLES)
0aba65da	285	return SR_ERR;
e46aa4f6	286	devc->limit_samples = tmp_u64;
0aba65da UH	287	ret = SR_OK;
0aba65da UH	288	break;
1953564a	289	case SR_CONF_CAPTURE_RATIO:
e46aa4f6	290	devc->capture_ratio = g_variant_get_uint64(data);
0aba65da UH	291	if (devc->capture_ratio < 0 \|\| devc->capture_ratio > 100) {
	292	devc->capture_ratio = 0;
	293	ret = SR_ERR;
	294	} else
	295	ret = SR_OK;
	296	break;
eb1b610b MR	297	case SR_CONF_EXTERNAL_CLOCK:
	298	if (g_variant_get_boolean(data)) {
	299	sr_info("Enabling external clock.");
	300	devc->flag_reg \|= FLAG_CLOCK_EXTERNAL;
	301	} else {
	302	sr_info("Disabled external clock.");
	303	devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
	304	}
	305	ret = SR_OK;
	306	break;
967760a8 MR	307	case SR_CONF_PATTERN_MODE:
	308	stropt = g_variant_get_string(data, NULL);
	309	ret = SR_OK;
6d16fdfb BV	310	flag = 0xffff;
	311	if (!strcmp(stropt, STR_PATTERN_NONE)) {
	312	sr_info("Disabling test modes.");
	313	flag = 0x0000;
	314	}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
967760a8	315	sr_info("Enabling internal test mode.");
6d16fdfb	316	flag = FLAG_INTERNAL_TEST_MODE;
967760a8 MR	317	} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
967760a8 MR	318	sr_info("Enabling external test mode.");
6d16fdfb	319	flag = FLAG_EXTERNAL_TEST_MODE;
967760a8 MR	320	} else {
	321	ret = SR_ERR;
	322	}
6d16fdfb BV	323	if (flag != 0xffff) {
	324	devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE \| FLAG_EXTERNAL_TEST_MODE);
	325	devc->flag_reg \|= flag;
	326	}
967760a8	327	break;
7b0a57fd MR	328	case SR_CONF_SWAP:
	329	if (g_variant_get_boolean(data)) {
	330	sr_info("Enabling channel swapping.");
	331	devc->flag_reg \|= FLAG_SWAP_PROBES;
	332	} else {
	333	sr_info("Disabling channel swapping.");
	334	devc->flag_reg &= ~FLAG_SWAP_PROBES;
	335	}
	336	ret = SR_OK;
	337	break;
	338
1953564a	339	case SR_CONF_RLE:
e46aa4f6	340	if (g_variant_get_boolean(data)) {
0aba65da UH	341	sr_info("Enabling RLE.");
0aba65da UH	342	devc->flag_reg \|= FLAG_RLE;
aeea0572 BV	343	} else {
	344	sr_info("Disabling RLE.");
	345	devc->flag_reg &= ~FLAG_RLE;
0aba65da UH	346	}
	347	ret = SR_OK;
	348	break;
	349	default:
bd6fbf62	350	ret = SR_ERR_NA;
0aba65da UH	351	}
	352
	353	return ret;
	354	}
	355
8f996b89 ML	356	static int config_list(int key, GVariant *data, const struct sr_dev_inst sdi,
8f996b89 ML	357	const struct sr_probe_group *probe_group)
a1c743fc	358	{
f0de2dd0 BV	359	struct dev_context *devc;
f0de2dd0 BV	360	GVariant gvar, grange[2];
e46aa4f6	361	GVariantBuilder gvb;
f0de2dd0	362	int num_channels, i;
a1c743fc	363
8f996b89	364	(void)probe_group;
a1c743fc BV	365
a1c743fc BV	366	switch (key) {
0d485e30	367	case SR_CONF_SCAN_OPTIONS:
e46aa4f6 BV	368	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
e46aa4f6 BV	369	hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
0d485e30	370	break;
9a6517d1	371	case SR_CONF_DEVICE_OPTIONS:
e46aa4f6 BV	372	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
e46aa4f6 BV	373	hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
9a6517d1	374	break;
a1c743fc	375	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	376	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	377	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
	378	ARRAY_SIZE(samplerates), sizeof(uint64_t));
	379	g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
	380	*data = g_variant_builder_end(&gvb);
a1c743fc	381	break;
c50277a6	382	case SR_CONF_TRIGGER_TYPE:
e46aa4f6	383	*data = g_variant_new_string(TRIGGER_TYPE);
c50277a6	384	break;
7c07a178 UH	385	case SR_CONF_PATTERN_MODE:
	386	*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
	387	break;
f0de2dd0 BV	388	case SR_CONF_LIMIT_SAMPLES:
	389	if (!sdi)
	390	return SR_ERR_ARG;
	391	devc = sdi->priv;
	392	if (devc->flag_reg & FLAG_RLE)
	393	return SR_ERR_NA;
	394	if (devc->max_samples == 0)
	395	/* Device didn't specify sample memory size in metadata. */
	396	return SR_ERR_NA;
	397	/*
	398	* Channel groups are turned off if no probes in that group are
	399	* enabled, making more room for samples for the enabled group.
	400	*/
	401	ols_configure_probes(sdi);
	402	num_channels = 0;
	403	for (i = 0; i < 4; i++) {
	404	if (devc->probe_mask & (0xff << (i * 8)))
	405	num_channels++;
	406	}
	407	grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
	408	grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
	409	*data = g_variant_new_tuple(grange, 2);
	410	break;
a1c743fc	411	default:
bd6fbf62	412	return SR_ERR_NA;
a1c743fc BV	413	}
	414
	415	return SR_OK;
	416	}
	417
016e72f3 BV	418	static int set_trigger(const struct sr_dev_inst *sdi, int stage)
	419	{
	420	struct dev_context *devc;
	421	struct sr_serial_dev_inst *serial;
	422	uint8_t cmd, arg[4];
	423
	424	devc = sdi->priv;
	425	serial = sdi->conn;
	426
	427	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	428	arg[0] = devc->trigger_mask[stage] & 0xff;
	429	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	430	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	431	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	432	if (send_longcommand(serial, cmd, arg) != SR_OK)
	433	return SR_ERR;
	434
	435	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	436	arg[0] = devc->trigger_value[stage] & 0xff;
	437	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	438	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	439	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	440	if (send_longcommand(serial, cmd, arg) != SR_OK)
	441	return SR_ERR;
	442
	443	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	444	arg[0] = arg[1] = arg[3] = 0x00;
	445	arg[2] = stage;
	446	if (stage == devc->num_stages)
	447	/* Last stage, fire when this one matches. */
	448	arg[3] \|= TRIGGER_START;
	449	if (send_longcommand(serial, cmd, arg) != SR_OK)
	450	return SR_ERR;
	451
	452	return SR_OK;
	453	}
	454
03f4de8c	455	static int dev_acquisition_start(const struct sr_dev_inst *sdi,
0aba65da UH	456	void *cb_data)
0aba65da UH	457	{
0aba65da	458	struct dev_context *devc;
459a0f26	459	struct sr_serial_dev_inst *serial;
32f09bfd	460	uint16_t samplecount, readcount, delaycount;
016e72f3	461	uint8_t changrp_mask, arg[4];
0aba65da	462	int num_channels;
016e72f3	463	int ret, i;
0aba65da	464
e73ffd42 BV	465	if (sdi->status != SR_ST_ACTIVE)
	466	return SR_ERR_DEV_CLOSED;
	467
0aba65da	468	devc = sdi->priv;
459a0f26	469	serial = sdi->conn;
0aba65da	470
0aba65da UH	471	if (ols_configure_probes(sdi) != SR_OK) {
	472	sr_err("Failed to configure probes.");
	473	return SR_ERR;
	474	}
	475
	476	/*
	477	* Enable/disable channel groups in the flag register according to the
	478	* probe mask. Calculate this here, because num_channels is needed
	479	* to limit readcount.
	480	*/
	481	changrp_mask = 0;
	482	num_channels = 0;
	483	for (i = 0; i < 4; i++) {
	484	if (devc->probe_mask & (0xff << (i * 8))) {
	485	changrp_mask \|= (1 << i);
	486	num_channels++;
	487	}
	488	}
	489
	490	/*
	491	* Limit readcount to prevent reading past the end of the hardware
	492	* buffer.
	493	*/
32f09bfd BV	494	samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
32f09bfd BV	495	readcount = samplecount / 4;
016e72f3 BV	496
	497	/* Rather read too many samples than too few. */
	498	if (samplecount % 4 != 0)
32f09bfd	499	readcount++;
0aba65da	500
016e72f3 BV	501	/* Basic triggers. */
	502	if (devc->trigger_mask[0] != 0x00000000) {
	503	/* At least one probe has a trigger on it. */
0aba65da UH	504	delaycount = readcount * (1 - devc->capture_ratio / 100.0);
0aba65da UH	505	devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
016e72f3 BV	506	for (i = 0; i <= devc->num_stages; i++) {
	507	sr_dbg("Setting stage %d trigger.", i);
	508	if ((ret = set_trigger(sdi, i)) != SR_OK)
	509	return ret;
	510	}
0aba65da	511	} else {
016e72f3 BV	512	/* No triggers configured, force trigger on first stage. */
	513	sr_dbg("Forcing trigger at stage 0.");
	514	if ((ret = set_trigger(sdi, 0)) != SR_OK)
	515	return ret;
0aba65da UH	516	delaycount = readcount;
	517	}
	518
6d16fdfb	519	/* Samplerate. */
016e72f3	520	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
6d16fdfb	521	devc->cur_samplerate, devc->cur_samplerate_divider);
016e72f3 BV	522	arg[0] = devc->cur_samplerate_divider & 0xff;
	523	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	524	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	525	arg[3] = 0x00;
	526	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
0aba65da UH	527	return SR_ERR;
	528
	529	/* Send sample limit and pre/post-trigger capture ratio. */
016e72f3	530	sr_dbg("Setting sample limit %d, trigger point at %d",
6d16fdfb	531	(readcount - 1) * 4, (delaycount - 1) * 4);
016e72f3 BV	532	arg[0] = ((readcount - 1) & 0xff);
	533	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	534	arg[2] = ((delaycount - 1) & 0xff);
	535	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	536	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
0aba65da UH	537	return SR_ERR;
0aba65da UH	538
6d16fdfb	539	/* Flag register. */
016e72f3	540	sr_dbg("Setting demux %s, noise_filter %s, extpat %s, intpat %s",
6d16fdfb BV	541	devc->flag_reg & FLAG_DEMUX ? "on" : "off",
	542	devc->flag_reg & FLAG_FILTER ? "on": "off",
	543	devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
	544	devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off");
	545	/* 1 means "disable channel". */
0aba65da	546	devc->flag_reg \|= ~(changrp_mask << 2) & 0x3c;
016e72f3 BV	547	arg[0] = devc->flag_reg & 0xff;
	548	arg[1] = devc->flag_reg >> 8;
	549	arg[2] = arg[3] = 0x00;
	550	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
0aba65da UH	551	return SR_ERR;
	552
	553	/* Start acquisition on the device. */
459a0f26	554	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
0aba65da UH	555	return SR_ERR;
0aba65da UH	556
bf256783	557	/* Reset all operational states. */
6d16fdfb BV	558	devc->rle_count = devc->num_transfers = 0;
6d16fdfb BV	559	devc->num_samples = devc->num_bytes = 0;
abb39e6b	560	memset(devc->sample, 0, 4);
bf256783	561
4afdfd46	562	/* Send header packet to the session bus. */
29a27196	563	std_session_send_df_header(cb_data, LOG_PREFIX);
4afdfd46	564
abc4b335	565	serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);
0aba65da	566
0aba65da UH	567	return SR_OK;
	568	}
	569
03f4de8c	570	static int dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
0aba65da	571	{
0aba65da UH	572	(void)cb_data;
	573
	574	abort_acquisition(sdi);
	575
	576	return SR_OK;
	577	}
	578
	579	SR_PRIV struct sr_dev_driver ols_driver_info = {
	580	.name = "ols",
	581	.longname = "Openbench Logic Sniffer",
	582	.api_version = 1,
03f4de8c	583	.init = init,
eea49cf1	584	.cleanup = cleanup,
03f4de8c BV	585	.scan = scan,
	586	.dev_list = dev_list,
	587	.dev_clear = dev_clear,
035a1078 BV	588	.config_get = config_get,
035a1078 BV	589	.config_set = config_set,
a1c743fc	590	.config_list = config_list,
854434de	591	.dev_open = std_serial_dev_open,
bf2c987f	592	.dev_close = std_serial_dev_close,
03f4de8c BV	593	.dev_acquisition_start = dev_acquisition_start,
03f4de8c BV	594	.dev_acquisition_stop = dev_acquisition_stop,
0aba65da UH	595	.priv = NULL,
0aba65da UH	596	};