-
- }
- if(ch->name[0]=='D'){
- devc->d_chan_mask&=~(1<<ch->index);
- if(ch->enabled) {
- devc->d_chan_mask|=(ch->enabled<<ch->index);
- d_enabled++;
- // sr_dbg("D%d en %d mask 0x%X",ch->index,ch->enabled,devc->d_chan_mask);
- }
- }
- sr_info("Channel enable masks D 0x%X A 0x%X",devc->d_chan_mask,devc->a_chan_mask);
- sprintf(tmpstr,"%c%d%d\n",ch->name[0],ch->enabled,ch->index);
- if (send_serial_w_ack(serial,tmpstr) != SR_OK){
- sr_err("ERROR:Channel enable fail");
- return SR_ERR;
- } else{
-
- }
- }//for all channels
- //ensure data channels are continuous
- int invalid=0;
- for(i=0;i<32;i++){
- if((devc->d_chan_mask>>i)&1){
- if(invalid){
- sr_err("Digital channel mask 0x%X not continous\n\r",devc->d_chan_mask);
- return SR_ERR;
- }
- }
- else{
- invalid=1;
- }
- }
- //recalculate bytes_per_slice.
- devc->bytes_per_slice=(a_enabled*devc->a_size);
-
- for(i=0;i<devc->num_d_channels;i+=7){
- if(((devc->d_chan_mask)>>i)&(0x7F)){(devc->bytes_per_slice)++;}
- }
- if((a_enabled==0)&&(d_enabled==0)){
- sr_err("ERROR:No channels enabled");
- return SR_ERR;
- }
- sr_dbg("bps %d\n",devc->bytes_per_slice);
-
- //Apply sample rate limits
- //Save off the lower rate values which are hacked way of getting configs to the device
- uint8_t cfg_bits;
- cfg_bits=(devc->sample_rate%10&0x6); //Only bits 2&1 are used as cfg_bits
- devc->sample_rate-=cfg_bits;
- sr_warn("Capture device cfg_bits of 0x%X from sample rate %lld",cfg_bits,devc->sample_rate);
- if((a_enabled==3)&&(devc->sample_rate>166660)){
- sr_err("ERROR:3 channel ADC sample rate dropped to 166.660khz");
- devc->sample_rate=166660;
- }
- if((a_enabled==2)&&(devc->sample_rate>250000)){
- sr_err("ERROR:2 channel ADC sample rate dropped to 250khz");
- devc->sample_rate=250000;
- }
- if((a_enabled==1)&&(devc->sample_rate>500000)){
- sr_err("ERROR:1 channel ADC sample rate dropped to 500khz");
- devc->sample_rate=500000;
- }
- //Depending on channel configs, rates below 5ksps are possible
- //but such a low rate can easily stream and this eliminates a lot
- //of special cases.
- if(devc->sample_rate<5000){
- sr_err("Sample rate override to min of 5ksps");
- devc->sample_rate=5000;
- }
- if(devc->sample_rate>120000000){
- sr_err("Sample rate override to max of 120Msps");
- devc->sample_rate=12000000;
- }
- //It may take a very large number of samples to notice, but if digital and analog are enabled
- //and either PIO or ADC are fractional the samples will skew over time.
- //24Mhz is the max common divisor to the 120Mhz and 48Mhz ADC clock
- //so force an integer divisor to it.
- if((a_enabled>0)&&(d_enabled>0)){
- if(24000000ULL%(devc->sample_rate)){
- uint32_t commondivint=24000000ULL/(devc->sample_rate);
- //Always increment the divisor so that we go down in frequency to avoid max sample rate issues
- commondivint++;
- devc->sample_rate=24000000ULL/commondivint;
- //While the common divisor is an integer, that does not mean the resulting sample rate is, and
- //we want to keep the sample_rate divisible by 10 to support the cfg_bits
- while((devc->sample_rate%10)&&(commondivint<4800)){
- commondivint++;
- devc->sample_rate=24000000ULL/commondivint;
- //sr_err(" sample rate of %llu div %u\n\r",devc->sample_rate,commondivint);
- }
- //Make sure the divisor increement didn't make use go too low.
- if(devc->sample_rate<5000){devc->sample_rate=50000;}
- sr_err("WARN: Forcing common integer divisor sample rate of %llu div %u\n\r",devc->sample_rate,commondivint);
- }
-
- }
- //If we are only digital only or only analog print a warning that the
- //fractional divisors aren't a true PLL fractional feedback loop and thus
- //could have sample to sample variation.
- if(a_enabled>0){
- if(48000000ULL%(devc->sample_rate*a_enabled)){
- sr_warn("WARN: Non integer ADC divisor of 48Mhz clock for sample rate %llu may cause sample to sample variability.",devc->sample_rate);
- }
- }
- if(d_enabled>0){
- if(120000000ULL%(devc->sample_rate)){
- sr_warn("WARN: Non integer PIO divisor of 120Mhz for sample rate %llu may cause sample to sample variability.",devc->sample_rate);
- }
- }
-
-
- //modulo 10 to add cfg_bits back in
- //All code above should create overrides that are multiples of 10, but add a check just in case.
- if(devc->sample_rate%10){
- sr_err("Output sample rate %llu not mod 10",devc->sample_rate);
- devc->sample_rate=(devc->sample_rate/10)*10;
- }
-
- devc->sample_rate+=cfg_bits;
- if(cfg_bits){
- sr_warn("Embedding cfg_bits of 0x%X in sample_rate %lld\n\r",cfg_bits,devc->sample_rate);
- }
- sprintf(&tmpstr[0],"R%llu\n", devc->sample_rate);
- if(send_serial_w_ack(serial, tmpstr)!=SR_OK) {
- sr_err("Sample rate to device failed");
- return SR_ERR;
- }
- sprintf(tmpstr,"L%lld\n", devc->limit_samples);
- if(send_serial_w_ack(serial, tmpstr)!=SR_OK) {
- sr_err("Sample limit to device failed");
- return SR_ERR;
- }
-
-
- devc->sent_samples=0;
- devc->byte_cnt=0;
- devc->bytes_avail=0;
- devc->wrptr=0;
- devc->cbuf_wrptr=0;
- len=serial_read_blocking(serial, devc->buffer, devc->serial_buffer_size,serial_timeout(serial, 4));
- if(len>0){
- sr_info("Pre-ARM drain had %d characters:",len);
- devc->buffer[len]=0;
- sr_info("%s",devc->buffer);
- }
-
- for(i=0;i<devc->num_a_channels;i++){
- devc->a_data_bufs[i]=g_malloc(devc->sample_buf_size*sizeof(float));
- if(!(devc->a_data_bufs[i])){sr_err("ERROR:analog buffer malloc fail");return SR_ERR_MALLOC;}
- }
- if(devc->num_d_channels>0){
- devc->d_data_buf=g_malloc(devc->sample_buf_size*devc->dig_sample_bytes);
- if(!(devc->d_data_buf)){sr_err("ERROR:logic buffer malloc fail");return SR_ERR_MALLOC;}
- }
-
- if ((trigger = sr_session_trigger_get(sdi->session))) {
- devc->pretrig_entries = (devc->capture_ratio * devc->limit_samples) / 100;
- devc->stl = soft_trigger_logic_new(sdi, trigger, devc->pretrig_entries);
- if (!devc->stl)
- return SR_ERR_MALLOC;
- devc->trigger_fired=FALSE;
- if(devc->pretrig_entries>0){
- sr_dbg("Allocating pretrig buffers size %d",devc->pretrig_entries);
- for(i=0;i<devc->num_a_channels;i++){
- if((devc->a_chan_mask>>i)&1){
- devc->a_pretrig_bufs[i] = g_malloc0(sizeof(float)*devc->pretrig_entries);
- if(!devc->a_pretrig_bufs[i]){
- sr_err("ERROR:Analog pretrigger buffer malloc failure, disabling");
- devc->trigger_fired=TRUE;
- }
- }//if chan_mask
- }//for num_a_channels
- }//if pre_trigger
- sr_info("Entering sw triggered mode");
- //post the receive before starting the device to ensure we are ready to receive data ASAP
- serial_source_add(sdi->session, serial, G_IO_IN, 200,raspberrypi_pico_receive, (void *) sdi);
- sprintf(tmpstr,"C\n");
- if(send_serial_str(serial, tmpstr) != SR_OK)
- return SR_ERR;
-
- } else{
- devc->trigger_fired=TRUE;
- devc->pretrig_entries=0;
- sr_info("Entering fixed sample mode");
- serial_source_add(sdi->session, serial, G_IO_IN, 200,raspberrypi_pico_receive, (void *) sdi);
- sprintf(tmpstr,"F\n");
- if(send_serial_str(serial,tmpstr) != SR_OK)
- return SR_ERR;
- }
- std_session_send_df_header(sdi);
-
- sr_dbg("dsbstartend %d",devc->dig_sample_bytes);
-
- if(devc->trigger_fired) std_session_send_df_trigger(sdi);
- //Keep this at the end as we don't want to be RX_ACTIVE unless everything is ok
- devc->rxstate=RX_ACTIVE;
-
- return SR_OK;
+
+ }
+ if (ch->name[0] == 'D') {
+ devc->d_chan_mask &= ~(1 << ch->index);
+ if (ch->enabled) {
+ devc->d_chan_mask |=
+ (ch->enabled << ch->index);
+ d_enabled++;
+ // sr_dbg("D%d en %d mask 0x%X",ch->index,ch->enabled,devc->d_chan_mask);
+ }
+ }
+ sr_info("Channel enable masks D 0x%X A 0x%X",
+ devc->d_chan_mask, devc->a_chan_mask);
+ sprintf(tmpstr, "%c%d%d\n", ch->name[0], ch->enabled,
+ ch->index);
+ if (send_serial_w_ack(serial, tmpstr) != SR_OK) {
+ sr_err("ERROR:Channel enable fail");
+ return SR_ERR;
+ } else {
+
+ }
+ } //for all channels
+ //ensure data channels are continuous
+ int invalid = 0;
+ for (i = 0; i < 32; i++) {
+ if ((devc->d_chan_mask >> i) & 1) {
+ if (invalid) {
+ sr_err
+ ("Digital channel mask 0x%X not continous\n\r",
+ devc->d_chan_mask);
+ return SR_ERR;
+ }
+ } else {
+ invalid = 1;
+ }
+ }
+ //recalculate bytes_per_slice.
+ devc->bytes_per_slice = (a_enabled * devc->a_size);
+
+ for (i = 0; i < devc->num_d_channels; i += 7) {
+ if (((devc->d_chan_mask) >> i) & (0x7F)) {
+ (devc->bytes_per_slice)++;
+ }
+ }
+ if ((a_enabled == 0) && (d_enabled == 0)) {
+ sr_err("ERROR:No channels enabled");
+ return SR_ERR;
+ }
+ sr_dbg("bps %d\n", devc->bytes_per_slice);
+
+ //Apply sample rate limits
+ //Save off the lower rate values which are hacked way of getting configs to the device
+ uint8_t cfg_bits;
+ cfg_bits = (devc->sample_rate % 10 & 0x6); //Only bits 2&1 are used as cfg_bits
+ devc->sample_rate -= cfg_bits;
+ sr_warn("Capture device cfg_bits of 0x%X from sample rate %lld",
+ cfg_bits, devc->sample_rate);
+ if ((a_enabled == 3) && (devc->sample_rate > 166660)) {
+ sr_err
+ ("ERROR:3 channel ADC sample rate dropped to 166.660khz");
+ devc->sample_rate = 166660;
+ }
+ if ((a_enabled == 2) && (devc->sample_rate > 250000)) {
+ sr_err
+ ("ERROR:2 channel ADC sample rate dropped to 250khz");
+ devc->sample_rate = 250000;
+ }
+ if ((a_enabled == 1) && (devc->sample_rate > 500000)) {
+ sr_err
+ ("ERROR:1 channel ADC sample rate dropped to 500khz");
+ devc->sample_rate = 500000;
+ }
+ //Depending on channel configs, rates below 5ksps are possible
+ //but such a low rate can easily stream and this eliminates a lot
+ //of special cases.
+ if (devc->sample_rate < 5000) {
+ sr_err("Sample rate override to min of 5ksps");
+ devc->sample_rate = 5000;
+ }
+ if (devc->sample_rate > 120000000) {
+ sr_err("Sample rate override to max of 120Msps");
+ devc->sample_rate = 12000000;
+ }
+ //It may take a very large number of samples to notice, but if digital and analog are enabled
+ //and either PIO or ADC are fractional the samples will skew over time.
+ //24Mhz is the max common divisor to the 120Mhz and 48Mhz ADC clock
+ //so force an integer divisor to it.
+ if ((a_enabled > 0) && (d_enabled > 0)) {
+ if (24000000ULL % (devc->sample_rate)) {
+ uint32_t commondivint =
+ 24000000ULL / (devc->sample_rate);
+ //Always increment the divisor so that we go down in frequency to avoid max sample rate issues
+ commondivint++;
+ devc->sample_rate = 24000000ULL / commondivint;
+ //While the common divisor is an integer, that does not mean the resulting sample rate is, and
+ //we want to keep the sample_rate divisible by 10 to support the cfg_bits
+ while ((devc->sample_rate % 10)
+ && (commondivint < 4800)) {
+ commondivint++;
+ devc->sample_rate =
+ 24000000ULL / commondivint;
+ //sr_err(" sample rate of %llu div %u\n\r",devc->sample_rate,commondivint);
+ }
+ //Make sure the divisor increement didn't make use go too low.
+ if (devc->sample_rate < 5000) {
+ devc->sample_rate = 50000;
+ }
+ sr_err
+ ("WARN: Forcing common integer divisor sample rate of %llu div %u\n\r",
+ devc->sample_rate, commondivint);
+ }
+
+ }
+ //If we are only digital only or only analog print a warning that the
+ //fractional divisors aren't a true PLL fractional feedback loop and thus
+ //could have sample to sample variation.
+ if (a_enabled > 0) {
+ if (48000000ULL % (devc->sample_rate * a_enabled)) {
+ sr_warn
+ ("WARN: Non integer ADC divisor of 48Mhz clock for sample rate %llu may cause sample to sample variability.",
+ devc->sample_rate);
+ }
+ }
+ if (d_enabled > 0) {
+ if (120000000ULL % (devc->sample_rate)) {
+ sr_warn
+ ("WARN: Non integer PIO divisor of 120Mhz for sample rate %llu may cause sample to sample variability.",
+ devc->sample_rate);
+ }
+ }
+
+ //modulo 10 to add cfg_bits back in
+ //All code above should create overrides that are multiples of 10, but add a check just in case.
+ if (devc->sample_rate % 10) {
+ sr_err("Output sample rate %llu not mod 10",
+ devc->sample_rate);
+ devc->sample_rate = (devc->sample_rate / 10) * 10;
+ }
+
+ devc->sample_rate += cfg_bits;
+ if (cfg_bits) {
+ sr_warn
+ ("Embedding cfg_bits of 0x%X in sample_rate %lld\n\r",
+ cfg_bits, devc->sample_rate);
+ }
+ sprintf(&tmpstr[0], "R%llu\n", devc->sample_rate);
+ if (send_serial_w_ack(serial, tmpstr) != SR_OK) {
+ sr_err("Sample rate to device failed");
+ return SR_ERR;
+ }
+ sprintf(tmpstr, "L%lld\n", devc->limit_samples);
+ if (send_serial_w_ack(serial, tmpstr) != SR_OK) {
+ sr_err("Sample limit to device failed");
+ return SR_ERR;
+ }
+
+
+ devc->sent_samples = 0;
+ devc->byte_cnt = 0;
+ devc->bytes_avail = 0;
+ devc->wrptr = 0;
+ devc->cbuf_wrptr = 0;
+ len =
+ serial_read_blocking(serial, devc->buffer,
+ devc->serial_buffer_size,
+ serial_timeout(serial, 4));
+ if (len > 0) {
+ sr_info("Pre-ARM drain had %d characters:", len);
+ devc->buffer[len] = 0;
+ sr_info("%s", devc->buffer);
+ }
+
+ for (i = 0; i < devc->num_a_channels; i++) {
+ devc->a_data_bufs[i] =
+ g_malloc(devc->sample_buf_size * sizeof(float));
+ if (!(devc->a_data_bufs[i])) {
+ sr_err("ERROR:analog buffer malloc fail");
+ return SR_ERR_MALLOC;
+ }
+ }
+ if (devc->num_d_channels > 0) {
+ devc->d_data_buf =
+ g_malloc(devc->sample_buf_size *
+ devc->dig_sample_bytes);
+ if (!(devc->d_data_buf)) {
+ sr_err("ERROR:logic buffer malloc fail");
+ return SR_ERR_MALLOC;
+ }
+ }
+
+ if ((trigger = sr_session_trigger_get(sdi->session))) {
+ devc->pretrig_entries =
+ (devc->capture_ratio * devc->limit_samples) / 100;
+ devc->stl =
+ soft_trigger_logic_new(sdi, trigger,
+ devc->pretrig_entries);
+ if (!devc->stl)
+ return SR_ERR_MALLOC;
+ devc->trigger_fired = FALSE;
+ if (devc->pretrig_entries > 0) {
+ sr_dbg("Allocating pretrig buffers size %d",
+ devc->pretrig_entries);
+ for (i = 0; i < devc->num_a_channels; i++) {
+ if ((devc->a_chan_mask >> i) & 1) {
+ devc->a_pretrig_bufs[i] =
+ g_malloc0(sizeof(float) *
+ devc->
+ pretrig_entries);
+ if (!devc->a_pretrig_bufs[i]) {
+ sr_err
+ ("ERROR:Analog pretrigger buffer malloc failure, disabling");
+ devc->trigger_fired = TRUE;
+ }
+ } //if chan_mask
+ } //for num_a_channels
+ } //if pre_trigger
+ sr_info("Entering sw triggered mode");
+ //post the receive before starting the device to ensure we are ready to receive data ASAP
+ serial_source_add(sdi->session, serial, G_IO_IN, 200,
+ raspberrypi_pico_receive, (void *) sdi);
+ sprintf(tmpstr, "C\n");
+ if (send_serial_str(serial, tmpstr) != SR_OK)
+ return SR_ERR;
+
+ } else {
+ devc->trigger_fired = TRUE;
+ devc->pretrig_entries = 0;
+ sr_info("Entering fixed sample mode");
+ serial_source_add(sdi->session, serial, G_IO_IN, 200,
+ raspberrypi_pico_receive, (void *) sdi);
+ sprintf(tmpstr, "F\n");
+ if (send_serial_str(serial, tmpstr) != SR_OK)
+ return SR_ERR;
+ }
+ std_session_send_df_header(sdi);
+
+ sr_dbg("dsbstartend %d", devc->dig_sample_bytes);
+
+ if (devc->trigger_fired)
+ std_session_send_df_trigger(sdi);
+ //Keep this at the end as we don't want to be RX_ACTIVE unless everything is ok
+ devc->rxstate = RX_ACTIVE;
+
+ return SR_OK;