sysclk-lwla: Define constants for long registers

[libsigrok.git] / src / hardware / sysclk-lwla / lwla.h

diff --git a/src/hardware/sysclk-lwla/lwla.h b/src/hardware/sysclk-lwla/lwla.h
index 5484d2ebc49686adcd35ceb2e4756af6358b8cbb..9eb69566c6e89dabfdc1c2c18f787ed9c3f5cc50 100644 (file)
--- a/src/hardware/sysclk-lwla/lwla.h
+++ b/src/hardware/sysclk-lwla/lwla.h
@@ -74,19 +74,19 @@ enum {
        STATUS_FLAG_MASK = 0x3F
 };
 
-/** LWLA register addresses.
+/** LWLA1034 register addresses.
  */
 enum {
-       REG_MEM_CTRL2   = 0x1074, /* capture buffer control ??? */
+       REG_MEM_CTRL    = 0x1074, /* capture buffer control */
        REG_MEM_FILL    = 0x1078, /* capture buffer fill level */
-       REG_MEM_CTRL4   = 0x107C, /* capture buffer control ??? */
+       REG_MEM_START   = 0x107C, /* capture buffer start address */
 
        REG_DIV_BYPASS  = 0x1094, /* bypass clock divider flag */
 
-       REG_CMD_CTRL1   = 0x10B0, /* command control ??? */
-       REG_CMD_CTRL2   = 0x10B4, /* command control ??? */
-       REG_CMD_CTRL3   = 0x10B8, /* command control ??? */
-       REG_CMD_CTRL4   = 0x10BC, /* command control ??? */
+       REG_LONG_STROBE = 0x10B0, /* long register read/write strobe */
+       REG_LONG_ADDR   = 0x10B4, /* long register address */
+       REG_LONG_LOW    = 0x10B8, /* long register low word */
+       REG_LONG_HIGH   = 0x10BC, /* long register high word */
 
        REG_FREQ_CH1    = 0x10C0, /* channel 1 live frequency */
        REG_FREQ_CH2    = 0x10C4, /* channel 2 live frequency */
@@ -94,6 +94,30 @@ enum {
        REG_FREQ_CH4    = 0x10CC, /* channel 4 live frequency */
 };
 
+/** Flag bits for REG_MEM_CTRL.
+ */
+enum {
+       MEM_CTRL_WRITE   = 1 << 0, /* "wr1rd0" bit */
+       MEM_CTRL_CLR_IDX = 1 << 1, /* "clr_idx" bit */
+};
+
+/* LWLA1034 long register addresses.
+ */
+enum {
+       LREG_CAP_CTRL = 10,  /* capture control bits */
+       LREG_TEST_ID  = 100, /* constant test ID */
+};
+
+/** Flag bits for LREG_CAP_CTRL.
+ */
+enum {
+       CAP_CTRL_TRG_EN       = 1 << 0, /* "trg_en" bit */
+       CAP_CTRL_CLR_TIMEBASE = 1 << 2, /* "do_clr_timebase" bit */
+       CAP_CTRL_FLUSH_FIFO   = 1 << 4, /* "flush_fifo" bit */
+       CAP_CTRL_CLR_FIFOFULL = 1 << 5, /* "clr_fifo32_ful" bit */
+       CAP_CTRL_CLR_COUNTER  = 1 << 6, /* "clr_cntr0" bit */
+};
+
 /** Register/value pair.
  */
 struct regval_pair {
@@ -114,6 +138,9 @@ SR_PRIV int lwla_receive_reply(const struct sr_usb_dev_inst *usb,
 SR_PRIV int lwla_read_reg(const struct sr_usb_dev_inst *usb,
                          uint16_t reg, uint32_t *value);
 
+SR_PRIV int lwla_read_long_reg(const struct sr_usb_dev_inst *usb,
+                              uint32_t addr, uint64_t *value);
+
 SR_PRIV int lwla_write_reg(const struct sr_usb_dev_inst *usb,
                           uint16_t reg, uint32_t value);