sysclk-lwla: Define constants for long registers

[libsigrok.git] / src / hardware / sysclk-lwla / lwla.h

diff --git a/src/hardware/sysclk-lwla/lwla.h b/src/hardware/sysclk-lwla/lwla.h
index 3e14525576de0b8a883834eeb88ed021a0827bf1..9eb69566c6e89dabfdc1c2c18f787ed9c3f5cc50 100644 (file)
--- a/src/hardware/sysclk-lwla/lwla.h
+++ b/src/hardware/sysclk-lwla/lwla.h
@@ -74,12 +74,12 @@ enum {
        STATUS_FLAG_MASK = 0x3F
 };
 
-/** LWLA register addresses.
+/** LWLA1034 register addresses.
  */
 enum {
-       REG_MEM_CTRL2   = 0x1074, /* capture buffer control ??? */
+       REG_MEM_CTRL    = 0x1074, /* capture buffer control */
        REG_MEM_FILL    = 0x1078, /* capture buffer fill level */
-       REG_MEM_CTRL4   = 0x107C, /* capture buffer control ??? */
+       REG_MEM_START   = 0x107C, /* capture buffer start address */
 
        REG_DIV_BYPASS  = 0x1094, /* bypass clock divider flag */
 
@@ -94,6 +94,30 @@ enum {
        REG_FREQ_CH4    = 0x10CC, /* channel 4 live frequency */
 };
 
+/** Flag bits for REG_MEM_CTRL.
+ */
+enum {
+       MEM_CTRL_WRITE   = 1 << 0, /* "wr1rd0" bit */
+       MEM_CTRL_CLR_IDX = 1 << 1, /* "clr_idx" bit */
+};
+
+/* LWLA1034 long register addresses.
+ */
+enum {
+       LREG_CAP_CTRL = 10,  /* capture control bits */
+       LREG_TEST_ID  = 100, /* constant test ID */
+};
+
+/** Flag bits for LREG_CAP_CTRL.
+ */
+enum {
+       CAP_CTRL_TRG_EN       = 1 << 0, /* "trg_en" bit */
+       CAP_CTRL_CLR_TIMEBASE = 1 << 2, /* "do_clr_timebase" bit */
+       CAP_CTRL_FLUSH_FIFO   = 1 << 4, /* "flush_fifo" bit */
+       CAP_CTRL_CLR_FIFOFULL = 1 << 5, /* "clr_fifo32_ful" bit */
+       CAP_CTRL_CLR_COUNTER  = 1 << 6, /* "clr_cntr0" bit */
+};
+
 /** Register/value pair.
  */
 struct regval_pair {