[DS_EDGE_FALLING] = "falling",
};
-static const struct {
- gdouble low;
- gdouble high;
-} voltage_thresholds[] = {
+static const struct voltage_threshold voltage_thresholds[] = {
{ 0.7, 1.4 },
{ 1.4, 3.6 },
};
{
struct dev_context *devc;
struct sr_usb_dev_inst *usb;
- GVariant *range[2];
unsigned int i, voltage_range;
- char str[128];
(void)cg;
/* Device still needs to re-enumerate after firmware
* upload, so we don't know its (future) address. */
return SR_ERR;
- snprintf(str, 128, "%d.%d", usb->bus, usb->address);
- *data = g_variant_new_string(str);
+ *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
break;
case SR_CONF_VOLTAGE_THRESHOLD:
if (!strcmp(devc->profile->model, "DSLogic")) {
voltage_range = i;
break;
}
-
- range[0] = g_variant_new_double(
- voltage_thresholds[voltage_range].low);
- range[1] = g_variant_new_double(
- voltage_thresholds[voltage_range].high);
+ *data = std_gvar_tuple_double(voltage_thresholds[voltage_range].low,
+ voltage_thresholds[voltage_range].high);
} else {
- range[0] = g_variant_new_double(devc->cur_threshold);
- range[1] = g_variant_new_double(devc->cur_threshold);
+ *data = std_gvar_tuple_double(devc->cur_threshold, devc->cur_threshold);
}
- *data = g_variant_new_tuple(range, 2);
break;
case SR_CONF_LIMIT_SAMPLES:
*data = g_variant_new_uint64(devc->limit_samples);
devc->continuous_mode = g_variant_get_boolean(data);
break;
case SR_CONF_CLOCK_EDGE:
- i = lookup_index(data, signal_edge_names,
- ARRAY_SIZE(signal_edge_names));
+ i = lookup_index(data, ARRAY_AND_SIZE(signal_edge_names));
if (i < 0)
return SR_ERR_ARG;
devc->clock_edge = i;
const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
struct dev_context *devc;
- GVariant *gvar, *range[2];
- GVariantBuilder gvb;
- unsigned int i;
- double v;
devc = (sdi) ? sdi->priv : NULL;
case SR_CONF_DEVICE_OPTIONS:
return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
case SR_CONF_VOLTAGE_THRESHOLD:
- g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
- if (!strcmp(devc->profile->model, "DSLogic")) {
- for (i = 0; i < ARRAY_SIZE(voltage_thresholds); i++) {
- range[0] = g_variant_new_double(voltage_thresholds[i].low);
- range[1] = g_variant_new_double(voltage_thresholds[i].high);
- gvar = g_variant_new_tuple(range, 2);
- g_variant_builder_add_value(&gvb, gvar);
- }
- } else {
- for (v = 0.0; v <= 5.0; v += 0.1) {
- range[0] = g_variant_new_double(v);
- range[1] = g_variant_new_double(v);
- gvar = g_variant_new_tuple(range, 2);
- g_variant_builder_add_value(&gvb, gvar);
- }
- }
- *data = g_variant_builder_end(&gvb);
+ if (!strcmp(devc->profile->model, "DSLogic"))
+ *data = std_gvar_thresholds(ARRAY_AND_SIZE(voltage_thresholds));
+ else
+ *data = std_gvar_min_max_step_thresholds(0.0, 5.0, 0.1);
break;
case SR_CONF_SAMPLERATE:
*data = std_gvar_samplerates(devc->samplerates, devc->num_samplerates);
break;
case SR_CONF_CLOCK_EDGE:
- *data = g_variant_new_strv(signal_edge_names,
- ARRAY_SIZE(signal_edge_names));
+ *data = g_variant_new_strv(ARRAY_AND_SIZE(signal_edge_names));
break;
default:
return SR_ERR_NA;