asix-sigma: update copyright notice for recent non-trivial changes

[libsigrok.git] / src / hardware / asix-sigma / protocol.h

diff --git a/src/hardware/asix-sigma/protocol.h b/src/hardware/asix-sigma/protocol.h
index f1eb16ec2598827b9221d4b60cc7f0129a16a61f..d2a190c99ee2bc14dea6c736166b0d9da130bebc 100644 (file)
--- a/src/hardware/asix-sigma/protocol.h
+++ b/src/hardware/asix-sigma/protocol.h
@@ -4,6 +4,7 @@
  * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
  * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
  * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
+ * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
  *
  * This program is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -123,8 +124,8 @@ enum sigma_read_register {
        READ_TEST               = 15,
 };
 
-#define LEDSEL0                        6
-#define LEDSEL1                        7
+#define TRGSEL2_LEDSEL0                (1 << 6)
+#define TRGSEL2_LEDSEL1                (1 << 7)
 
 /* WRITE_MODE register fields. */
 #define WMR_SDRAMWRITEEN       (1 << 0)
@@ -146,6 +147,22 @@ enum sigma_read_register {
 #define RMR_POSTTRIGGERED      (1 << 6)
 /* not used: bit position 7 */
 
+/*
+ * Trigger options. First and second write are similar, but _some_
+ * positions change their meaning.
+ */
+#define TRGOPT_TRGIEN          (1 << 7)
+#define TRGOPT_TRGOEN          (1 << 6)
+#define TRGOPT_TRGOINEN                (1 << 5) /* 1st write */
+#define TRGOPT_TRGINEG         TRGOPT1_TRGOINEN /* 2nd write */
+#define TRGOPT_TRGOEVNTEN      (1 << 4) /* 1st write */
+#define TRGOPT_TRGOPIN         TRGOPT1_TRGOEVNTEN /* 2nd write */
+#define TRGOPT_TRGOOUTEN       (1 << 3) /* 1st write */
+#define TRGOPT_TRGOLONG                TRGOPT1_TRGOOUTEN /* 2nd write */
+#define TRGOPT_TRGOUTR_OUT     (1 << 1)
+#define TRGOPT_TRGOUTR_EN      (1 << 0)
+#define TRGOPT_CLEAR_MASK      (TRGOPT_TRGOINEN | TRGOPT_TRGOEVNTEN | TRGOPT_TRGOOUTEN)
+
 /*
  * Layout of the sample data DRAM, which will be downloaded to the PC:
  *
@@ -189,18 +206,14 @@ enum sigma_read_register {
 
 struct sigma_dram_line {
        struct sigma_dram_cluster {
-               uint8_t timestamp_lo;
-               uint8_t timestamp_hi;
-               struct sigma_dram_event {
-                       uint8_t sample_hi;
-                       uint8_t sample_lo;
-               } samples[EVENTS_PER_CLUSTER];
+               uint16_t timestamp;
+               uint16_t samples[EVENTS_PER_CLUSTER];
        } cluster[CLUSTERS_PER_ROW];
 };
 
 struct clockselect_50 {
        uint8_t async;
-       uint8_t fraction;
+       uint64_t fraction;
        uint16_t disabled_channels;
 };