asix-sigma: rephrase and extend register access for readability

[libsigrok.git] / src / hardware / asix-sigma / protocol.h

diff --git a/src/hardware/asix-sigma/protocol.h b/src/hardware/asix-sigma/protocol.h
index e3a9d512463c14f506a963330b4bb6ccebc80bd1..507088c08729650dd15c885949520d9ee9894566 100644 (file)
--- a/src/hardware/asix-sigma/protocol.h
+++ b/src/hardware/asix-sigma/protocol.h
@@ -124,6 +124,29 @@ enum sigma_read_register {
        READ_TEST               = 15,
 };
 
+#define HI4(b)                 (((b) >> 4) & 0x0f)
+#define LO4(b)                 (((b) >> 0) & 0x0f)
+
+#define BIT_MASK(l)    ((1UL << (l)) - 1)
+
+#define TRGSEL_SELC_MASK       BIT_MASK(2)
+#define TRGSEL_SELC_SHIFT      0
+#define TRGSEL_SELPRESC_MASK   BIT_MASK(4)
+#define TRGSEL_SELPRESC_SHIFT  4
+#define TRGSEL_SELINC_MASK     BIT_MASK(2)
+#define TRGSEL_SELINC_SHIFT    0
+#define TRGSEL_SELRES_MASK     BIT_MASK(2)
+#define TRGSEL_SELRES_SHIFT    2
+#define TRGSEL_SELA_MASK       BIT_MASK(2)
+#define TRGSEL_SELA_SHIFT      4
+#define TRGSEL_SELB_MASK       BIT_MASK(2)
+#define TRGSEL_SELB_SHIFT      6
+
+#define TRGSEL2_PINS_MASK      (0x07 << 0)
+#define TRGSEL2_PINPOL_RISE    (1 << 3)
+#define TRGSEL2_LUT_ADDR_MASK  (0x0f << 0)
+#define TRGSEL2_LUT_WRITE      (1 << 4)
+#define TRGSEL2_RESET          (1 << 5)
 #define TRGSEL2_LEDSEL0                (1 << 6)
 #define TRGSEL2_LEDSEL1                (1 << 7)
 
@@ -211,12 +234,6 @@ struct sigma_dram_line {
        } cluster[CLUSTERS_PER_ROW];
 };
 
-struct clockselect_50 {
-       uint8_t async;
-       uint64_t fraction;
-       uint16_t disabled_channels;
-};
-
 /* The effect of all these are still a bit unclear. */
 struct triggerinout {
        uint8_t trgout_resistor_enable : 1;