* Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
* Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
* Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
+ * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
READ_TEST = 15,
};
-#define LEDSEL0 6
-#define LEDSEL1 7
+#define HI4(b) (((b) >> 4) & 0x0f)
+#define LO4(b) (((b) >> 0) & 0x0f)
+
+#define BIT_MASK(l) ((1UL << (l)) - 1)
+
+#define TRGSEL_SELC_MASK BIT_MASK(2)
+#define TRGSEL_SELC_SHIFT 0
+#define TRGSEL_SELPRESC_MASK BIT_MASK(4)
+#define TRGSEL_SELPRESC_SHIFT 4
+#define TRGSEL_SELINC_MASK BIT_MASK(2)
+#define TRGSEL_SELINC_SHIFT 0
+#define TRGSEL_SELRES_MASK BIT_MASK(2)
+#define TRGSEL_SELRES_SHIFT 2
+#define TRGSEL_SELA_MASK BIT_MASK(2)
+#define TRGSEL_SELA_SHIFT 4
+#define TRGSEL_SELB_MASK BIT_MASK(2)
+#define TRGSEL_SELB_SHIFT 6
+
+#define TRGSEL2_PINS_MASK (0x07 << 0)
+#define TRGSEL2_PINPOL_RISE (1 << 3)
+#define TRGSEL2_LUT_ADDR_MASK (0x0f << 0)
+#define TRGSEL2_LUT_WRITE (1 << 4)
+#define TRGSEL2_RESET (1 << 5)
+#define TRGSEL2_LEDSEL0 (1 << 6)
+#define TRGSEL2_LEDSEL1 (1 << 7)
/* WRITE_MODE register fields. */
#define WMR_SDRAMWRITEEN (1 << 0)
#define RMR_POSTTRIGGERED (1 << 6)
/* not used: bit position 7 */
+/*
+ * Trigger options. First and second write are similar, but _some_
+ * positions change their meaning.
+ */
+#define TRGOPT_TRGIEN (1 << 7)
+#define TRGOPT_TRGOEN (1 << 6)
+#define TRGOPT_TRGOINEN (1 << 5) /* 1st write */
+#define TRGOPT_TRGINEG TRGOPT1_TRGOINEN /* 2nd write */
+#define TRGOPT_TRGOEVNTEN (1 << 4) /* 1st write */
+#define TRGOPT_TRGOPIN TRGOPT1_TRGOEVNTEN /* 2nd write */
+#define TRGOPT_TRGOOUTEN (1 << 3) /* 1st write */
+#define TRGOPT_TRGOLONG TRGOPT1_TRGOOUTEN /* 2nd write */
+#define TRGOPT_TRGOUTR_OUT (1 << 1)
+#define TRGOPT_TRGOUTR_EN (1 << 0)
+#define TRGOPT_CLEAR_MASK (TRGOPT_TRGOINEN | TRGOPT_TRGOEVNTEN | TRGOPT_TRGOOUTEN)
+
/*
* Layout of the sample data DRAM, which will be downloaded to the PC:
*
struct sigma_dram_line {
struct sigma_dram_cluster {
- uint8_t timestamp_lo;
- uint8_t timestamp_hi;
- struct sigma_dram_event {
- uint8_t sample_hi;
- uint8_t sample_lo;
- } samples[EVENTS_PER_CLUSTER];
+ uint16_t timestamp;
+ uint16_t samples[EVENTS_PER_CLUSTER];
} cluster[CLUSTERS_PER_ROW];
};
-struct clockselect_50 {
- uint8_t async;
- uint8_t fraction;
- uint16_t disabled_channels;
-};
-
/* The effect of all these are still a bit unclear. */
struct triggerinout {
uint8_t trgout_resistor_enable : 1;
struct sigma_state {
enum {
SIGMA_UNINITIALIZED = 0,
+ SIGMA_CONFIG,
SIGMA_IDLE,
SIGMA_CAPTURE,
SIGMA_STOPPING,
uint16_t lastsample;
};
+enum sigma_firmware_idx {
+ SIGMA_FW_NONE,
+ SIGMA_FW_50MHZ,
+ SIGMA_FW_100MHZ,
+ SIGMA_FW_200MHZ,
+ SIGMA_FW_SYNC,
+ SIGMA_FW_FREQ,
+};
+
struct submit_buffer;
struct dev_context {
uint16_t prefix;
enum asix_device_type type;
} id;
- struct ftdi_context ftdic;
+ struct {
+ struct ftdi_context ctx;
+ gboolean is_open, must_close;
+ } ftdi;
uint64_t samplerate;
struct sr_sw_limits cfg_limits; /* Configured limits (user specified). */
struct sr_sw_limits acq_limits; /* Acquisition limits (internal use). */
struct sr_sw_limits feed_limits; /* Datafeed limits (internal use). */
- int cur_firmware;
+ enum sigma_firmware_idx firmware_idx;
int num_channels;
int samples_per_event;
uint64_t capture_ratio;
struct submit_buffer *buffer;
};
-extern SR_PRIV const uint64_t samplerates[];
-extern SR_PRIV const size_t samplerates_count;
-
-SR_PRIV int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
- struct dev_context *devc);
-SR_PRIV int sigma_set_register(uint8_t reg, uint8_t value, struct dev_context *devc);
-SR_PRIV int sigma_write_trigger_lut(struct triggerlut *lut, struct dev_context *devc);
+/* "Automatic" and forced USB connection open/close support. */
+SR_PRIV int sigma_check_open(const struct sr_dev_inst *sdi);
+SR_PRIV int sigma_check_close(struct dev_context *devc);
+SR_PRIV int sigma_force_open(const struct sr_dev_inst *sdi);
+SR_PRIV int sigma_force_close(struct dev_context *devc);
+
+/* Send register content (simple and complex) to the hardware. */
+SR_PRIV int sigma_write_register(struct dev_context *devc,
+ uint8_t reg, uint8_t *data, size_t len);
+SR_PRIV int sigma_set_register(struct dev_context *devc,
+ uint8_t reg, uint8_t value);
+SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc,
+ struct triggerlut *lut);
+
+/* Samplerate constraints check, get/set/list helpers. */
SR_PRIV int sigma_normalize_samplerate(uint64_t want_rate, uint64_t *have_rate);
+SR_PRIV uint64_t sigma_get_samplerate(const struct sr_dev_inst *sdi);
+SR_PRIV GVariant *sigma_get_samplerates_list(void);
+
+/* Preparation of data acquisition, spec conversion, hardware configuration. */
SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi);
SR_PRIV int sigma_set_acquire_timeout(struct dev_context *devc);
SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi);
+SR_PRIV int sigma_build_basic_trigger(struct dev_context *devc,
+ struct triggerlut *lut);
+
+/* Callback to periodically drive acuisition progress. */
SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data);
-SR_PRIV int sigma_build_basic_trigger(struct triggerlut *lut, struct dev_context *devc);
#endif
projects / libsigrok.git / blobdiff