return SR_OK;
}
- devc->state.state = SIGMA_CONFIG;
+ devc->state = SIGMA_CONFIG;
/* Set the cable to bitbang mode. */
ret = ftdi_set_bitmode(&devc->ftdi.ctx, BB_PINMASK, BITMODE_BITBANG);
}
/* Keep track of successful firmware download completion. */
- devc->state.state = SIGMA_IDLE;
+ devc->state = SIGMA_IDLE;
devc->firmware_idx = firmware_idx;
sr_info("Firmware uploaded.");
* firmware is required and higher rates might limit the set
* of available channels.
*/
- num_channels = devc->num_channels;
+ num_channels = devc->interp.num_channels;
if (samplerate <= SR_MHZ(50)) {
ret = upload_firmware(drvc->sr_ctx, devc, SIGMA_FW_50MHZ);
num_channels = 16;
* which the device will communicate within an "event").
*/
if (ret == SR_OK) {
- devc->num_channels = num_channels;
- devc->samples_per_event = 16 / devc->num_channels;
+ devc->interp.num_channels = num_channels;
+ devc->interp.samples_per_event = 16 / devc->interp.num_channels;
}
/*
* One 16bit item contains two samples of 8bits each. The bits of
* multiple samples are interleaved.
*/
-static uint16_t sigma_deinterlace_100mhz_data(uint16_t indata, int idx)
+static uint16_t sigma_deinterlace_data_2x8(uint16_t indata, int idx)
{
uint16_t outdata;
* One 16bit item contains four samples of 4bits each. The bits of
* multiple samples are interleaved.
*/
-static uint16_t sigma_deinterlace_200mhz_data(uint16_t indata, int idx)
+static uint16_t sigma_deinterlace_data_4x4(uint16_t indata, int idx)
{
uint16_t outdata;
struct sigma_dram_cluster *dram_cluster,
size_t events_in_cluster, gboolean triggered)
{
- struct sigma_state *ss;
uint16_t tsdiff, ts, sample, item16;
size_t count;
size_t evt;
* for simple level and edge triggers. It would not for timed or
* counted conditions, which currently are not supported.)
*/
- ss = &devc->state;
ts = sigma_dram_cluster_ts(dram_cluster);
- tsdiff = ts - ss->lastts;
+ tsdiff = ts - devc->interp.lastts;
if (tsdiff > 0) {
- sample = ss->lastsample;
- count = tsdiff * devc->samples_per_event;
+ sample = devc->interp.lastsample;
+ count = tsdiff * devc->interp.samples_per_event;
(void)check_and_submit_sample(devc, sample, count, FALSE);
}
- ss->lastts = ts + EVENTS_PER_CLUSTER;
+ devc->interp.lastts = ts + EVENTS_PER_CLUSTER;
/*
* Grab sample data from the current cluster and prepare their
sample = 0;
for (evt = 0; evt < events_in_cluster; evt++) {
item16 = sigma_dram_cluster_data(dram_cluster, evt);
- if (devc->clock.samplerate == SR_MHZ(200)) {
- sample = sigma_deinterlace_200mhz_data(item16, 0);
+ if (devc->interp.samples_per_event == 4) {
+ sample = sigma_deinterlace_data_4x4(item16, 0);
check_and_submit_sample(devc, sample, 1, triggered);
- sample = sigma_deinterlace_200mhz_data(item16, 1);
+ sample = sigma_deinterlace_data_4x4(item16, 1);
check_and_submit_sample(devc, sample, 1, triggered);
- sample = sigma_deinterlace_200mhz_data(item16, 2);
+ sample = sigma_deinterlace_data_4x4(item16, 2);
check_and_submit_sample(devc, sample, 1, triggered);
- sample = sigma_deinterlace_200mhz_data(item16, 3);
+ sample = sigma_deinterlace_data_4x4(item16, 3);
check_and_submit_sample(devc, sample, 1, triggered);
- } else if (devc->clock.samplerate == SR_MHZ(100)) {
- sample = sigma_deinterlace_100mhz_data(item16, 0);
+ } else if (devc->interp.samples_per_event == 2) {
+ sample = sigma_deinterlace_data_2x8(item16, 0);
check_and_submit_sample(devc, sample, 1, triggered);
- sample = sigma_deinterlace_100mhz_data(item16, 1);
+ sample = sigma_deinterlace_data_2x8(item16, 1);
check_and_submit_sample(devc, sample, 1, triggered);
} else {
sample = item16;
check_and_submit_sample(devc, sample, 1, triggered);
}
}
- ss->lastsample = sample;
+ devc->interp.lastsample = sample;
}
/*
devc = sdi->priv;
sr_info("Downloading sample data.");
- devc->state.state = SIGMA_DOWNLOAD;
+ devc->state = SIGMA_DOWNLOAD;
/*
* Ask the hardware to stop data acquisition. Reception of the
/* This is the first DRAM line, so find the initial timestamp. */
if (dl_lines_done == 0) {
- devc->state.lastts =
+ devc->interp.lastts =
sigma_dram_cluster_ts(&dram_line[0].cluster[0]);
- devc->state.lastsample = 0;
+ devc->interp.lastsample = 0;
}
for (line_idx = 0; line_idx < dl_lines_curr; line_idx++) {
std_session_send_df_end(sdi);
- devc->state.state = SIGMA_IDLE;
+ devc->state = SIGMA_IDLE;
sr_dev_acquisition_stop(sdi);
return TRUE;
sdi = cb_data;
devc = sdi->priv;
- if (devc->state.state == SIGMA_IDLE)
+ if (devc->state == SIGMA_IDLE)
return TRUE;
/*
* keep checking configured limits which will terminate the
* acquisition and initiate download.
*/
- if (devc->state.state == SIGMA_STOPPING)
+ if (devc->state == SIGMA_STOPPING)
return download_capture(sdi);
- if (devc->state.state == SIGMA_CAPTURE)
+ if (devc->state == SIGMA_CAPTURE)
return sigma_capture_mode(sdi);
return TRUE;
static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
size_t index, gboolean neg, uint16_t *mask)
{
- size_t i, j;
- int x[2][2], tmp, a, b, aset, bset, rset;
+ int x[2][2], a, b, aset, bset, rset;
+ size_t bitidx;
- memset(x, 0, sizeof(x));
+ /*
+ * Beware! The x, a, b, aset, bset, rset variables strictly
+ * require the limited 0..1 range. They are not interpreted
+ * as logically true, instead bit arith is done on them.
+ */
- /* Trigger detect condition. */
+ /* Construct a pattern which detects the condition. */
+ memset(x, 0, sizeof(x));
switch (oper) {
case OP_LEVEL:
x[0][1] = 1;
break;
}
- /* Transpose if neg is set. */
+ /* Transpose the pattern if the condition is negated. */
if (neg) {
+ size_t i, j;
+ int tmp;
+
for (i = 0; i < 2; i++) {
for (j = 0; j < 2; j++) {
tmp = x[i][j];
}
}
- /* Update mask with function. */
- for (i = 0; i < 16; i++) {
- a = (i >> (2 * index + 0)) & 1;
- b = (i >> (2 * index + 1)) & 1;
+ /* Update the LUT mask with the function's condition. */
+ for (bitidx = 0; bitidx < 16; bitidx++) {
+ a = (bitidx & BIT(2 * index + 0)) ? 1 : 0;
+ b = (bitidx & BIT(2 * index + 1)) ? 1 : 0;
- aset = (*mask >> i) & 1;
+ aset = (*mask & BIT(bitidx)) ? 1 : 0;
bset = x[b][a];
- rset = 0;
if (func == FUNC_AND || func == FUNC_NAND)
rset = aset & bset;
else if (func == FUNC_OR || func == FUNC_NOR)
rset = aset | bset;
else if (func == FUNC_XOR || func == FUNC_NXOR)
rset = aset ^ bset;
+ else
+ rset = 0;
if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
- rset = !rset;
-
- *mask &= ~BIT(i);
+ rset = 1 - rset;
if (rset)
- *mask |= BIT(i);
+ *mask |= BIT(bitidx);
+ else
+ *mask &= ~BIT(bitidx);
}
}
projects / libsigrok.git / blobdiff