#include <config.h>
#include "protocol.h"
-#define USB_VENDOR 0xa600
-#define USB_PRODUCT 0xa000
-#define USB_DESCRIPTION "ASIX SIGMA"
-#define USB_VENDOR_NAME "ASIX"
-#define USB_MODEL_NAME "SIGMA"
-
/*
* The ASIX Sigma supports arbitrary integer frequency divider in
* the 50MHz mode. The divider is in range 1...256 , allowing for
SR_MHZ(200), /* Special FW needed */
};
-SR_PRIV const int SAMPLERATES_COUNT = ARRAY_SIZE(samplerates);
+SR_PRIV const size_t samplerates_count = ARRAY_SIZE(samplerates);
static const char sigma_firmware_files[][24] = {
/* 50 MHz, supports 8 bit fractions */
uint8_t buf[80];
int idx = 0;
- if ((len + 2) > sizeof(buf)) {
+ if ((2 * len + 2) > sizeof(buf)) {
sr_err("Attempted to write %zu bytes, but buffer is too small.",
- len + 2);
+ len);
return SR_ERR_BUG;
}
return SR_OK;
}
+/*
+ * Sigma doesn't support limiting the number of samples, so we have to
+ * translate the number and the samplerate to an elapsed time.
+ *
+ * In addition we need to ensure that the last data cluster has passed
+ * the hardware pipeline, and became available to the PC side. With RLE
+ * compression up to 327ms could pass before another cluster accumulates
+ * at 200kHz samplerate when input pins don't change.
+ */
+SR_PRIV uint64_t sigma_limit_samples_to_msec(const struct dev_context *devc,
+ uint64_t limit_samples)
+{
+ uint64_t limit_msec;
+ uint64_t worst_cluster_time_ms;
+
+ limit_msec = limit_samples * 1000 / devc->cur_samplerate;
+ worst_cluster_time_ms = 65536 * 1000 / devc->cur_samplerate;
+ /*
+ * One cluster time is not enough to flush pipeline when sampling
+ * grounded pins with 1 sample limit at 200kHz. Hence the 2* fix.
+ */
+ return limit_msec + 2 * worst_cluster_time_ms;
+}
+
SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
{
struct dev_context *devc;
struct drv_context *drvc;
- unsigned int i;
+ size_t i;
int ret;
devc = sdi->priv;
drvc = sdi->driver->context;
ret = SR_OK;
- for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
+ /* Reject rates that are not in the list of supported rates. */
+ for (i = 0; i < samplerates_count; i++) {
if (samplerates[i] == samplerate)
break;
}
- if (samplerates[i] == 0)
+ if (i >= samplerates_count || samplerates[i] == 0)
return SR_ERR_SAMPLERATE;
+ /*
+ * Depending on the samplerates of 200/100/50- MHz, specific
+ * firmware is required and higher rates might limit the set
+ * of available channels.
+ */
if (samplerate <= SR_MHZ(50)) {
ret = upload_firmware(drvc->sr_ctx, 0, devc);
devc->num_channels = 16;
devc->num_channels = 4;
}
+ /*
+ * Derive the sample period from the sample rate as well as the
+ * number of samples that the device will communicate within
+ * an "event" (memory organization internal to the device).
+ */
if (ret == SR_OK) {
devc->cur_samplerate = samplerate;
devc->period_ps = 1000000000000ULL / samplerate;
devc->state.state = SIGMA_IDLE;
}
+ /*
+ * Support for "limit_samples" is implemented by stopping
+ * acquisition after a corresponding period of time.
+ * Re-calculate that period of time, in case the limit is
+ * set first and the samplerate gets (re-)configured later.
+ */
+ if (ret == SR_OK && devc->limit_samples) {
+ uint64_t msecs;
+ msecs = sigma_limit_samples_to_msec(devc, devc->limit_samples);
+ devc->limit_msec = msecs;
+ }
+
return ret;
}
ts = sigma_dram_cluster_ts(dram_cluster);
tsdiff = ts - ss->lastts;
- ss->lastts = ts;
+ ss->lastts = ts + EVENTS_PER_CLUSTER;
packet.type = SR_DF_LOGIC;
packet.payload = &logic;
* sample in the cluster happens at the time of the timestamp
* and the remaining samples happen at timestamp +1...+6 .
*/
- for (ts = 0; ts < tsdiff - (EVENTS_PER_CLUSTER - 1); ts++) {
+ for (ts = 0; ts < tsdiff; ts++) {
i = ts % 1024;
samples[2 * i + 0] = ss->lastsample & 0xff;
samples[2 * i + 1] = ss->lastsample >> 8;
* end of submitting the padding samples, submit
* the packet to Sigrok.
*/
- if ((i == 1023) || (ts == (tsdiff - EVENTS_PER_CLUSTER))) {
+ if ((i == 1023) || (ts == tsdiff - 1)) {
logic.length = (i + 1) * logic.unitsize;
sr_session_send(sdi, &packet);
}