{
size_t i;
uint8_t buf[4096];
- int idx = 0;
+ int idx;
/* Send the startchunk. Index start with 1. */
- buf[0] = startchunk >> 8;
- buf[1] = startchunk & 0xff;
- sigma_write_register(WRITE_MEMROW, buf, 2, devc);
+ idx = 0;
+ buf[idx++] = startchunk >> 8;
+ buf[idx++] = startchunk & 0xff;
+ sigma_write_register(WRITE_MEMROW, buf, idx, devc);
/* Read the DRAM. */
+ idx = 0;
buf[idx++] = REG_DRAM_BLOCK;
buf[idx++] = REG_DRAM_WAIT_ACK;
static int sigma_fpga_init_la(struct dev_context *devc)
{
/* Initialize the logic analyzer mode. */
+ uint8_t mode_regval = WMR_SDRAMINIT;
uint8_t logic_mode_start[] = {
REG_ADDR_LOW | (READ_ID & 0xf),
- REG_ADDR_HIGH | (READ_ID >> 8),
+ REG_ADDR_HIGH | (READ_ID >> 4),
REG_READ_ADDR, /* Read ID register. */
REG_ADDR_LOW | (WRITE_TEST & 0xf),
REG_READ_ADDR, /* Read scratch register. */
REG_ADDR_LOW | (WRITE_MODE & 0xf),
- REG_DATA_LOW | 0x0,
- REG_DATA_HIGH_WRITE | 0x8,
+ REG_DATA_LOW | (mode_regval & 0xf),
+ REG_DATA_HIGH_WRITE | (mode_regval >> 4),
};
uint8_t result[3];
*/
if (ret == SR_OK) {
devc->cur_samplerate = samplerate;
- devc->period_ps = 1000000000000ULL / samplerate;
devc->samples_per_event = 16 / devc->num_channels;
devc->state.state = SIGMA_IDLE;
}
samples[2 * idx + 1] = (data >> 8) & 0xff;
}
+/*
+ * Local wrapper around sr_session_send() calls. Make sure to not send
+ * more samples to the session's datafeed than what was requested by a
+ * previously configured (optional) sample count.
+ */
+static void sigma_session_send(struct sr_dev_inst *sdi,
+ struct sr_datafeed_packet *packet)
+{
+ struct dev_context *devc;
+ struct sr_datafeed_logic *logic;
+ uint64_t send_now;
+
+ devc = sdi->priv;
+ if (devc->limit_samples) {
+ logic = (void *)packet->payload;
+ send_now = logic->length / logic->unitsize;
+ if (devc->sent_samples + send_now > devc->limit_samples) {
+ send_now = devc->limit_samples - devc->sent_samples;
+ logic->length = send_now * logic->unitsize;
+ }
+ if (!send_now)
+ return;
+ devc->sent_samples += send_now;
+ }
+
+ sr_session_send(sdi, packet);
+}
+
/*
* This size translates to: event count (1K events per cluster), times
* the sample width (unitsize, 16bits per event), times the maximum
if ((i == 1023) || (ts == tsdiff - 1)) {
logic.length = (i + 1) * logic.unitsize;
for (j = 0; j < devc->samples_per_event; j++)
- sr_session_send(sdi, &packet);
+ sigma_session_send(sdi, &packet);
}
}
trig_count = trigger_offset * devc->samples_per_event;
packet.type = SR_DF_LOGIC;
logic.length = trig_count * logic.unitsize;
- sr_session_send(sdi, &packet);
+ sigma_session_send(sdi, &packet);
send_ptr += trig_count * logic.unitsize;
send_count -= trig_count;
}
packet.type = SR_DF_LOGIC;
logic.length = send_count * logic.unitsize;
logic.data = send_ptr;
- sr_session_send(sdi, &packet);
+ sigma_session_send(sdi, &packet);
}
ss->lastsample = sample;
struct sr_dev_inst *sdi)
{
struct sigma_dram_cluster *dram_cluster;
- struct dev_context *devc = sdi->priv;
- unsigned int clusters_in_line =
- (events_in_line + (EVENTS_PER_CLUSTER - 1)) / EVENTS_PER_CLUSTER;
+ struct dev_context *devc;
+ unsigned int clusters_in_line;
unsigned int events_in_cluster;
unsigned int i;
- uint32_t trigger_cluster = ~0, triggered = 0;
+ uint32_t trigger_cluster, triggered;
+
+ devc = sdi->priv;
+ clusters_in_line = events_in_line;
+ clusters_in_line += EVENTS_PER_CLUSTER - 1;
+ clusters_in_line /= EVENTS_PER_CLUSTER;
+ trigger_cluster = ~0;
+ triggered = 0;
/* Check if trigger is in this chunk. */
if (trigger_event < (64 * 7)) {
static int download_capture(struct sr_dev_inst *sdi)
{
- struct dev_context *devc = sdi->priv;
const uint32_t chunks_per_read = 32;
+
+ struct dev_context *devc;
struct sigma_dram_line *dram_line;
int bufsz;
uint32_t stoppos, triggerpos;
uint8_t modestatus;
-
uint32_t i;
uint32_t dl_lines_total, dl_lines_curr, dl_lines_done;
- uint32_t dl_events_in_line = 64 * 7;
- uint32_t trg_line = ~0, trg_event = ~0;
+ uint32_t dl_events_in_line;
+ uint32_t trg_line, trg_event;
+
+ devc = sdi->priv;
+ dl_events_in_line = 64 * 7;
+ trg_line = ~0;
+ trg_event = ~0;
dram_line = g_try_malloc0(chunks_per_read * sizeof(*dram_line));
if (!dram_line)
sr_info("Downloading sample data.");
- /* Stop acquisition. */
- sigma_set_register(WRITE_MODE, 0x11, devc);
+ /*
+ * Ask the hardware to stop data acquisition. Reception of the
+ * FORCESTOP request makes the hardware "disable RLE" (store
+ * clusters to DRAM regardless of whether pin state changes) and
+ * raise the POSTTRIGGERED flag.
+ */
+ sigma_set_register(WRITE_MODE, WMR_FORCESTOP | WMR_SDRAMWRITEEN, devc);
+ do {
+ modestatus = sigma_get_register(READ_MODE, devc);
+ } while (!(modestatus & RMR_POSTTRIGGERED));
/* Set SDRAM Read Enable. */
- sigma_set_register(WRITE_MODE, 0x02, devc);
+ sigma_set_register(WRITE_MODE, WMR_SDRAMREADEN, devc);
/* Get the current position. */
sigma_read_pos(&stoppos, &triggerpos, devc);
/* Check if trigger has fired. */
modestatus = sigma_get_register(READ_MODE, devc);
- if (modestatus & 0x20) {
+ if (modestatus & RMR_TRIGGERED) {
trg_line = triggerpos >> 9;
trg_event = triggerpos & 0x1ff;
}
+ devc->sent_samples = 0;
+
/*
* Determine how many 1024b "DRAM lines" do we need to read from the
* Sigma so we have a complete set of samples. Note that the last
*/
static int sigma_capture_mode(struct sr_dev_inst *sdi)
{
- struct dev_context *devc = sdi->priv;
-
+ struct dev_context *devc;
uint64_t running_msec;
struct timeval tv;
-
uint32_t stoppos, triggerpos;
+ devc = sdi->priv;
+
/* Check if the selected sampling duration passed. */
gettimeofday(&tv, 0);
running_msec = (tv.tv_sec - devc->start_tv.tv_sec) * 1000 +
projects / libsigrok.git / blobdiff