static const uint32_t devopts[] = {
SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
- SR_CONF_LIMIT_SAMPLES | SR_CONF_SET,
+ SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+#if ASIX_SIGMA_WITH_TRIGGER
SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
+#endif
};
static const int32_t trigger_matches[] = {
devc->cur_samplerate = samplerates[0];
devc->period_ps = 0;
devc->limit_msec = 0;
+ devc->limit_samples = 0;
devc->cur_firmware = -1;
devc->num_channels = 0;
devc->samples_per_event = 0;
case SR_CONF_LIMIT_MSEC:
*data = g_variant_new_uint64(devc->limit_msec);
break;
+ case SR_CONF_LIMIT_SAMPLES:
+ *data = g_variant_new_uint64(devc->limit_samples);
+ break;
+#if ASIX_SIGMA_WITH_TRIGGER
case SR_CONF_CAPTURE_RATIO:
*data = g_variant_new_uint64(devc->capture_ratio);
break;
+#endif
default:
return SR_ERR_NA;
}
break;
case SR_CONF_LIMIT_SAMPLES:
tmp = g_variant_get_uint64(data);
- devc->limit_msec = tmp * 1000 / devc->cur_samplerate;
+ devc->limit_samples = tmp;
+ devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
break;
+#if ASIX_SIGMA_WITH_TRIGGER
case SR_CONF_CAPTURE_RATIO:
tmp = g_variant_get_uint64(data);
- if (tmp <= 100)
- devc->capture_ratio = tmp;
- else
- ret = SR_ERR;
+ if (tmp > 100)
+ return SR_ERR;
+ devc->capture_ratio = tmp;
break;
+#endif
default:
ret = SR_ERR_NA;
}
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
+#if ASIX_SIGMA_WITH_TRIGGER
case SR_CONF_TRIGGER_MATCH:
*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
trigger_matches, ARRAY_SIZE(trigger_matches),
sizeof(int32_t));
break;
+#endif
default:
return SR_ERR_NA;
}
struct dev_context *devc;
struct clockselect_50 clockselect;
int frac, triggerpin, ret;
- uint8_t triggerselect = 0;
+ uint8_t triggerselect;
struct triggerinout triggerinout_conf;
struct triggerlut lut;
+ uint8_t regval;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
/* Enter trigger programming mode. */
sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
- /* 100 and 200 MHz mode. */
+ triggerselect = 0;
if (devc->cur_samplerate >= SR_MHZ(100)) {
+ /* 100 and 200 MHz mode. */
sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
/* Find which pin to trigger on from mask. */
if (devc->trigger.fallingmask)
triggerselect |= 1 << 3;
- /* All other modes. */
} else if (devc->cur_samplerate <= SR_MHZ(50)) {
+ /* All other modes. */
sigma_build_basic_trigger(&lut, devc);
sigma_write_trigger_lut(&lut, devc);
/* Start acqusition. */
gettimeofday(&devc->start_tv, 0);
- sigma_set_register(WRITE_MODE, 0x0d, devc);
+ regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
+#if ASIX_SIGMA_WITH_TRIGGER
+ regval |= WMR_TRGEN;
+#endif
+ sigma_set_register(WRITE_MODE, regval, devc);
std_session_send_df_header(sdi);