Add a few more code comments.

[sigrok-firmware-fx2lafw.git] / sainsmart_dds120.c

diff --git a/sainsmart_dds120.c b/sainsmart_dds120.c
index ae3c599794b6a3797e4cb45b24a225f0105e99b7..a854f8d01ec80c0c6f1d22b05ebeffa02d4adb41 100644 (file)
--- a/sainsmart_dds120.c
+++ b/sainsmart_dds120.c
@@ -288,7 +288,7 @@ static BOOL set_samplerate(BYTE rate)
        IFCONFIG = samplerates[i].ifcfg;
 
        AUTOPTRSETUP = 7;
-       AUTOPTRH2 = 0xE4;
+       AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
        AUTOPTRL2 = 0x00;
 
        /*
@@ -305,6 +305,7 @@ static BOOL set_samplerate(BYTE rate)
         * jump 0, CTL2=Z, FIFO, LOOP
         */
 
+       /* LENGTH / BRANCH 0-7 */
        EXTAUTODAT2 = samplerates[i].wait0;
        EXTAUTODAT2 = samplerates[i].wait1;
        EXTAUTODAT2 = 1;
@@ -314,24 +315,27 @@ static BOOL set_samplerate(BYTE rate)
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
 
+       /* OPCODE 0-7 */
        EXTAUTODAT2 = samplerates[i].opc0;
        EXTAUTODAT2 = samplerates[i].opc1;
-       EXTAUTODAT2 = 1;
+       EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
 
+       /* OUTPUT 0-7 */
        EXTAUTODAT2 = samplerates[i].out0;
-       EXTAUTODAT2 = 0x44;
-       EXTAUTODAT2 = 0x44;
-       EXTAUTODAT2 = 0x00;
-       EXTAUTODAT2 = 0x00;
-       EXTAUTODAT2 = 0x00;
-       EXTAUTODAT2 = 0x00;
-       EXTAUTODAT2 = 0x00;
+       EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
+       EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
+       EXTAUTODAT2 = 0;
+       EXTAUTODAT2 = 0;
+       EXTAUTODAT2 = 0;
+       EXTAUTODAT2 = 0;
+       EXTAUTODAT2 = 0;
 
+       /* LOGIC FUNCTION 0-7 */
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
        EXTAUTODAT2 = 0;
@@ -347,6 +351,30 @@ static BOOL set_samplerate(BYTE rate)
        return TRUE;
 }
 
+static BOOL set_calibration_pulse(BYTE fs)
+{
+       switch (fs) {
+       case 0:         // 100Hz
+               RCAP2L = -10000 & 0xff;
+               RCAP2H = (-10000 >> 8) & 0xff;
+               return TRUE;
+       case 1:         // 1kHz
+               RCAP2L = -1000 & 0xff;
+               RCAP2H = (-1000 >> 8) & 0xff;
+               return TRUE;
+       case 10:        // 1kHz
+               RCAP2L = -100 & 0xff;
+               RCAP2H = 0xff;
+               return TRUE;
+       case 50:        // 50kHz
+               RCAP2L = -20 & 0xff;
+               RCAP2H = 0xff;
+               return TRUE;
+       default:
+               return FALSE;
+       }
+}
+
 /* Set *alt_ifc to the current alt interface for ifc. */
 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
 {
@@ -390,7 +418,7 @@ BOOL handle_vendorcommand(BYTE cmd)
        stop_sampling();
 
        /* Clear EP0BCH/L for each valid command. */
-       if (cmd >= 0xe0 && cmd <= 0xe5) {
+       if (cmd >= 0xe0 && cmd <= 0xe6) {
                EP0BCH = 0;
                EP0BCL = 0;
                while (EP0CS & bmEPBUSY);
@@ -414,6 +442,9 @@ BOOL handle_vendorcommand(BYTE cmd)
        case 0xe5:
                set_coupling(EP0BUF[0]);
                return TRUE;
+       case 0xe6:
+               set_calibration_pulse(EP0BUF[0]);
+               return TRUE;
        }
 
        return FALSE; /* Not handled by handlers. */
@@ -425,8 +456,8 @@ static void init(void)
        EP8CFG = 0;
 
        /* In idle mode tristate all outputs. */
-       GPIFIDLECTL = 0x00;
-       GPIFCTLCFG = 0x80;
+       GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
+       GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
        GPIFWFSELECT = 0x00;
        GPIFREADYSTAT = 0x00;