* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include <fx2macros.h>
void timer2_isr(void) __interrupt TF2_ISR
{
- /* Toggle the 1kHz pin, only accurate up to ca 8MHz */
+ /* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
IOE = IOE^0x04;
TF2 = 0;
}
/**
- * The gain stage is 2 stage approach. -6dB and -20dB on the first stage (attentuator). The second stage is then doing the gain by 3 different resistor values switched into the feedback loop.
+ * The gain stage is 2 stage approach. -6dB and -20dB on the first stage
+ * (attentuator). The second stage is then doing the gain by 3 different
+ * resistor values switched into the feedback loop.
+ *
* #Channel 0:
* PC1=1; PC2=0; PC3= 0 -> Gain x0.1 = -20dB
* PC1=1; PC2=0; PC3= 1 -> Gain x0.2 = -14dB
* PC1=0; PC2=0; PC3= 0 -> Gain x0.5 = -6dB
* PC1=0; PC2=0; PC3= 1 -> Gain x1 = 0dB
* PC1=0; PC2=1; PC3= 0 -> Gain x2 = +6dB
+ *
* #Channel 1:
* PE1=1; PC4=0; PC5= 0 -> Gain x0.1 = -20dB
* PE1=1; PC4=0; PC5= 1 -> Gain x0.2 = -14dB
return TRUE;
}
+/**
+ * Each LSB in the nibble of the byte controls the coupling per channel.
+ *
+ * Setting PE3 disables AC coupling capacitor on CH0.
+ * Setting PE0 disables AC coupling capacitor on CH1.
+ */
+static void set_coupling(BYTE coupling_cfg)
+{
+ if (coupling_cfg & 0x01)
+ IOE |= 0x08;
+ else
+ IOE &= ~0x08;
+
+ if (coupling_cfg & 0x10)
+ IOE |= 0x01;
+ else
+ IOE &= ~0x01;
+}
+
static BOOL set_numchannels(BYTE numchannels)
{
if (numchannels == 1 || numchannels == 2) {
{ 30, 0x80, 0, 3, 0, 0x00, 0xaa },
{ 24, 1, 0, 2, 1, 0x40, 0xea },
{ 16, 1, 1, 2, 0, 0x40, 0xea },
+ { 15, 1, 0, 2, 1, 0x40, 0xaa },
{ 12, 2, 1, 2, 0, 0x40, 0xea },
+ { 11, 1, 1, 2, 0, 0x40, 0xaa },
{ 8, 3, 2, 2, 0, 0x40, 0xea },
+ { 6, 2, 2, 2, 0, 0x40, 0xaa },
+ { 5, 3, 2, 2, 0, 0x40, 0xaa },
{ 4, 6, 5, 2, 0, 0x40, 0xea },
+ { 3, 5, 4, 2, 0, 0x40, 0xaa },
{ 2, 12, 11, 2, 0, 0x40, 0xea },
{ 1, 24, 23, 2, 0, 0x40, 0xea },
{ 50, 48, 47, 2, 0, 0x40, 0xea },
IFCONFIG = samplerates[i].ifcfg;
AUTOPTRSETUP = 7;
- AUTOPTRH2 = 0xE4;
+ AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
AUTOPTRL2 = 0x00;
/*
* The program for low-speed, e.g. 1 MHz, is:
- * wait 24, CTL2=0, FIFO
- * wait 23, CTL2=1
- * jump 0, CTL2=1
+ * wait 24, CTLx=0, FIFO
+ * wait 23, CTLx=1
+ * jump 0, CTLx=1
*
* The program for 24 MHz is:
- * wait 1, CTL2=0, FIFO
- * jump 0, CTL2=1
+ * wait 1, CTLx=0, FIFO
+ * jump 0, CTLx=1
*
* The program for 30/48 MHz is:
- * jump 0, CTL2=Z, FIFO, LOOP
+ * jump 0, CTLx=Z, FIFO, LOOP
+ *
+ * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
*/
+ /* LENGTH / BRANCH 0-7 */
EXTAUTODAT2 = samplerates[i].wait0;
EXTAUTODAT2 = samplerates[i].wait1;
EXTAUTODAT2 = 1;
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
+ /* OPCODE 0-7 */
EXTAUTODAT2 = samplerates[i].opc0;
EXTAUTODAT2 = samplerates[i].opc1;
- EXTAUTODAT2 = 1;
+ EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
+ /* OUTPUT 0-7 */
EXTAUTODAT2 = samplerates[i].out0;
- EXTAUTODAT2 = 0x44;
- EXTAUTODAT2 = 0x44;
- EXTAUTODAT2 = 0x00;
- EXTAUTODAT2 = 0x00;
- EXTAUTODAT2 = 0x00;
- EXTAUTODAT2 = 0x00;
- EXTAUTODAT2 = 0x00;
+ EXTAUTODAT2 = 0x44; /* OE2=1, CTL2=1 */
+ EXTAUTODAT2 = 0x44; /* OE2=1, CTL2=1 */
+ EXTAUTODAT2 = 0;
+ EXTAUTODAT2 = 0;
+ EXTAUTODAT2 = 0;
+ EXTAUTODAT2 = 0;
+ EXTAUTODAT2 = 0;
+ /* LOGIC FUNCTION 0-7 */
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
EXTAUTODAT2 = 0;
return TRUE;
}
+static BOOL set_calibration_pulse(BYTE fs)
+{
+ switch (fs) {
+ case 0: // 100Hz
+ RCAP2L = -10000 & 0xff;
+ RCAP2H = (-10000 & 0xff00) >> 8;
+ return TRUE;
+ case 1: // 1kHz
+ RCAP2L = -1000 & 0xff;
+ RCAP2H = (-1000 & 0xff00) >> 8;
+ return TRUE;
+ case 10: // 1kHz
+ RCAP2L = (BYTE)(-100 & 0xff);
+ RCAP2H = 0xff;
+ return TRUE;
+ case 50: // 50kHz
+ RCAP2L = (BYTE)(-20 & 0xff);
+ RCAP2H = 0xff;
+ return TRUE;
+ default:
+ return FALSE;
+ }
+}
+
/* Set *alt_ifc to the current alt interface for ifc. */
BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
{
stop_sampling();
/* Clear EP0BCH/L for each valid command. */
- if (cmd >= 0xe0 && cmd <= 0xe4) {
+ if (cmd >= 0xe0 && cmd <= 0xe6) {
EP0BCH = 0;
EP0BCL = 0;
while (EP0CS & bmEPBUSY);
case 0xe4:
set_numchannels(EP0BUF[0]);
return TRUE;
+ case 0xe5:
+ set_coupling(EP0BUF[0]);
+ return TRUE;
+ case 0xe6:
+ set_calibration_pulse(EP0BUF[0]);
+ return TRUE;
}
return FALSE; /* Not handled by handlers. */
EP8CFG = 0;
/* In idle mode tristate all outputs. */
- GPIFIDLECTL = 0x00;
- GPIFCTLCFG = 0x80;
+ GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
+ GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
GPIFWFSELECT = 0x00;
GPIFREADYSTAT = 0x00;
/* Init timer2. */
RCAP2L = -1000 & 0xff;
- RCAP2H = (-1000 >> 8) & 0xff;
+ RCAP2H = (-1000 & 0xff00) >> 8;
T2CON = 0;
ET2 = 1;
TR2 = 1;
dosuspend = FALSE;
do {
/* Make sure ext wakeups are cleared. */
- WAKEUPCS |= bmWU|bmWU2;
+ WAKEUPCS |= bmWU | bmWU2;
SUSPEND = 1;
PCON |= 1;
__asm
projects / sigrok-firmware-fx2lafw.git / blobdiff