Always interleave analog data with all enabled probes.

[libsigrok.git] / hardware / agilent-dmm / sched.c

diff --git a/hardware/agilent-dmm/sched.c b/hardware/agilent-dmm/sched.c
index 339dbac6aaf11e6a995c276c663d15fafc018cba..d7d720d3227af38c87efc2ffb9eaf46cb4a5350d 100644 (file)
--- a/hardware/agilent-dmm/sched.c
+++ b/hardware/agilent-dmm/sched.c
@@ -119,7 +119,7 @@ SR_PRIV int agdmm_receive_data(int fd, int revents, void *cb_data)
 
        dispatch(sdi);
 
-       if (devc->num_samples >= devc->limit_samples)
+       if (devc->limit_samples && devc->num_samples >= devc->limit_samples)
                sdi->driver->dev_acquisition_stop(sdi, cb_data);
 
        return TRUE;
@@ -263,6 +263,7 @@ static int recv_fetc(const struct sr_dev_inst *sdi, GMatchInfo *match)
        analog.mq = devc->cur_mq;
        analog.unit = devc->cur_unit;
        analog.mqflags = devc->cur_mqflags;
+       analog.probes = sdi->probes;
        analog.num_samples = 1;
        analog.data = &fvalue;
        packet.type = SR_DF_ANALOG;