Enable full port A as output on 6022BL

[sigrok-firmware-fx2lafw.git] / hantek_6022bl.c

diff --git a/hantek_6022bl.c b/hantek_6022bl.c
index 44b917d104f221b291c9b5a68dc9cdb96aec80a2..d1ff045eae2f2412f4256c112c501eb2427f343f 100644 (file)
--- a/hantek_6022bl.c
+++ b/hantek_6022bl.c
@@ -223,16 +223,16 @@ static const struct samplerate_info {
 } samplerates[] = {
        { 48, 0x80,   0, 3, 0, 0x00, 0xea },
        { 30, 0x80,   0, 3, 0, 0x00, 0xaa },
-       { 24,    1,   0, 2, 1, 0x40, 0xca },
-       { 16,    1,   1, 2, 0, 0x40, 0xca },
-       { 12,    2,   1, 2, 0, 0x40, 0xca },
-       {  8,    3,   2, 2, 0, 0x40, 0xca },
-       {  4,    6,   5, 2, 0, 0x40, 0xca },
-       {  2,   12,  11, 2, 0, 0x40, 0xca },
-       {  1,   24,  23, 2, 0, 0x40, 0xca },
-       { 50,   48,  47, 2, 0, 0x40, 0xca },
-       { 20,  120, 119, 2, 0, 0x40, 0xca },
-       { 10,  240, 239, 2, 0, 0x40, 0xca },
+       { 24,    1,   0, 2, 1, 0x10, 0xca },
+       { 16,    1,   1, 2, 0, 0x10, 0xca },
+       { 12,    2,   1, 2, 0, 0x10, 0xca },
+       {  8,    3,   2, 2, 0, 0x10, 0xca },
+       {  4,    6,   5, 2, 0, 0x10, 0xca },
+       {  2,   12,  11, 2, 0, 0x10, 0xca },
+       {  1,   24,  23, 2, 0, 0x10, 0xca },
+       { 50,   48,  47, 2, 0, 0x10, 0xca },
+       { 20,  120, 119, 2, 0, 0x10, 0xca },
+       { 10,  240, 239, 2, 0, 0x10, 0xca },
 };
 
 static BOOL set_samplerate(BYTE rate)
@@ -439,7 +439,7 @@ static void main(void)
        PORTCCFG = 0;
        PORTACFG = 0;
        OEC = 0xff;
-       OEA = 0x80;
+       OEA = 0xff;
 
        while (TRUE) {
                if (dosud) {