Prepare for the 0.1.1 release.

[sigrok-firmware-fx2lafw.git] / fx2lafw.c

diff --git a/fx2lafw.c b/fx2lafw.c
index 7fe952843a6c165ef33d6ccd363bf95b77a8c719..73fbf2032239f0a84a1c900d0cbfe24b2f55f525 100644 (file)
--- a/fx2lafw.c
+++ b/fx2lafw.c
@@ -28,10 +28,9 @@
  *
  *  - We use the FX2 in GPIF mode to sample the data (asynchronously).
  *  - We use the internal 48MHz clock for GPIF.
- *  - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7.
- *    Support for 16 channels is not yet included, but might be added later.
- *  - Endpoint 2 is used for data transfers from FX2 to host.
- *  - The endpoint is quad-buffered.
+ *  - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7,
+ *    or PB0-PB7 + PD0-PD7 for 16-channel sampling. 
+ *  - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host.
  *
  * Documentation:
  *
@@ -44,7 +43,6 @@
 #include <setupdat.h>
 #include <eputils.h>
 #include <gpif.h>
-
 #include <command.h>
 #include <fx2lafw.h>
 #include <gpif-acquisition.h>
@@ -157,7 +155,7 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
        /* We only support interface 0, alternate interface 0. */
        if (ifc != 0 || alt_ifc != 0)
                return FALSE;
-       
+
        /* Perform procedure from TRM, section 2.3.7: */
 
        /* (1) TODO. */
@@ -165,17 +163,11 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
        /* (2) Reset data toggles of the EPs in the interface. */
        /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
        RESETTOGGLE(0x82);
-#ifdef DEBUG
-       RESETTOGGLE(0x86);
-#endif
 
        /* (3) Restore EPs to their default conditions. */
        /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
        RESETFIFO(0x02);
        /* TODO */
-#ifdef DEBUG
-       RESETFIFO(0x06);
-#endif
 
        /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */