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[sigrok-firmware-fx2lafw.git] / fx2lafw.c

diff --git a/fx2lafw.c b/fx2lafw.c
index 6c99f04692b86dd87db8de16864cc85814c9a3ce..2a64b84ae8db8de497fe95de85279ed4c0926456 100644 (file)
--- a/fx2lafw.c
+++ b/fx2lafw.c
@@ -41,10 +41,10 @@
 #include <fx2regs.h>
 #include <fx2macros.h>
 #include <delay.h>
-#include <autovector.h>
 #include <setupdat.h>
 #include <eputils.h>
 #include <gpif.h>
+#include <fx2lafw.h>
 
 /* Protocol commands */
 #define CMD_SET_SAMPLERATE     0xb0
@@ -259,21 +259,36 @@ static void setup_endpoints(void)
                 (0 << 1) | (0 << 0);     /* EP buffering: quad buffering */
        SYNCDELAY();
 
-       /* Disable all other EPs (EP1, EP4, EP6, and EP8). */
+       /* Setup EP6 (IN) in the debug build. */
+#ifdef DEBUG
+       EP6CFG = (1 << 7) |               /* EP is valid/activated */
+                (1 << 6) |               /* EP direction: IN */
+                (1 << 5) | (0 << 4) |    /* EP Type: bulk */
+                (0 << 3) |               /* EP buffer size: 512 */
+                (0 << 2) |               /* Reserved */
+                (1 << 1) | (0 << 0);     /* EP buffering: double buffering */
+#else
+       EP6CFG &= ~bmVALID;
+#endif
+       SYNCDELAY();
+
+       /* Disable all other EPs (EP1, EP4, and EP8). */
        EP1INCFG &= ~bmVALID;
        SYNCDELAY();
        EP1OUTCFG &= ~bmVALID;
        SYNCDELAY();
        EP4CFG &= ~bmVALID;
        SYNCDELAY();
-       EP6CFG &= ~bmVALID;
-       SYNCDELAY();
        EP8CFG &= ~bmVALID;
        SYNCDELAY();
 
        /* EP2: Reset the FIFOs. */
        /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
        RESETFIFO(0x02)
+#ifdef DEBUG
+       /* Reset the FIFOs of EP6 when in debug mode. */
+       RESETFIFO(0x06)
+#endif
 
        /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
        EP2FIFOCFG = bmAUTOIN | ~bmWORDWIDE;
@@ -340,11 +355,17 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
        /* (2) Reset data toggles of the EPs in the interface. */
        /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
        RESETTOGGLE(0x82);
+#ifdef DEBUG
+       RESETTOGGLE(0x86);
+#endif
 
        /* (3) Restore EPs to their default conditions. */
        /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
        RESETFIFO(0x02);
        /* TODO */
+#ifdef DEBUG
+       RESETFIFO(0x06);
+#endif
 
        /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
 
@@ -386,7 +407,7 @@ void hispeed_isr(void) interrupt HISPEED_ISR
        CLEAR_HISPEED();
 }
 
-void main(void)
+void fx2lafw_init(void)
 {
        /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
        REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
@@ -417,11 +438,12 @@ void main(void)
 
        /* Perform the initial GPIF read. */
        gpif_fifo_read(GPIF_EP2);
+}
 
-       while (1) {
-               if (got_sud) {
-                       handle_setupdata();
-                       got_sud = FALSE;
-               }
+void fx2lafw_run(void)
+{
+       if (got_sud) {
+               handle_setupdata();
+               got_sud = FALSE;
        }
 }