const struct model_info *model; /* device model descriptor */
struct acquisition_state *acquisition; /* running capture state */
int active_fpga_config; /* FPGA configuration index */
const struct model_info *model; /* device model descriptor */
struct acquisition_state *acquisition; /* running capture state */
int active_fpga_config; /* FPGA configuration index */
enum protocol_state state; /* async protocol state */
gboolean cancel_requested; /* stop after current transfer */
enum protocol_state state; /* async protocol state */
gboolean cancel_requested; /* stop after current transfer */
enum signal_edge cfg_clock_edge; /* ext clock edge setting */
enum trigger_source cfg_trigger_source; /* trigger source setting */
enum signal_edge cfg_trigger_slope; /* ext trigger slope setting */
enum signal_edge cfg_clock_edge; /* ext clock edge setting */
enum trigger_source cfg_trigger_source; /* trigger source setting */
enum signal_edge cfg_trigger_slope; /* ext trigger slope setting */
-SR_PRIV const struct model_info lwla1016_info;
-SR_PRIV const struct model_info lwla1034_info;
+extern SR_PRIV const struct model_info lwla1016_info;
+extern SR_PRIV const struct model_info lwla1034_info;