- /*
- * Set up the channel mask for later configuration into the
- * flag register.
- */
- channel_bit = 1 << (ch->index);
- devc->channel_mask |= channel_bit;
-
- if (!ch->trigger)
- continue;
-
- /* Configure trigger mask and value. */
- stage = 0;
- for (tc = ch->trigger; tc && *tc; tc++) {
- devc->trigger_mask[stage] |= channel_bit;
- if ((*tc == '1') || (*tc == 'r'))
- devc->trigger_value[stage] |= channel_bit;
- if ((*tc == 'r') || (*tc == 'f'))
- devc->trigger_edge[stage] |= channel_bit;
- stage++;
- /* Only supporting parallel mode, with up to 4 stages. */
- if (stage > 3)
- return SR_ERR;
+ for (l = trigger->stages; l; l = l->next) {
+ stage = l->data;
+ for (m = stage->matches; m; m = m->next) {
+ match = m->data;
+ if (!match->channel->enabled)
+ /* Ignore disabled channels with a trigger. */
+ continue;
+ devc->trigger_mask[stage->stage] |= 1 << match->channel->index;
+ if (match->match == SR_TRIGGER_ONE || match->match == SR_TRIGGER_RISING)
+ devc->trigger_value[stage->stage] |= 1 << match->channel->index;
+ if (match->match == SR_TRIGGER_RISING || match->match == SR_TRIGGER_FALLING)
+ devc->trigger_edge[stage->stage] |= 1 << match->channel->index;