+ /* Check if the selected sampling duration passed. */
+ gettimeofday(&tv, 0);
+ running_msec = (tv.tv_sec - devc->start_tv.tv_sec) * 1000 +
+ (tv.tv_usec - devc->start_tv.tv_usec) / 1000;
+ if (running_msec >= devc->limit_msec)
+ goto download;
+
+ /* Get the position in DRAM to which the FPGA is writing now. */
+ sigma_read_pos(&stoppos, &triggerpos, devc);
+ /* Test if DRAM is full and if so, download the data. */
+ if ((stoppos >> 9) == 32767)
+ goto download;
+
+ return TRUE;
+
+download:
+
+ /* Stop acquisition. */
+ sigma_set_register(WRITE_MODE, 0x11, devc);
+
+ /* Set SDRAM Read Enable. */
+ sigma_set_register(WRITE_MODE, 0x02, devc);