+ struct dev_context *devc = sdi->priv;
+ const struct sr_probe *probe;
+ const GSList *l;
+ int trigger_set = 0;
+ int probebit;
+
+ memset(&devc->trigger, 0, sizeof(struct sigma_trigger));
+
+ for (l = sdi->probes; l; l = l->next) {
+ probe = (struct sr_probe *)l->data;
+ probebit = 1 << (probe->index);
+
+ if (!probe->enabled || !probe->trigger)
+ continue;
+
+ if (devc->cur_samplerate >= SR_MHZ(100)) {
+ /* Fast trigger support. */
+ if (trigger_set) {
+ sr_err("Only a single pin trigger in 100 and "
+ "200MHz mode is supported.");
+ return SR_ERR;
+ }
+ if (probe->trigger[0] == 'f')
+ devc->trigger.fallingmask |= probebit;
+ else if (probe->trigger[0] == 'r')
+ devc->trigger.risingmask |= probebit;
+ else {
+ sr_err("Only rising/falling trigger in 100 "
+ "and 200MHz mode is supported.");
+ return SR_ERR;
+ }
+
+ ++trigger_set;
+ } else {
+ /* Simple trigger support (event). */
+ if (probe->trigger[0] == '1') {
+ devc->trigger.simplevalue |= probebit;
+ devc->trigger.simplemask |= probebit;
+ }
+ else if (probe->trigger[0] == '0') {
+ devc->trigger.simplevalue &= ~probebit;
+ devc->trigger.simplemask |= probebit;
+ }
+ else if (probe->trigger[0] == 'f') {
+ devc->trigger.fallingmask |= probebit;
+ ++trigger_set;
+ }
+ else if (probe->trigger[0] == 'r') {
+ devc->trigger.risingmask |= probebit;
+ ++trigger_set;
+ }
+
+ /*
+ * Actually, Sigma supports 2 rising/falling triggers,
+ * but they are ORed and the current trigger syntax
+ * does not permit ORed triggers.
+ */
+ if (trigger_set > 1) {
+ sr_err("Only 1 rising/falling trigger "
+ "is supported.");
+ return SR_ERR;
+ }
+ }
+
+ if (trigger_set)
+ devc->use_triggers = 1;
+ }