if (!(devc = sdi->priv))
return SR_ERR;
- /*
+ /*
* If timebase < 50 msecs/DIV just sleep about one sweep time except
* for really fast sweeps.
*/
if (devc->model->series->protocol != PROTOCOL_V3)
return SR_OK;
- if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
- ch->index + 1) != SR_OK)
- return SR_ERR;
+ if (ch->type == SR_CHANNEL_LOGIC) {
+ if (rigol_ds_config_set(sdi->conn, ":WAV:SOUR LA") != SR_OK)
+ return SR_ERR;
+ } else {
+ if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
+ ch->index + 1) != SR_OK)
+ return SR_ERR;
+ }
/* Check that the number of samples will be accepted */
- if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
+ if (rigol_ds_config_set(sdi, ":WAV:POIN %d",
+ ch->type == SR_CHANNEL_LOGIC ?
+ devc->digital_frame_size :
+ devc->analog_frame_size) != SR_OK)
return SR_ERR;
if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
return SR_ERR;
rigol_ds_set_wait_event(devc, WAIT_NONE);
break;
case PROTOCOL_V3:
- if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
- ch->index + 1) != SR_OK)
- return SR_ERR;
+ if (ch->type == SR_CHANNEL_LOGIC) {
+ if (rigol_ds_config_set(sdi->conn, ":WAV:SOUR LA") != SR_OK)
+ return SR_ERR;
+ } else {
+ if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
+ ch->index + 1) != SR_OK)
+ return SR_ERR;
+ }
if (devc->data_source != DATA_SOURCE_LIVE) {
if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
return SR_ERR;
if (devc->num_block_bytes == 0) {
if (devc->model->series->protocol >= PROTOCOL_V4) {
- if (sr_scpi_send(sdi->conn, ":WAV:START %d",
+ if (rigol_ds_config_set(sdi, ":WAV:START %d",
devc->num_channel_bytes + 1) != SR_OK)
return TRUE;
- if (sr_scpi_send(sdi->conn, ":WAV:STOP %d",
+ if (rigol_ds_config_set(sdi, ":WAV:STOP %d",
MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
devc->analog_frame_size)) != SR_OK)
return TRUE;
else
for (i = 0; i < len; i++)
devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
- sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
+ float vdivlog = log10f(vdiv);
+ int digits = -(int)vdivlog + (vdivlog < 0.0);
+ sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
analog.meaning->channels = g_slist_append(NULL, ch);
analog.num_samples = len;
analog.data = devc->data;
SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
+ struct sr_channel *ch;
char *cmd;
unsigned int i;
int res;
g_free(cmd);
if (res != SR_OK)
return SR_ERR;
+ ch = g_slist_nth_data(sdi->channels, i);
+ ch->enabled = devc->analog_channels[i];
}
sr_dbg("Current analog channel state:");
for (i = 0; i < devc->model->analog_channels; i++)
/* Digital channel state. */
if (devc->model->has_digital) {
if (sr_scpi_get_bool(sdi->conn,
- devc->model->series->protocol >= PROTOCOL_V4 ?
+ devc->model->series->protocol >= PROTOCOL_V3 ?
":LA:STAT?" : ":LA:DISP?",
&devc->la_enabled) != SR_OK)
return SR_ERR;
devc->la_enabled ? "enabled" : "disabled");
for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
cmd = g_strdup_printf(
- devc->model->series->protocol >= PROTOCOL_V4 ?
+ devc->model->series->protocol >= PROTOCOL_V3 ?
":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
g_free(cmd);
if (res != SR_OK)
return SR_ERR;
+ ch = g_slist_nth_data(sdi->channels, i + devc->model->analog_channels);
+ ch->enabled = devc->digital_channels[i];
sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
}
}
return SR_ERR;
sr_dbg("Current timebase %g", devc->timebase);
+ /* Probe attenuation. */
+ for (i = 0; i < devc->model->analog_channels; i++) {
+ cmd = g_strdup_printf(":CHAN%d:PROB?", i + 1);
+ res = sr_scpi_get_float(sdi->conn, cmd, &devc->attenuation[i]);
+ g_free(cmd);
+ if (res != SR_OK)
+ return SR_ERR;
+ }
+ sr_dbg("Current probe attenuation:");
+ for (i = 0; i < devc->model->analog_channels; i++)
+ sr_dbg("CH%d %g", i + 1, devc->attenuation[i]);
+
/* Vertical gain and offset. */
if (rigol_ds_get_dev_cfg_vertical(sdi) != SR_OK)
return SR_ERR;
return SR_ERR;
sr_dbg("Current trigger slope %s", devc->trigger_slope);
+ /* Trigger level. */
+ if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK)
+ return SR_ERR;
+ sr_dbg("Current trigger level %g", devc->trigger_level);
+
return SR_OK;
}