2 * This file is part of the libsigrok project.
4 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
21 #define LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
23 #define LOG_PREFIX "sysclk-lwla"
27 #include <libsigrok/libsigrok.h>
28 #include "libsigrok-internal.h"
31 /* For now, only the LWLA1034 is supported.
33 #define VENDOR_NAME "SysClk"
34 #define MODEL_NAME "LWLA1034"
36 #define USB_VID_PID "2961.6689"
38 #define USB_INTERFACE 0
39 #define USB_TIMEOUT_MS 3000
41 #define NUM_CHANNELS 34
43 /* Bit mask covering all 34 channels.
45 #define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_CHANNELS) - 1)
47 /** Unit and packet size for the sigrok logic datafeed.
49 #define UNIT_SIZE ((NUM_CHANNELS + 7) / 8)
50 #define PACKET_LENGTH (10 * 1000) /* units */
52 /** Size of the acquisition buffer in device memory units.
54 #define MEMORY_DEPTH (256 * 1024) /* 256k x 36 bit */
56 /** Number of device memory units (36 bit) to read at a time. Slices of 8
57 * consecutive 36-bit words are mapped to 9 32-bit words each, so the chunk
58 * length should be a multiple of 8 to ensure alignment to slice boundaries.
60 * Experimentation has shown that reading chunks larger than about 1024 bytes
61 * is unreliable. The threshold seems to relate to the buffer size on the FX2
62 * USB chip: The configured endpoint buffer size is 512, and with double or
63 * triple buffering enabled a multiple of 512 bytes can be kept in fly.
65 * The vendor software limits reads to 120 words (15 slices, 540 bytes) at
66 * a time. So far, it appears safe to increase this to 224 words (28 slices,
67 * 1008 bytes), thus making the most of two 512 byte buffers.
69 #define READ_CHUNK_LEN (28 * 8)
71 /** Calculate the required buffer size in 32-bit units for reading a given
72 * number of device memory words. Rounded to a multiple of 8 device words.
74 #define LWLA1034_MEMBUF_LEN(count) (((count) + 7) / 8 * 9)
76 /** Maximum number of 16-bit words sent at a time during acquisition.
77 * Used for allocating the libusb transfer buffer.
79 #define MAX_ACQ_SEND_WORDS 8 /* 5 for memory read request plus stuffing */
81 /** Maximum number of 32-bit words received at a time during acquisition.
82 * Round to the next multiple of the endpoint buffer size to avoid nasty
83 * transfer overflow conditions on hiccups.
85 #define MAX_ACQ_RECV_LEN ((READ_CHUNK_LEN / 8 * 9 + 127) / 128 * 128)
87 /** Maximum length of a register write sequence.
89 #define MAX_REG_WRITE_SEQ_LEN 5
91 /** Default configured samplerate.
93 #define DEFAULT_SAMPLERATE SR_MHZ(125)
95 /** Maximum configurable sample count limit.
97 #define MAX_LIMIT_SAMPLES (UINT64_C(1) << 48)
99 /** Maximum configurable capture duration in milliseconds.
101 #define MAX_LIMIT_MSEC (UINT64_C(1) << 32)
103 /** LWLA1034 FPGA clock configurations.
112 /** Available clock sources.
119 /** Available trigger sources.
121 enum trigger_source {
122 TRIGGER_CHANNELS = 0,
126 /** Available edge choices for the external clock and trigger inputs.
133 /** LWLA device states.
141 STATE_STATUS_REQUEST,
142 STATE_STATUS_RESPONSE,
146 STATE_LENGTH_REQUEST,
147 STATE_LENGTH_RESPONSE,
155 /** LWLA run-length encoding states.
162 /** LWLA sample acquisition and decompression state.
164 struct acquisition_state {
168 /** Maximum number of samples to process. */
169 uint64_t samples_max;
170 /** Number of samples sent to the session bus. */
171 uint64_t samples_done;
173 /** Maximum duration of capture, in milliseconds. */
174 uint64_t duration_max;
175 /** Running capture duration since trigger event. */
176 uint64_t duration_now;
178 /** Capture memory fill level. */
179 size_t mem_addr_fill;
181 size_t mem_addr_done;
182 size_t mem_addr_next;
183 size_t mem_addr_stop;
187 struct libusb_transfer *xfer_in;
188 struct libusb_transfer *xfer_out;
190 unsigned int capture_flags;
194 /** Whether to bypass the clock divider. */
195 gboolean bypass_clockdiv;
197 /* Payload data buffers for incoming and outgoing transfers. */
198 uint32_t xfer_buf_in[MAX_ACQ_RECV_LEN];
199 uint16_t xfer_buf_out[MAX_ACQ_SEND_WORDS];
201 /* Payload buffer for sigrok logic packets. */
202 uint8_t out_packet[PACKET_LENGTH * UNIT_SIZE];
205 /** Private, per-device-instance driver context.
208 /** The samplerate selected by the user. */
211 /** The maximum sampling duration, in milliseconds. */
214 /** The maximum number of samples to acquire. */
215 uint64_t limit_samples;
217 /** Channels to use. */
218 uint64_t channel_mask;
220 uint64_t trigger_mask;
221 uint64_t trigger_edge_mask;
222 uint64_t trigger_values;
224 struct acquisition_state *acquisition;
226 struct regval_pair reg_write_seq[MAX_REG_WRITE_SEQ_LEN];
230 enum device_state state;
232 /** The currently active clock configuration of the device. */
233 enum clock_config cur_clock_config;
235 /** Clock source configuration setting. */
236 enum clock_source cfg_clock_source;
237 /** Clock edge configuration setting. */
238 enum signal_edge cfg_clock_edge;
240 /** Trigger source configuration setting. */
241 enum trigger_source cfg_trigger_source;
242 /** Trigger slope configuration setting. */
243 enum signal_edge cfg_trigger_slope;
245 /** Whether a running acquisition should be canceled. */
246 gboolean cancel_requested;
248 /* Indicates that stopping the acquisition is currently in progress. */
249 gboolean stopping_in_progress;
251 /* Indicates whether a transfer failed. */
252 gboolean transfer_error;
255 SR_PRIV struct acquisition_state *lwla_alloc_acquisition_state(void);
256 SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq);
258 SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi);
259 SR_PRIV int lwla_set_clock_config(const struct sr_dev_inst *sdi);
260 SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi);
261 SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);
262 SR_PRIV int lwla_abort_acquisition(const struct sr_dev_inst *sdi);
264 SR_PRIV int lwla_receive_data(int fd, int revents, void *cb_data);