2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
32 #include <libsigrok/libsigrok.h>
33 #include "libsigrok-internal.h"
38 * This is a unified protocol driver for the DS1000 and DS2000 series.
40 * DS1000 support tested with a Rigol DS1102D.
42 * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
44 * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
45 * standard. If you want to read it - it costs real money...
47 * Every response from the scope has a linefeed appended because the
48 * standard says so. In principle this could be ignored because sending the
49 * next command clears the output queue of the scope. This driver tries to
50 * avoid doing that because it may cause an error being generated inside the
51 * scope and who knows what bugs the firmware has WRT this.
53 * Waveform data is transferred in a format called "arbitrary block program
54 * data" specified in IEEE 488.2. See Agilents programming manuals for their
55 * 2000/3000 series scopes for a nice description.
57 * Each data block from the scope has a header, e.g. "#900000001400".
58 * The '#' marks the start of a block.
59 * Next is one ASCII decimal digit between 1 and 9, this gives the number of
60 * ASCII decimal digits following.
61 * Last are the ASCII decimal digits giving the number of bytes (not
62 * samples!) in the block.
64 * After this header as many data bytes as indicated follow.
66 * Each data block has a trailing linefeed too.
69 static int parse_int(const char *str, int *ret)
75 tmp = strtol(str, &e, 10);
76 if (e == str || *e != '\0') {
77 sr_dbg("Failed to parse integer: '%s'", str);
81 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
84 if (tmp > INT_MAX || tmp < INT_MIN) {
85 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
93 /* Set the next event to wait for in rigol_ds_receive */
94 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
96 if (event == WAIT_STOP)
97 devc->wait_status = 2;
99 devc->wait_status = 1;
100 devc->wait_event = event;
104 * Waiting for a event will return a timeout after 2 to 3 seconds in order
105 * to not block the application.
107 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
110 struct dev_context *devc;
113 if (!(devc = sdi->priv))
119 * Trigger status may return:
120 * "TD" or "T'D" - triggered
121 * "AUTO" - autotriggered
123 * "WAIT" - waiting for trigger
127 if (devc->wait_status == 1) {
129 if (time(NULL) - start >= 3) {
130 sr_dbg("Timeout waiting for trigger");
131 return SR_ERR_TIMEOUT;
134 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
136 } while (buf[0] == status1 || buf[0] == status2);
138 devc->wait_status = 2;
140 if (devc->wait_status == 2) {
142 if (time(NULL) - start >= 3) {
143 sr_dbg("Timeout waiting for trigger");
144 return SR_ERR_TIMEOUT;
147 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
149 } while (buf[0] != status1 && buf[0] != status2);
151 rigol_ds_set_wait_event(devc, WAIT_NONE);
158 * For live capture we need to wait for a new trigger event to ensure that
159 * sample data is not returned twice.
161 * Unfortunately this will never really work because for sufficiently fast
162 * timebases and trigger rates it just can't catch the status changes.
164 * What would be needed is a trigger event register with autoreset like the
165 * Agilents have. The Rigols don't seem to have anything like this.
167 * The workaround is to only wait for the trigger when the timebase is slow
168 * enough. Of course this means that for faster timebases sample data can be
169 * returned multiple times, this effect is mitigated somewhat by sleeping
170 * for about one sweep time in that case.
172 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
174 struct dev_context *devc;
177 if (!(devc = sdi->priv))
181 * If timebase < 50 msecs/DIV just sleep about one sweep time except
182 * for really fast sweeps.
184 if (devc->timebase < 0.0499) {
185 if (devc->timebase > 0.99e-6) {
187 * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
188 * -> 85 percent of sweep time
190 s = (devc->timebase * devc->model->series->num_horizontal_divs
192 sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
195 rigol_ds_set_wait_event(devc, WAIT_NONE);
198 return rigol_ds_event_wait(sdi, 'T', 'A');
202 /* Wait for scope to got to "Stop" in single shot mode */
203 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
205 return rigol_ds_event_wait(sdi, 'S', 'S');
208 /* Check that a single shot acquisition actually succeeded on the DS2000 */
209 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
211 struct dev_context *devc;
212 struct sr_channel *ch;
215 if (!(devc = sdi->priv))
218 ch = devc->channel_entry->data;
220 if (devc->model->series->protocol != PROTOCOL_V3)
223 if (ch->type == SR_CHANNEL_LOGIC) {
224 if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
227 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
228 ch->index + 1) != SR_OK)
231 /* Check that the number of samples will be accepted */
232 if (rigol_ds_config_set(sdi, ":WAV:POIN %d",
233 ch->type == SR_CHANNEL_LOGIC ?
234 devc->digital_frame_size :
235 devc->analog_frame_size) != SR_OK)
237 if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
240 * If we get an "Execution error" the scope went from "Single" to
241 * "Stop" without actually triggering. There is no waveform
242 * displayed and trying to download one will fail - the scope thinks
243 * it has 1400 samples (like display memory) and the driver thinks
244 * it has a different number of samples.
246 * In that case just try to capture something again. Might still
247 * fail in interesting ways.
249 * Ain't firmware fun?
252 sr_warn("Single shot acquisition failed, retrying...");
253 /* Sleep a bit, otherwise the single shot will often fail */
254 g_usleep(500 * 1000);
255 rigol_ds_config_set(sdi, ":SING");
256 rigol_ds_set_wait_event(devc, WAIT_STOP);
263 /* Wait for enough data becoming available in scope output buffer */
264 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
267 struct dev_context *devc;
271 if (!(devc = sdi->priv))
274 if (devc->model->series->protocol == PROTOCOL_V3) {
279 if (time(NULL) - start >= 3) {
280 sr_dbg("Timeout waiting for data block");
281 return SR_ERR_TIMEOUT;
285 * The scope copies data really slowly from sample
286 * memory to its output buffer, so try not to bother
287 * it too much with SCPI requests but don't wait too
288 * long for short sample frame sizes.
290 g_usleep(devc->analog_frame_size < (15 * 1000) ? (100 * 1000) : (1000 * 1000));
292 /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
293 if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
296 if (parse_int(buf + 5, &len) != SR_OK)
298 } while (buf[0] == 'R' && len < (1000 * 1000));
301 rigol_ds_set_wait_event(devc, WAIT_NONE);
306 /* Send a configuration setting. */
307 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
309 struct dev_context *devc = sdi->priv;
313 va_start(args, format);
314 ret = sr_scpi_send_variadic(sdi->conn, format, args);
320 if (devc->model->series->protocol == PROTOCOL_V2) {
321 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
322 sr_spew("delay %dms", 100);
323 g_usleep(100 * 1000);
326 return sr_scpi_get_opc(sdi->conn);
330 /* Start capturing a new frameset */
331 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
333 struct dev_context *devc;
335 unsigned int num_channels, i, j;
338 if (!(devc = sdi->priv))
341 uint64_t limit_frames = devc->limit_frames;
342 if (devc->num_frames_segmented != 0 && devc->num_frames_segmented < limit_frames)
343 limit_frames = devc->num_frames_segmented;
344 if (limit_frames == 0)
345 sr_dbg("Starting data capture for frameset %" PRIu64,
346 devc->num_frames + 1);
348 sr_dbg("Starting data capture for frameset %" PRIu64 " of %"
349 PRIu64, devc->num_frames + 1, limit_frames);
351 switch (devc->model->series->protocol) {
353 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
356 if (devc->data_source == DATA_SOURCE_LIVE) {
357 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
359 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
361 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
363 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
365 if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
367 if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
369 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
371 rigol_ds_set_wait_event(devc, WAIT_STOP);
377 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
379 if (devc->data_source == DATA_SOURCE_LIVE) {
380 if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
382 devc->analog_frame_size = devc->model->series->live_samples;
383 devc->digital_frame_size = devc->model->series->live_samples;
384 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
386 if (devc->model->series->protocol == PROTOCOL_V3) {
387 if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
389 } else if (devc->model->series->protocol >= PROTOCOL_V4) {
392 /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
393 for (i = 0; i < devc->model->analog_channels; i++) {
394 if (devc->analog_channels[i]) {
396 } else if (i >= 2 && devc->model->has_digital) {
397 for (j = 0; j < 8; j++) {
398 if (devc->digital_channels[8 * (i - 2) + j]) {
406 buffer_samples = devc->model->series->buffer_samples;
407 if (buffer_samples == 0)
409 /* The DS4000 series does not have a fixed memory depth, it
410 * can be chosen from the menu and also varies with number
411 * of active channels. Retrieve the actual number with the
412 * ACQ:MDEP command. */
413 sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples);
414 devc->analog_frame_size = devc->digital_frame_size =
419 /* The DS1000Z series has a fixed memory depth which we
420 * need to divide correctly according to the number of
421 * active channels. */
422 devc->analog_frame_size = devc->digital_frame_size =
431 if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
433 rigol_ds_set_wait_event(devc, WAIT_STOP);
434 if (devc->data_source == DATA_SOURCE_SEGMENTED &&
435 devc->model->series->protocol <= PROTOCOL_V4)
436 if (rigol_ds_config_set(sdi, "FUNC:WREP:FCUR %d", devc->num_frames + 1) != SR_OK)
445 /* Start reading data from the current channel */
446 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
448 struct dev_context *devc;
449 struct sr_channel *ch;
451 if (!(devc = sdi->priv))
454 ch = devc->channel_entry->data;
456 sr_dbg("Starting reading data from channel %d", ch->index + 1);
458 switch (devc->model->series->protocol) {
461 if (ch->type == SR_CHANNEL_LOGIC) {
462 if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
465 if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
466 ch->index + 1) != SR_OK)
469 rigol_ds_set_wait_event(devc, WAIT_NONE);
472 if (ch->type == SR_CHANNEL_LOGIC) {
473 if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
476 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
477 ch->index + 1) != SR_OK)
480 if (devc->data_source != DATA_SOURCE_LIVE) {
481 if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
483 if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
489 if (ch->type == SR_CHANNEL_ANALOG) {
490 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
491 ch->index + 1) != SR_OK)
494 if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d",
499 if (rigol_ds_config_set(sdi,
500 devc->data_source == DATA_SOURCE_LIVE ?
501 ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
504 if (devc->data_source != DATA_SOURCE_LIVE) {
505 if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
511 if (devc->model->series->protocol >= PROTOCOL_V3 &&
512 ch->type == SR_CHANNEL_ANALOG) {
513 /* Vertical increment. */
514 if (sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
515 &devc->vert_inc[ch->index]) != SR_OK)
517 /* Vertical origin. */
518 if (sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
519 &devc->vert_origin[ch->index]) != SR_OK)
521 /* Vertical reference. */
522 if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
523 &devc->vert_reference[ch->index]) != SR_OK)
525 } else if (ch->type == SR_CHANNEL_ANALOG) {
526 devc->vert_inc[ch->index] = devc->vdiv[ch->index] / 25.6;
529 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
531 devc->num_channel_bytes = 0;
532 devc->num_header_bytes = 0;
533 devc->num_block_bytes = 0;
538 /* Read the header of a data block */
539 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
541 struct sr_scpi_dev_inst *scpi = sdi->conn;
542 struct dev_context *devc = sdi->priv;
543 char *buf = (char *) devc->buffer;
544 size_t header_length;
547 /* Try to read the hashsign and length digit. */
548 if (devc->num_header_bytes < 2) {
549 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
550 2 - devc->num_header_bytes);
552 sr_err("Read error while reading data header.");
555 devc->num_header_bytes += ret;
558 if (devc->num_header_bytes < 2)
561 if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
562 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
566 header_length = 2 + buf[1] - '0';
568 /* Try to read the length. */
569 if (devc->num_header_bytes < header_length) {
570 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
571 header_length - devc->num_header_bytes);
573 sr_err("Read error while reading data header.");
576 devc->num_header_bytes += ret;
579 if (devc->num_header_bytes < header_length)
582 /* Read the data length. */
583 buf[header_length] = '\0';
585 if (parse_int(buf + 2, &ret) != SR_OK) {
586 sr_err("Received invalid data block length '%s'.", buf + 2);
590 sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
595 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
597 struct sr_dev_inst *sdi;
598 struct sr_scpi_dev_inst *scpi;
599 struct dev_context *devc;
600 struct sr_datafeed_packet packet;
601 struct sr_datafeed_analog analog;
602 struct sr_analog_encoding encoding;
603 struct sr_analog_meaning meaning;
604 struct sr_analog_spec spec;
605 struct sr_datafeed_logic logic;
606 double vdiv, offset, origin;
608 struct sr_channel *ch;
609 gsize expected_data_bytes;
613 if (!(sdi = cb_data))
616 if (!(devc = sdi->priv))
621 if (!(revents == G_IO_IN || revents == 0))
624 switch (devc->wait_event) {
628 if (rigol_ds_trigger_wait(sdi) != SR_OK)
630 if (rigol_ds_channel_start(sdi) != SR_OK)
634 if (rigol_ds_block_wait(sdi) != SR_OK)
638 if (rigol_ds_stop_wait(sdi) != SR_OK)
640 if (rigol_ds_check_stop(sdi) != SR_OK)
642 if (rigol_ds_channel_start(sdi) != SR_OK)
646 sr_err("BUG: Unknown event target encountered");
650 ch = devc->channel_entry->data;
652 expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
653 devc->analog_frame_size : devc->digital_frame_size;
655 if (devc->num_block_bytes == 0) {
656 if (devc->model->series->protocol >= PROTOCOL_V4) {
657 if (rigol_ds_config_set(sdi, ":WAV:START %d",
658 devc->num_channel_bytes + 1) != SR_OK)
660 if (rigol_ds_config_set(sdi, ":WAV:STOP %d",
661 MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
662 devc->analog_frame_size)) != SR_OK)
666 if (devc->model->series->protocol >= PROTOCOL_V3) {
667 if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
669 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
673 if (sr_scpi_read_begin(scpi) != SR_OK)
676 if (devc->format == FORMAT_IEEE488_2) {
677 sr_dbg("New block header expected");
678 len = rigol_ds_read_header(sdi);
680 /* Still reading the header. */
683 sr_err("Error while reading block header, aborting capture.");
684 std_session_send_df_frame_end(sdi);
685 sr_dev_acquisition_stop(sdi);
688 /* At slow timebases in live capture the DS2072
689 * sometimes returns "short" data blocks, with
690 * apparently no way to get the rest of the data.
691 * Discard these, the complete data block will
694 if (devc->data_source == DATA_SOURCE_LIVE
695 && (unsigned)len < expected_data_bytes) {
696 sr_dbg("Discarding short data block");
697 sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
700 devc->num_block_bytes = len;
702 devc->num_block_bytes = expected_data_bytes;
704 devc->num_block_read = 0;
707 len = devc->num_block_bytes - devc->num_block_read;
708 if (len > ACQ_BUFFER_SIZE)
709 len = ACQ_BUFFER_SIZE;
710 sr_dbg("Requesting read of %d bytes", len);
712 len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
715 sr_err("Error while reading block data, aborting capture.");
716 std_session_send_df_frame_end(sdi);
717 sr_dev_acquisition_stop(sdi);
721 sr_dbg("Received %d bytes.", len);
723 devc->num_block_read += len;
725 if (ch->type == SR_CHANNEL_ANALOG) {
726 vref = devc->vert_reference[ch->index];
727 vdiv = devc->vert_inc[ch->index];
728 origin = devc->vert_origin[ch->index];
729 offset = devc->vert_offset[ch->index];
730 if (devc->model->series->protocol >= PROTOCOL_V3)
731 for (i = 0; i < len; i++)
732 devc->data[i] = ((int)devc->buffer[i] - vref - origin) * vdiv;
734 for (i = 0; i < len; i++)
735 devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
736 float vdivlog = log10f(vdiv);
737 int digits = -(int)vdivlog + (vdivlog < 0.0);
738 sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
739 analog.meaning->channels = g_slist_append(NULL, ch);
740 analog.num_samples = len;
741 analog.data = devc->data;
742 analog.meaning->mq = SR_MQ_VOLTAGE;
743 analog.meaning->unit = SR_UNIT_VOLT;
744 analog.meaning->mqflags = 0;
745 packet.type = SR_DF_ANALOG;
746 packet.payload = &analog;
747 sr_session_send(sdi, &packet);
748 g_slist_free(analog.meaning->channels);
751 // TODO: For the MSO1000Z series, we need a way to express that
752 // this data is in fact just for a single channel, with the valid
753 // data for that channel in the LSB of each byte.
754 logic.unitsize = devc->model->series->protocol >= PROTOCOL_V4 ? 1 : 2;
755 logic.data = devc->buffer;
756 packet.type = SR_DF_LOGIC;
757 packet.payload = &logic;
758 sr_session_send(sdi, &packet);
761 if (devc->num_block_read == devc->num_block_bytes) {
762 sr_dbg("Block has been completed");
763 if (devc->model->series->protocol >= PROTOCOL_V3) {
764 /* Discard the terminating linefeed */
765 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
767 if (devc->format == FORMAT_IEEE488_2) {
768 /* Prepare for possible next block */
769 devc->num_header_bytes = 0;
770 devc->num_block_bytes = 0;
771 if (devc->data_source != DATA_SOURCE_LIVE)
772 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
774 if (!sr_scpi_read_complete(scpi) && !devc->channel_entry->next) {
775 sr_err("Read should have been completed");
777 devc->num_block_read = 0;
779 sr_dbg("%" PRIu64 " of %" PRIu64 " block bytes read",
780 devc->num_block_read, devc->num_block_bytes);
783 devc->num_channel_bytes += len;
785 if (devc->num_channel_bytes < expected_data_bytes)
786 /* Don't have the full data for this channel yet, re-run. */
789 /* End of data for this channel. */
790 if (devc->model->series->protocol == PROTOCOL_V3) {
791 /* Signal end of data download to scope */
792 if (devc->data_source != DATA_SOURCE_LIVE)
794 * This causes a query error, without it switching
795 * to the next channel causes an error. Fun with
798 rigol_ds_config_set(sdi, ":WAV:END");
801 if (devc->channel_entry->next) {
802 /* We got the frame for this channel, now get the next channel. */
803 devc->channel_entry = devc->channel_entry->next;
804 rigol_ds_channel_start(sdi);
806 /* Done with this frame. */
807 std_session_send_df_frame_end(sdi);
811 /* V5 has no way to read the number of recorded frames, so try to set the
812 * next frame and read it back instead.
814 if (devc->data_source == DATA_SOURCE_SEGMENTED &&
815 devc->model->series->protocol == PROTOCOL_V5) {
817 if (rigol_ds_config_set(sdi, "REC:CURR %d", devc->num_frames + 1) != SR_OK)
819 if (sr_scpi_get_int(sdi->conn, "REC:CURR?", &frames) != SR_OK)
821 devc->num_frames_segmented = frames;
824 if (devc->num_frames == devc->limit_frames ||
825 devc->num_frames == devc->num_frames_segmented ||
826 devc->data_source == DATA_SOURCE_MEMORY) {
827 /* Last frame, stop capture. */
828 sr_dev_acquisition_stop(sdi);
830 /* Get the next frame, starting with the first channel. */
831 devc->channel_entry = devc->enabled_channels;
833 rigol_ds_capture_start(sdi);
835 /* Start of next frame. */
836 std_session_send_df_frame_begin(sdi);
843 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
845 struct dev_context *devc;
846 struct sr_channel *ch;
853 /* Analog channel state. */
854 for (i = 0; i < devc->model->analog_channels; i++) {
855 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
856 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]);
860 ch = g_slist_nth_data(sdi->channels, i);
861 ch->enabled = devc->analog_channels[i];
863 sr_dbg("Current analog channel state:");
864 for (i = 0; i < devc->model->analog_channels; i++)
865 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
867 /* Digital channel state. */
868 if (devc->model->has_digital) {
869 if (sr_scpi_get_bool(sdi->conn,
870 devc->model->series->protocol >= PROTOCOL_V3 ?
871 ":LA:STAT?" : ":LA:DISP?",
872 &devc->la_enabled) != SR_OK)
874 sr_dbg("Logic analyzer %s, current digital channel state:",
875 devc->la_enabled ? "enabled" : "disabled");
876 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
877 if (devc->model->series->protocol >= PROTOCOL_V5)
878 cmd = g_strdup_printf(":LA:DISP? D%d", i);
879 else if (devc->model->series->protocol >= PROTOCOL_V3)
880 cmd = g_strdup_printf(":LA:DIG%d:DISP?", i);
882 cmd = g_strdup_printf(":DIG%d:TURN?", i);
883 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
887 ch = g_slist_nth_data(sdi->channels, i + devc->model->analog_channels);
888 ch->enabled = devc->digital_channels[i];
889 sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
894 if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
896 sr_dbg("Current timebase %g", devc->timebase);
898 /* Probe attenuation. */
899 for (i = 0; i < devc->model->analog_channels; i++) {
900 cmd = g_strdup_printf(":CHAN%d:PROB?", i + 1);
901 res = sr_scpi_get_float(sdi->conn, cmd, &devc->attenuation[i]);
906 sr_dbg("Current probe attenuation:");
907 for (i = 0; i < devc->model->analog_channels; i++)
908 sr_dbg("CH%d %g", i + 1, devc->attenuation[i]);
910 /* Vertical gain and offset. */
911 if (rigol_ds_get_dev_cfg_vertical(sdi) != SR_OK)
915 for (i = 0; i < devc->model->analog_channels; i++) {
916 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
917 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
922 sr_dbg("Current coupling:");
923 for (i = 0; i < devc->model->analog_channels; i++)
924 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
926 /* Trigger source. */
927 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
929 sr_dbg("Current trigger source %s", devc->trigger_source);
931 /* Horizontal trigger position. */
932 if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str,
933 &devc->horiz_triggerpos) != SR_OK)
935 sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
938 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
940 sr_dbg("Current trigger slope %s", devc->trigger_slope);
943 if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK)
945 sr_dbg("Current trigger level %g", devc->trigger_level);
950 SR_PRIV int rigol_ds_get_dev_cfg_vertical(const struct sr_dev_inst *sdi)
952 struct dev_context *devc;
960 for (i = 0; i < devc->model->analog_channels; i++) {
961 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
962 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
967 sr_dbg("Current vertical gain:");
968 for (i = 0; i < devc->model->analog_channels; i++)
969 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
971 /* Vertical offset. */
972 for (i = 0; i < devc->model->analog_channels; i++) {
973 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
974 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
979 sr_dbg("Current vertical offset:");
980 for (i = 0; i < devc->model->analog_channels; i++)
981 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);