2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 static const uint32_t devopts[] = {
24 SR_CONF_LOGIC_ANALYZER,
25 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
27 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
28 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
29 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
31 SR_CONF_SWAP | SR_CONF_SET,
32 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
35 static const int32_t trigger_matches[] = {
42 #define STR_PATTERN_NONE "None"
43 #define STR_PATTERN_EXTERNAL "External"
44 #define STR_PATTERN_INTERNAL "Internal"
46 /* Supported methods of test pattern outputs */
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
54 /** Route test pattern internally to capture buffer. */
58 static const char *patterns[] = {
64 /* Channels are numbered 0-31 (on the PCB silkscreen). */
65 SR_PRIV const char *p_ols_channel_names[] = {
66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
71 /* Default supported samplerates, can be overridden by device metadata. */
72 static const uint64_t samplerates[] = {
78 SR_PRIV struct sr_dev_driver p_ols_driver_info;
80 static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
82 return std_init(sr_ctx, di, LOG_PREFIX);
85 static GSList *scan(struct sr_dev_driver *di, GSList *options)
87 struct sr_dev_inst *sdi;
88 struct drv_context *drvc;
89 struct dev_context *devc;
101 /* Allocate memory for our private device context. */
102 devc = g_malloc0(sizeof(struct dev_context));
104 /* Device-specific settings */
105 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
107 /* Acquisition settings */
108 devc->limit_samples = devc->capture_ratio = 0;
109 devc->trigger_at = -1;
110 devc->channel_mask = 0xffffffff;
113 /* Allocate memory for the incoming ftdi data. */
114 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
116 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
117 if (!(devc->ftdic = ftdi_new())) {
118 sr_err("Failed to initialize libftdi.");
119 goto err_free_ftdi_buf;;
122 /* Try to open the FTDI device */
123 if (p_ols_open(devc) != SR_OK) {
127 /* The discovery procedure is like this: first send the Reset
128 * command (0x00) 5 times, since the device could be anywhere
129 * in a 5-byte command. Then send the ID command (0x02).
130 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
135 for (i = 0; i < 5; i++) {
136 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
141 sr_err("Could not reset device. Quitting.");
142 goto err_close_ftdic;
144 write_shortcommand(devc, CMD_ID);
146 /* Read the response data. */
147 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
148 if (bytes_read < 0) {
149 sr_err("Failed to read FTDI data (%d): %s.",
150 bytes_read, ftdi_get_error_string(devc->ftdic));
151 goto err_close_ftdic;
153 if (bytes_read == 0) {
154 goto err_close_ftdic;
157 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
158 goto err_close_ftdic;
160 /* Definitely using the OLS protocol, check if it supports
161 * the metadata command.
163 write_shortcommand(devc, CMD_METADATA);
165 /* Read the metadata. */
166 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
167 if (bytes_read < 0) {
168 sr_err("Failed to read FTDI data (%d): %s.",
169 bytes_read, ftdi_get_error_string(devc->ftdic));
170 goto err_close_ftdic;
172 if (bytes_read == 0) {
173 goto err_close_ftdic;
176 /* Close device. We'll reopen it again when we need it. */
179 /* Parse the metadata. */
180 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
182 /* Configure samplerate and divider. */
183 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
184 sr_dbg("Failed to set default samplerate (%"PRIu64").",
187 drvc->instances = g_slist_append(drvc->instances, sdi);
188 devices = g_slist_append(devices, sdi);
195 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
197 g_free(devc->ftdi_buf);
203 static GSList *dev_list(const struct sr_dev_driver *di)
205 return ((struct drv_context *)(di->context))->instances;
208 static void clear_helper(void *priv)
210 struct dev_context *devc;
214 ftdi_free(devc->ftdic);
215 g_free(devc->ftdi_buf);
218 static int dev_clear(const struct sr_dev_driver *di)
220 return std_dev_clear(di, clear_helper);
223 static int cleanup(const struct sr_dev_driver *di)
225 return dev_clear(di);
228 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
229 const struct sr_channel_group *cg)
231 struct dev_context *devc;
240 case SR_CONF_SAMPLERATE:
241 *data = g_variant_new_uint64(devc->cur_samplerate);
243 case SR_CONF_CAPTURE_RATIO:
244 *data = g_variant_new_uint64(devc->capture_ratio);
246 case SR_CONF_LIMIT_SAMPLES:
247 *data = g_variant_new_uint64(devc->limit_samples);
249 case SR_CONF_PATTERN_MODE:
250 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
251 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
252 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
253 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
255 *data = g_variant_new_string(STR_PATTERN_NONE);
258 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
260 case SR_CONF_EXTERNAL_CLOCK:
261 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
270 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
271 const struct sr_channel_group *cg)
273 struct dev_context *devc;
281 if (sdi->status != SR_ST_ACTIVE)
282 return SR_ERR_DEV_CLOSED;
287 case SR_CONF_SAMPLERATE:
288 tmp_u64 = g_variant_get_uint64(data);
289 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
290 return SR_ERR_SAMPLERATE;
291 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
293 case SR_CONF_LIMIT_SAMPLES:
294 tmp_u64 = g_variant_get_uint64(data);
295 if (tmp_u64 < MIN_NUM_SAMPLES)
297 devc->limit_samples = tmp_u64;
300 case SR_CONF_CAPTURE_RATIO:
301 devc->capture_ratio = g_variant_get_uint64(data);
302 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
307 case SR_CONF_EXTERNAL_CLOCK:
308 if (g_variant_get_boolean(data)) {
309 sr_info("Enabling external clock.");
310 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
312 sr_info("Disabled external clock.");
313 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
317 case SR_CONF_PATTERN_MODE:
318 stropt = g_variant_get_string(data, NULL);
321 if (!strcmp(stropt, STR_PATTERN_NONE)) {
322 sr_info("Disabling test modes.");
324 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
325 sr_info("Enabling internal test mode.");
326 flag = FLAG_INTERNAL_TEST_MODE;
327 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
328 sr_info("Enabling external test mode.");
329 flag = FLAG_EXTERNAL_TEST_MODE;
333 if (flag != 0xffff) {
334 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
335 devc->flag_reg |= flag;
339 if (g_variant_get_boolean(data)) {
340 sr_info("Enabling channel swapping.");
341 devc->flag_reg |= FLAG_SWAP_CHANNELS;
343 sr_info("Disabling channel swapping.");
344 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
350 if (g_variant_get_boolean(data)) {
351 sr_info("Enabling RLE.");
352 devc->flag_reg |= FLAG_RLE;
354 sr_info("Disabling RLE.");
355 devc->flag_reg &= ~FLAG_RLE;
366 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
367 const struct sr_channel_group *cg)
369 struct dev_context *devc;
370 GVariant *gvar, *grange[2];
372 int num_pols_changrp, i;
377 case SR_CONF_DEVICE_OPTIONS:
378 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
379 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
381 case SR_CONF_SAMPLERATE:
382 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
383 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
384 ARRAY_SIZE(samplerates), sizeof(uint64_t));
385 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
386 *data = g_variant_builder_end(&gvb);
388 case SR_CONF_TRIGGER_MATCH:
389 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
390 trigger_matches, ARRAY_SIZE(trigger_matches),
393 case SR_CONF_PATTERN_MODE:
394 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
396 case SR_CONF_LIMIT_SAMPLES:
400 if (devc->flag_reg & FLAG_RLE)
402 if (devc->max_samplebytes == 0)
403 /* Device didn't specify sample memory size in metadata. */
406 * Channel groups are turned off if no channels in that group are
407 * enabled, making more room for samples for the enabled group.
409 pols_channel_mask(sdi);
410 num_pols_changrp = 0;
411 for (i = 0; i < 4; i++) {
412 if (devc->channel_mask & (0xff << (i * 8)))
415 /* 3 channel groups takes as many bytes as 4 channel groups */
416 if (num_pols_changrp == 3)
417 num_pols_changrp = 4;
418 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
419 if (num_pols_changrp)
420 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
422 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
423 *data = g_variant_new_tuple(grange, 2);
432 static int dev_open(struct sr_dev_inst *sdi)
434 struct dev_context *devc;
438 if (p_ols_open(devc) != SR_OK) {
441 sdi->status = SR_ST_ACTIVE;
446 static int dev_close(struct sr_dev_inst *sdi)
449 struct dev_context *devc;
454 if (sdi->status == SR_ST_ACTIVE) {
455 sr_dbg("Status ACTIVE, closing device.");
456 ret = p_ols_close(devc);
458 sr_spew("Status not ACTIVE, nothing to do.");
461 sdi->status = SR_ST_INACTIVE;
466 static int set_trigger(const struct sr_dev_inst *sdi, int stage)
468 struct dev_context *devc;
473 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
474 arg[0] = devc->trigger_mask[stage] & 0xff;
475 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
476 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
477 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
478 if (write_longcommand(devc, cmd, arg) != SR_OK)
481 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
482 arg[0] = devc->trigger_value[stage] & 0xff;
483 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
484 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
485 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
486 if (write_longcommand(devc, cmd, arg) != SR_OK)
489 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
490 arg[0] = arg[1] = arg[3] = 0x00;
492 if (stage == devc->num_stages)
493 /* Last stage, fire when this one matches. */
494 arg[3] |= TRIGGER_START;
495 if (write_longcommand(devc, cmd, arg) != SR_OK)
498 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
499 arg[0] = devc->trigger_edge[stage] & 0xff;
500 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
501 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
502 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
503 if (write_longcommand(devc, cmd, arg) != SR_OK)
509 static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
511 struct dev_context *devc;
516 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
517 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
518 if (write_longcommand(devc, cmd, arg) != SR_OK)
521 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
522 if (write_longcommand(devc, cmd, arg) != SR_OK)
525 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
527 if (write_longcommand(devc, cmd, arg) != SR_OK)
530 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
532 if (write_longcommand(devc, cmd, arg) != SR_OK)
538 static int dev_acquisition_start(const struct sr_dev_inst *sdi,
541 struct dev_context *devc;
542 uint32_t samplecount, readcount, delaycount;
543 uint8_t pols_changrp_mask, arg[4];
545 int num_pols_changrp, samplespercount;
548 if (sdi->status != SR_ST_ACTIVE)
549 return SR_ERR_DEV_CLOSED;
553 pols_channel_mask(sdi);
556 * Enable/disable channel groups in the flag register according to the
557 * channel mask. Calculate this here, because num_pols_changrp is
558 * needed to limit readcount.
560 pols_changrp_mask = 0;
561 num_pols_changrp = 0;
562 for (i = 0; i < 4; i++) {
563 if (devc->channel_mask & (0xff << (i * 8))) {
564 pols_changrp_mask |= (1 << i);
568 /* 3 channel groups takes as many bytes as 4 channel groups */
569 if (num_pols_changrp == 3)
570 num_pols_changrp = 4;
571 /* maximum number of samples (or RLE counts) the buffer memory can hold */
572 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
575 * Limit readcount to prevent reading past the end of the hardware
578 sr_dbg("max_samples = %d", devc->max_samples);
579 sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
580 samplecount = MIN(devc->max_samples, devc->limit_samples);
581 sr_dbg("Samplecount = %d", samplecount);
583 /* In demux mode the OLS is processing two samples per clock */
584 if (devc->flag_reg & FLAG_DEMUX) {
591 readcount = samplecount / samplespercount;
593 /* Rather read too many samples than too few. */
594 if (samplecount % samplespercount != 0)
597 /* Basic triggers. */
598 if (pols_convert_trigger(sdi) != SR_OK) {
599 sr_err("Failed to configure channels.");
603 if (devc->num_stages > 0) {
604 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
605 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
606 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
607 if (i <= devc->num_stages) {
608 sr_dbg("Setting p-ols stage %d trigger.", i);
609 if ((ret = set_trigger(sdi, i)) != SR_OK)
613 sr_dbg("Disabling p-ols stage %d trigger.", i);
614 if ((ret = disable_trigger(sdi, i)) != SR_OK)
619 /* No triggers configured, force trigger on first stage. */
620 sr_dbg("Forcing trigger at stage 0.");
621 if ((ret = set_trigger(sdi, 0)) != SR_OK)
623 delaycount = readcount;
627 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
628 devc->cur_samplerate, devc->cur_samplerate_divider);
629 arg[0] = devc->cur_samplerate_divider & 0xff;
630 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
631 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
633 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
636 /* Send extended sample limit and pre/post-trigger capture ratio. */
637 arg[0] = ((readcount - 1) & 0xff);
638 arg[1] = ((readcount - 1) & 0xff00) >> 8;
639 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
640 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
641 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
643 arg[0] = ((delaycount - 1) & 0xff);
644 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
645 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
646 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
647 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
651 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
652 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
653 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
654 devc->flag_reg & FLAG_RLE ? "on" : "off",
655 devc->flag_reg & FLAG_FILTER ? "on": "off",
656 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
659 * Enable/disable OLS channel groups in the flag register according
660 * to the channel mask. 1 means "disable channel".
662 devc->flag_reg &= ~0x3c;
663 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
664 sr_dbg("flag_reg = %x", devc->flag_reg);
667 * In demux mode the OLS is processing two 8-bit or 16-bit samples
668 * in parallel and for this to work the lower two bits of the four
669 * "channel_disable" bits must be replicated to the upper two bits.
671 flag_tmp = devc->flag_reg;
672 if (devc->flag_reg & FLAG_DEMUX) {
674 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
676 arg[0] = flag_tmp & 0xff;
677 arg[1] = flag_tmp >> 8;
678 arg[2] = arg[3] = 0x00;
679 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
682 /* Start acquisition on the device. */
683 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
686 /* Reset all operational states. */
687 devc->rle_count = devc->num_transfers = 0;
688 devc->num_samples = devc->num_bytes = 0;
689 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
690 memset(devc->sample, 0, 4);
692 /* Send header packet to the session bus. */
693 std_session_send_df_header(cb_data, LOG_PREFIX);
695 /* Hook up a dummy handler to receive data from the device. */
696 sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
702 static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
704 struct dev_context *devc;
705 struct sr_datafeed_packet packet;
709 sr_dbg("Stopping acquisition.");
710 write_shortcommand(devc, CMD_RESET);
711 write_shortcommand(devc, CMD_RESET);
712 write_shortcommand(devc, CMD_RESET);
713 write_shortcommand(devc, CMD_RESET);
714 write_shortcommand(devc, CMD_RESET);
716 sr_session_source_remove(sdi->session, -1);
718 /* Send end packet to the session bus. */
719 sr_dbg("Sending SR_DF_END.");
720 packet.type = SR_DF_END;
721 sr_session_send(cb_data, &packet);
726 SR_PRIV struct sr_dev_driver p_ols_driver_info = {
728 .longname = "Pipistrello OLS",
733 .dev_list = dev_list,
734 .dev_clear = dev_clear,
735 .config_get = config_get,
736 .config_set = config_set,
737 .config_list = config_list,
738 .dev_open = dev_open,
739 .dev_close = dev_close,
740 .dev_acquisition_start = dev_acquisition_start,
741 .dev_acquisition_stop = dev_acquisition_stop,