2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 #include <glib/gstdio.h>
27 #define DS_CMD_GET_FW_VERSION 0xb0
28 #define DS_CMD_GET_REVID_VERSION 0xb1
29 #define DS_CMD_START 0xb2
30 #define DS_CMD_CONFIG 0xb3
31 #define DS_CMD_SETTING 0xb4
32 #define DS_CMD_CONTROL 0xb5
33 #define DS_CMD_STATUS 0xb6
34 #define DS_CMD_STATUS_INFO 0xb7
35 #define DS_CMD_WR_REG 0xb8
36 #define DS_CMD_WR_NVM 0xb9
37 #define DS_CMD_RD_NVM 0xba
38 #define DS_CMD_RD_NVM_PRE 0xbb
39 #define DS_CMD_GET_HW_INFO 0xbc
41 #define DS_START_FLAGS_STOP (1 << 7)
42 #define DS_START_FLAGS_CLK_48MHZ (1 << 6)
43 #define DS_START_FLAGS_SAMPLE_WIDE (1 << 5)
44 #define DS_START_FLAGS_MODE_LA (1 << 4)
46 #define DS_ADDR_COMB 0x68
47 #define DS_ADDR_EEWP 0x70
48 #define DS_ADDR_VTH 0x78
50 #define DS_MAX_LOGIC_DEPTH SR_MHZ(16)
51 #define DS_MAX_LOGIC_SAMPLERATE SR_MHZ(100)
52 #define DS_MAX_TRIG_PERCENT 90
54 #define DS_MODE_TRIG_EN (1 << 0)
55 #define DS_MODE_CLK_TYPE (1 << 1)
56 #define DS_MODE_CLK_EDGE (1 << 2)
57 #define DS_MODE_RLE_MODE (1 << 3)
58 #define DS_MODE_DSO_MODE (1 << 4)
59 #define DS_MODE_HALF_MODE (1 << 5)
60 #define DS_MODE_QUAR_MODE (1 << 6)
61 #define DS_MODE_ANALOG_MODE (1 << 7)
62 #define DS_MODE_FILTER (1 << 8)
63 #define DS_MODE_INSTANT (1 << 9)
64 #define DS_MODE_STRIG_MODE (1 << 11)
65 #define DS_MODE_STREAM_MODE (1 << 12)
66 #define DS_MODE_LPB_TEST (1 << 13)
67 #define DS_MODE_EXT_TEST (1 << 14)
68 #define DS_MODE_INT_TEST (1 << 15)
70 #define DSLOGIC_ATOMIC_SAMPLES (sizeof(uint64_t) * 8)
71 #define DSLOGIC_ATOMIC_BYTES sizeof(uint64_t)
74 * The FPGA is configured with TLV tuples. Length is specified as the
75 * number of 16-bit words.
77 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
78 #define DS_CFG_START 0xf5a5f5a5
79 #define DS_CFG_MODE _DS_CFG(0, 1)
80 #define DS_CFG_DIVIDER _DS_CFG(1, 2)
81 #define DS_CFG_COUNT _DS_CFG(3, 2)
82 #define DS_CFG_TRIG_POS _DS_CFG(5, 2)
83 #define DS_CFG_TRIG_GLB _DS_CFG(7, 1)
84 #define DS_CFG_CH_EN _DS_CFG(8, 1)
85 #define DS_CFG_TRIG _DS_CFG(64, 160)
86 #define DS_CFG_END 0xfa5afa5a
95 struct cmd_start_acquisition {
97 uint8_t sample_delay_h;
98 uint8_t sample_delay_l;
104 uint16_t mode_header;
106 uint16_t divider_header;
108 uint16_t count_header;
110 uint16_t trig_pos_header;
112 uint16_t trig_glb_header;
114 uint16_t ch_en_header;
117 uint16_t trig_header;
118 uint16_t trig_mask0[NUM_TRIGGER_STAGES];
119 uint16_t trig_mask1[NUM_TRIGGER_STAGES];
120 uint16_t trig_value0[NUM_TRIGGER_STAGES];
121 uint16_t trig_value1[NUM_TRIGGER_STAGES];
122 uint16_t trig_edge0[NUM_TRIGGER_STAGES];
123 uint16_t trig_edge1[NUM_TRIGGER_STAGES];
124 uint16_t trig_logic0[NUM_TRIGGER_STAGES];
125 uint16_t trig_logic1[NUM_TRIGGER_STAGES];
126 uint32_t trig_count[NUM_TRIGGER_STAGES];
134 * This should be larger than the FPGA bitstream image so that it'll get
135 * uploaded in one big operation. There seem to be issues when uploading
138 #define FW_BUFSIZE (1024 * 1024)
140 #define FPGA_UPLOAD_DELAY (10 * 1000)
142 #define USB_TIMEOUT (3 * 1000)
144 static int command_get_fw_version(libusb_device_handle *devhdl,
145 struct version_info *vi)
149 ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
150 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
151 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
154 sr_err("Unable to get version info: %s.",
155 libusb_error_name(ret));
162 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
164 struct sr_usb_dev_inst *usb = sdi->conn;
165 libusb_device_handle *devhdl = usb->devhdl;
168 ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
169 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
170 revid, 1, USB_TIMEOUT);
173 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
180 static int command_start_acquisition(const struct sr_dev_inst *sdi)
182 struct sr_usb_dev_inst *usb;
183 struct dslogic_mode mode;
186 mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
187 mode.sample_delay_h = mode.sample_delay_l = 0;
190 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
191 LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
192 (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
194 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
201 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
203 struct sr_usb_dev_inst *usb;
204 struct dslogic_mode mode;
207 mode.flags = DS_START_FLAGS_STOP;
208 mode.sample_delay_h = mode.sample_delay_l = 0;
211 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
212 LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
213 (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
215 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
222 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
224 const char *name = NULL;
226 struct sr_resource bitstream;
227 struct drv_context *drvc;
228 struct dev_context *devc;
229 struct sr_usb_dev_inst *usb;
234 const uint8_t cmd[3] = {0, 0, 0};
236 drvc = sdi->driver->context;
240 if (!strcmp(devc->profile->model, "DSLogic")) {
241 if (devc->cur_threshold < 1.40)
242 name = DSLOGIC_FPGA_FIRMWARE_3V3;
244 name = DSLOGIC_FPGA_FIRMWARE_5V;
245 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
246 name = DSLOGIC_PRO_FPGA_FIRMWARE;
247 } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
248 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
249 } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
250 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
251 } else if (!strcmp(devc->profile->model, "DSCope")) {
252 name = DSCOPE_FPGA_FIRMWARE;
254 sr_err("Failed to select FPGA firmware.");
258 sr_dbg("Uploading FPGA firmware '%s'.", name);
260 result = sr_resource_open(drvc->sr_ctx, &bitstream,
261 SR_RESOURCE_FIRMWARE, name);
265 /* Tell the device firmware is coming. */
266 if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
267 LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
268 (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
269 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
270 sr_resource_close(drvc->sr_ctx, &bitstream);
274 /* Give the FX2 time to get ready for FPGA firmware upload. */
275 g_usleep(FPGA_UPLOAD_DELAY);
277 buf = g_malloc(FW_BUFSIZE);
281 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
288 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
289 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
290 sr_err("Unable to configure FPGA firmware: %s.",
291 libusb_error_name(ret));
296 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
297 sum, bitstream.size);
299 if (transferred != chunksize) {
300 sr_err("Short transfer while uploading FPGA firmware.");
306 sr_resource_close(drvc->sr_ctx, &bitstream);
309 sr_dbg("FPGA firmware upload done.");
314 static unsigned int enabled_channel_count(const struct sr_dev_inst *sdi)
316 unsigned int count = 0;
317 for (const GSList *l = sdi->channels; l; l = l->next) {
318 const struct sr_channel *const probe = (struct sr_channel *)l->data;
325 static uint16_t enabled_channel_mask(const struct sr_dev_inst *sdi)
327 unsigned int mask = 0;
328 for (const GSList *l = sdi->channels; l; l = l->next) {
329 const struct sr_channel *const probe = (struct sr_channel *)l->data;
331 mask |= 1 << probe->index;
337 * Get the session trigger and configure the FPGA structure
340 static void set_trigger(const struct sr_dev_inst *sdi, struct fpga_config *cfg)
342 struct sr_trigger *trigger;
343 struct sr_trigger_stage *stage;
344 struct sr_trigger_match *match;
345 struct dev_context *devc;
347 const unsigned int num_enabled_channels = enabled_channel_count(sdi);
348 int num_trigger_stages = 0;
350 int channelbit, i = 0;
351 uint32_t trigger_point;
355 cfg->ch_en = enabled_channel_mask(sdi);
357 cfg->trig_mask0[0] = 0xffff;
358 cfg->trig_mask1[0] = 0xffff;
360 cfg->trig_value0[0] = 0;
361 cfg->trig_value1[0] = 0;
363 cfg->trig_edge0[0] = 0;
364 cfg->trig_edge1[0] = 0;
366 cfg->trig_logic0[0] = 2;
367 cfg->trig_logic1[0] = 2;
369 cfg->trig_count[0] = 0;
371 cfg->trig_glb = num_enabled_channels << 4;
373 for (i = 1; i < NUM_TRIGGER_STAGES; i++) {
374 cfg->trig_mask0[i] = 0xffff;
375 cfg->trig_mask1[i] = 0xffff;
376 cfg->trig_value0[i] = 0;
377 cfg->trig_value1[i] = 0;
378 cfg->trig_edge0[i] = 0;
379 cfg->trig_edge1[i] = 0;
380 cfg->trig_logic0[i] = 2;
381 cfg->trig_logic1[i] = 2;
382 cfg->trig_count[i] = 0;
385 trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
386 if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
387 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
388 const uint32_t mem_depth = devc->profile->mem_depth;
389 const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
390 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
391 if (trigger_point > max_trigger_point)
392 trigger_point = max_trigger_point;
393 cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
395 if (!(trigger = sr_session_trigger_get(sdi->session))) {
396 sr_dbg("No session trigger found");
400 for (l = trigger->stages; l; l = l->next) {
402 num_trigger_stages++;
403 for (m = stage->matches; m; m = m->next) {
405 if (!match->channel->enabled)
406 /* Ignore disabled channels with a trigger. */
408 channelbit = 1 << (match->channel->index);
409 /* Simple trigger support (event). */
410 if (match->match == SR_TRIGGER_ONE) {
411 cfg->trig_mask0[0] &= ~channelbit;
412 cfg->trig_mask1[0] &= ~channelbit;
413 cfg->trig_value0[0] |= channelbit;
414 cfg->trig_value1[0] |= channelbit;
415 } else if (match->match == SR_TRIGGER_ZERO) {
416 cfg->trig_mask0[0] &= ~channelbit;
417 cfg->trig_mask1[0] &= ~channelbit;
418 } else if (match->match == SR_TRIGGER_FALLING) {
419 cfg->trig_mask0[0] &= ~channelbit;
420 cfg->trig_mask1[0] &= ~channelbit;
421 cfg->trig_edge0[0] |= channelbit;
422 cfg->trig_edge1[0] |= channelbit;
423 } else if (match->match == SR_TRIGGER_RISING) {
424 cfg->trig_mask0[0] &= ~channelbit;
425 cfg->trig_mask1[0] &= ~channelbit;
426 cfg->trig_value0[0] |= channelbit;
427 cfg->trig_value1[0] |= channelbit;
428 cfg->trig_edge0[0] |= channelbit;
429 cfg->trig_edge1[0] |= channelbit;
430 } else if (match->match == SR_TRIGGER_EDGE) {
431 cfg->trig_edge0[0] |= channelbit;
432 cfg->trig_edge1[0] |= channelbit;
437 cfg->trig_glb |= num_trigger_stages;
440 static int fpga_configure(const struct sr_dev_inst *sdi)
442 struct dev_context *devc;
443 struct sr_usb_dev_inst *usb;
445 struct fpga_config cfg;
448 int transferred, len, ret;
450 sr_dbg("Configuring FPGA.");
455 WL32(&cfg.sync, DS_CFG_START);
456 WL16(&cfg.mode_header, DS_CFG_MODE);
457 WL16(&cfg.divider_header, DS_CFG_DIVIDER);
458 WL16(&cfg.count_header, DS_CFG_COUNT);
459 WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
460 WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
461 WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
462 WL16(&cfg.trig_header, DS_CFG_TRIG);
463 WL32(&cfg.end_sync, DS_CFG_END);
465 /* Pass in the length of a fixed-size struct. Really. */
466 len = sizeof(struct fpga_config) / 2;
468 c[1] = (len >> 8) & 0xff;
469 c[2] = (len >> 16) & 0xff;
471 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
472 LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
473 c, sizeof(c), USB_TIMEOUT);
475 sr_err("Failed to send FPGA configure command: %s.",
476 libusb_error_name(ret));
482 if (devc->mode == DS_OP_INTERNAL_TEST)
483 v16 = DS_MODE_INT_TEST;
484 else if (devc->mode == DS_OP_EXTERNAL_TEST)
485 v16 = DS_MODE_EXT_TEST;
486 else if (devc->mode == DS_OP_LOOPBACK_TEST)
487 v16 = DS_MODE_LPB_TEST;
489 if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
490 v16 |= DS_MODE_HALF_MODE;
491 else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
492 v16 |= DS_MODE_QUAR_MODE;
494 if (devc->continuous_mode)
495 v16 |= DS_MODE_STREAM_MODE;
496 if (devc->external_clock) {
497 v16 |= DS_MODE_CLK_TYPE;
498 if (devc->clock_edge == DS_EDGE_FALLING)
499 v16 |= DS_MODE_CLK_EDGE;
501 if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
502 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
503 && !devc->continuous_mode) {
504 /* Enable RLE for long captures.
505 * Without this, captured data present errors.
507 v16 |= DS_MODE_RLE_MODE;
510 WL16(&cfg.mode, v16);
511 v32 = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
512 WL32(&cfg.divider, v32);
514 /* Number of 16-sample units. */
515 WL32(&cfg.count, devc->limit_samples / 16);
517 set_trigger(sdi, &cfg);
519 len = sizeof(struct fpga_config);
520 ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
521 (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
522 if (ret < 0 || transferred != len) {
523 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
530 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
533 struct dev_context *const devc = sdi->priv;
534 const struct sr_usb_dev_inst *const usb = sdi->conn;
535 const uint8_t value = (threshold / 5.0) * 255;
536 const uint16_t cmd = value | (DS_ADDR_VTH << 8);
538 /* Send the control command. */
539 ret = libusb_control_transfer(usb->devhdl,
540 LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
541 DS_CMD_WR_REG, 0x0000, 0x0000,
542 (unsigned char *)&cmd, sizeof(cmd), 3000);
544 sr_err("Unable to set voltage-threshold register: %s.",
545 libusb_error_name(ret));
549 devc->cur_threshold = threshold;
554 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
556 libusb_device **devlist;
557 struct sr_usb_dev_inst *usb;
558 struct libusb_device_descriptor des;
559 struct dev_context *devc;
560 struct drv_context *drvc;
561 struct version_info vi;
562 int ret = SR_ERR, i, device_count;
564 char connection_id[64];
570 device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
571 if (device_count < 0) {
572 sr_err("Failed to get device list: %s.",
573 libusb_error_name(device_count));
577 for (i = 0; i < device_count; i++) {
578 libusb_get_device_descriptor(devlist[i], &des);
580 if (des.idVendor != devc->profile->vid
581 || des.idProduct != devc->profile->pid)
584 if ((sdi->status == SR_ST_INITIALIZING) ||
585 (sdi->status == SR_ST_INACTIVE)) {
586 /* Check device by its physical USB bus/port address. */
587 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
588 if (strcmp(sdi->connection_id, connection_id))
589 /* This is not the one. */
593 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
594 if (usb->address == 0xff)
596 * First time we touch this device after FW
597 * upload, so we don't know the address yet.
599 usb->address = libusb_get_device_address(devlist[i]);
601 sr_err("Failed to open device: %s.",
602 libusb_error_name(ret));
607 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
608 if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
609 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
610 sr_err("Failed to detach kernel driver: %s.",
611 libusb_error_name(ret));
618 ret = command_get_fw_version(usb->devhdl, &vi);
620 sr_err("Failed to get firmware version.");
624 ret = command_get_revid_version(sdi, &revid);
626 sr_err("Failed to get REVID.");
631 * Changes in major version mean incompatible/API changes, so
632 * bail out if we encounter an incompatible version.
633 * Different minor versions are OK, they should be compatible.
635 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
636 sr_err("Expected firmware version %d.x, "
637 "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
643 sr_info("Opened device on %d.%d (logical) / %s (physical), "
644 "interface %d, firmware %d.%d.",
645 usb->bus, usb->address, connection_id,
646 USB_INTERFACE, vi.major, vi.minor);
648 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
649 revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
656 libusb_free_device_list(devlist, 1);
661 SR_PRIV struct dev_context *dslogic_dev_new(void)
663 struct dev_context *devc;
665 devc = g_malloc0(sizeof(struct dev_context));
666 devc->profile = NULL;
667 devc->fw_updated = 0;
668 devc->cur_samplerate = 0;
669 devc->limit_samples = 0;
670 devc->capture_ratio = 0;
671 devc->continuous_mode = FALSE;
672 devc->clock_edge = DS_EDGE_RISING;
677 static void abort_acquisition(struct dev_context *devc)
681 devc->acq_aborted = TRUE;
683 for (i = devc->num_transfers - 1; i >= 0; i--) {
684 if (devc->transfers[i])
685 libusb_cancel_transfer(devc->transfers[i]);
689 static void finish_acquisition(struct sr_dev_inst *sdi)
691 struct dev_context *devc;
695 std_session_send_df_end(sdi);
697 usb_source_remove(sdi->session, devc->ctx);
699 devc->num_transfers = 0;
700 g_free(devc->transfers);
701 g_free(devc->deinterleave_buffer);
704 static void free_transfer(struct libusb_transfer *transfer)
706 struct sr_dev_inst *sdi;
707 struct dev_context *devc;
710 sdi = transfer->user_data;
713 g_free(transfer->buffer);
714 transfer->buffer = NULL;
715 libusb_free_transfer(transfer);
717 for (i = 0; i < devc->num_transfers; i++) {
718 if (devc->transfers[i] == transfer) {
719 devc->transfers[i] = NULL;
724 devc->submitted_transfers--;
725 if (devc->submitted_transfers == 0)
726 finish_acquisition(sdi);
729 static void resubmit_transfer(struct libusb_transfer *transfer)
733 if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
736 sr_err("%s: %s", __func__, libusb_error_name(ret));
737 free_transfer(transfer);
741 static void deinterleave_buffer(const uint8_t *src, size_t length,
742 uint16_t *dst_ptr, size_t channel_count, uint16_t channel_mask)
746 for (const uint64_t *src_ptr = (uint64_t*)src;
747 src_ptr < (uint64_t*)(src + length);
748 src_ptr += channel_count) {
749 for (int bit = 0; bit != 64; bit++) {
750 const uint64_t *word_ptr = src_ptr;
752 for (size_t channel = 0; channel != channel_count;
754 if ((channel_mask & (1 << channel)) &&
755 (*word_ptr++ & (1ULL << bit)))
756 sample |= 1 << channel;
763 static void send_data(struct sr_dev_inst *sdi,
764 uint16_t *data, size_t sample_count)
766 const struct sr_datafeed_logic logic = {
767 .length = sample_count * sizeof(uint16_t),
768 .unitsize = sizeof(uint16_t),
772 const struct sr_datafeed_packet packet = {
777 sr_session_send(sdi, &packet);
780 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
782 struct sr_dev_inst *const sdi = transfer->user_data;
783 struct dev_context *const devc = sdi->priv;
784 const size_t channel_count = enabled_channel_count(sdi);
785 const uint16_t channel_mask = enabled_channel_mask(sdi);
786 const unsigned int cur_sample_count = DSLOGIC_ATOMIC_SAMPLES *
787 transfer->actual_length /
788 (DSLOGIC_ATOMIC_BYTES * channel_count);
790 gboolean packet_has_error = FALSE;
791 struct sr_datafeed_packet packet;
792 unsigned int num_samples;
796 * If acquisition has already ended, just free any queued up
797 * transfer that come in.
799 if (devc->acq_aborted) {
800 free_transfer(transfer);
804 sr_dbg("receive_transfer(): status %s received %d bytes.",
805 libusb_error_name(transfer->status), transfer->actual_length);
807 /* Save incoming transfer before reusing the transfer struct. */
809 switch (transfer->status) {
810 case LIBUSB_TRANSFER_NO_DEVICE:
811 abort_acquisition(devc);
812 free_transfer(transfer);
814 case LIBUSB_TRANSFER_COMPLETED:
815 case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
818 packet_has_error = TRUE;
822 if (transfer->actual_length == 0 || packet_has_error) {
823 devc->empty_transfer_count++;
824 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
826 * The FX2 gave up. End the acquisition, the frontend
827 * will work out that the samplecount is short.
829 abort_acquisition(devc);
830 free_transfer(transfer);
832 resubmit_transfer(transfer);
836 devc->empty_transfer_count = 0;
839 if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
840 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
841 num_samples = devc->limit_samples - devc->sent_samples;
843 num_samples = cur_sample_count;
846 * The DSLogic emits sample data as sequences of 64-bit sample words
847 * in a round-robin i.e. 64-bits from channel 0, 64-bits from channel 1
848 * etc. for each of the enabled channels, then looping back to the
851 * Because sigrok's internal representation is bit-interleaved channels
852 * we must recast the data.
854 * Hopefully in future it will be possible to pass the data on as-is.
856 if (transfer->actual_length % (DSLOGIC_ATOMIC_BYTES * channel_count) != 0)
857 sr_err("Invalid transfer length!");
858 deinterleave_buffer(transfer->buffer, transfer->actual_length,
859 devc->deinterleave_buffer, channel_count, channel_mask);
861 /* Send the incoming transfer to the session bus. */
862 if (devc->trigger_pos > devc->sent_samples
863 && devc->trigger_pos <= devc->sent_samples + num_samples) {
864 /* DSLogic trigger in this block. Send trigger position. */
865 trigger_offset = devc->trigger_pos - devc->sent_samples;
866 /* Pre-trigger samples. */
867 send_data(sdi, devc->deinterleave_buffer, trigger_offset);
868 devc->sent_samples += trigger_offset;
869 /* Trigger position. */
870 devc->trigger_pos = 0;
871 packet.type = SR_DF_TRIGGER;
872 packet.payload = NULL;
873 sr_session_send(sdi, &packet);
874 /* Post trigger samples. */
875 num_samples -= trigger_offset;
876 send_data(sdi, devc->deinterleave_buffer
877 + trigger_offset, num_samples);
878 devc->sent_samples += num_samples;
880 send_data(sdi, devc->deinterleave_buffer, num_samples);
881 devc->sent_samples += num_samples;
885 if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
886 abort_acquisition(devc);
887 free_transfer(transfer);
889 resubmit_transfer(transfer);
892 static int receive_data(int fd, int revents, void *cb_data)
895 struct drv_context *drvc;
900 drvc = (struct drv_context *)cb_data;
902 tv.tv_sec = tv.tv_usec = 0;
903 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
908 static size_t to_bytes_per_ms(const struct sr_dev_inst *sdi)
910 const struct dev_context *const devc = sdi->priv;
911 const size_t ch_count = enabled_channel_count(sdi);
913 if (devc->continuous_mode)
914 return (devc->cur_samplerate * ch_count) / (1000 * 8);
917 /* If we're in buffered mode, the transfer rate is not so important,
918 * but we expect to get at least 10% of the high-speed USB bandwidth.
920 return 35000000 / (1000 * 10);
923 static size_t get_buffer_size(const struct sr_dev_inst *sdi)
926 * The buffer should be large enough to hold 10ms of data and
927 * a multiple of the size of a data atom.
929 const size_t block_size = enabled_channel_count(sdi) * 512;
930 const size_t s = 10 * to_bytes_per_ms(sdi);
931 return ((s + block_size - 1) / block_size) * block_size;
934 static unsigned int get_number_of_transfers(const struct sr_dev_inst *sdi)
936 /* Total buffer size should be able to hold about 100ms of data. */
937 const unsigned int s = get_buffer_size(sdi);
938 const unsigned int n = (100 * to_bytes_per_ms(sdi) + s - 1) / s;
939 return (n > NUM_SIMUL_TRANSFERS) ? NUM_SIMUL_TRANSFERS : n;
942 static unsigned int get_timeout(const struct sr_dev_inst *sdi)
944 const size_t total_size = get_buffer_size(sdi) *
945 get_number_of_transfers(sdi);
946 const unsigned int timeout = total_size / to_bytes_per_ms(sdi);
947 return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
950 static int start_transfers(const struct sr_dev_inst *sdi)
952 const size_t channel_count = enabled_channel_count(sdi);
953 const size_t size = get_buffer_size(sdi);
954 const unsigned int num_transfers = get_number_of_transfers(sdi);
955 const unsigned int timeout = get_timeout(sdi);
957 struct dev_context *devc;
958 struct sr_usb_dev_inst *usb;
959 struct libusb_transfer *transfer;
967 devc->sent_samples = 0;
968 devc->acq_aborted = FALSE;
969 devc->empty_transfer_count = 0;
970 devc->submitted_transfers = 0;
972 g_free(devc->transfers);
973 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
974 if (!devc->transfers) {
975 sr_err("USB transfers malloc failed.");
976 return SR_ERR_MALLOC;
979 devc->deinterleave_buffer = g_try_malloc(DSLOGIC_ATOMIC_SAMPLES *
980 (size / (channel_count * DSLOGIC_ATOMIC_BYTES)) * sizeof(uint16_t));
981 if (!devc->deinterleave_buffer) {
982 sr_err("Deinterleave buffer malloc failed.");
983 g_free(devc->deinterleave_buffer);
984 return SR_ERR_MALLOC;
987 devc->num_transfers = num_transfers;
988 for (i = 0; i < num_transfers; i++) {
989 if (!(buf = g_try_malloc(size))) {
990 sr_err("USB transfer buffer malloc failed.");
991 return SR_ERR_MALLOC;
993 transfer = libusb_alloc_transfer(0);
994 libusb_fill_bulk_transfer(transfer, usb->devhdl,
995 6 | LIBUSB_ENDPOINT_IN, buf, size,
996 receive_transfer, (void *)sdi, timeout);
997 sr_info("submitting transfer: %d", i);
998 if ((ret = libusb_submit_transfer(transfer)) != 0) {
999 sr_err("Failed to submit transfer: %s.",
1000 libusb_error_name(ret));
1001 libusb_free_transfer(transfer);
1003 abort_acquisition(devc);
1006 devc->transfers[i] = transfer;
1007 devc->submitted_transfers++;
1010 std_session_send_df_header(sdi);
1015 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
1017 const struct sr_dev_inst *sdi;
1018 struct dslogic_trigger_pos *tpos;
1019 struct dev_context *devc;
1021 sdi = transfer->user_data;
1023 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
1024 sr_dbg("Trigger transfer canceled.");
1025 /* Terminate session. */
1026 std_session_send_df_end(sdi);
1027 usb_source_remove(sdi->session, devc->ctx);
1028 devc->num_transfers = 0;
1029 g_free(devc->transfers);
1030 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
1031 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
1032 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
1033 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
1034 tpos->ram_saddr, tpos->remain_cnt);
1035 devc->trigger_pos = tpos->real_pos;
1037 start_transfers(sdi);
1039 libusb_free_transfer(transfer);
1042 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1044 const unsigned int timeout = get_timeout(sdi);
1046 struct sr_dev_driver *di;
1047 struct drv_context *drvc;
1048 struct dev_context *devc;
1049 struct sr_usb_dev_inst *usb;
1050 struct dslogic_trigger_pos *tpos;
1051 struct libusb_transfer *transfer;
1059 devc->ctx = drvc->sr_ctx;
1060 devc->sent_samples = 0;
1061 devc->empty_transfer_count = 0;
1062 devc->acq_aborted = FALSE;
1064 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1066 if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1069 if ((ret = fpga_configure(sdi)) != SR_OK)
1072 if ((ret = command_start_acquisition(sdi)) != SR_OK)
1075 sr_dbg("Getting trigger.");
1076 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1077 transfer = libusb_alloc_transfer(0);
1078 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1079 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1080 trigger_receive, (void *)sdi, 0);
1081 if ((ret = libusb_submit_transfer(transfer)) < 0) {
1082 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1083 libusb_free_transfer(transfer);
1088 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1089 if (!devc->transfers) {
1090 sr_err("USB trigger_pos transfer malloc failed.");
1091 return SR_ERR_MALLOC;
1093 devc->num_transfers = 1;
1094 devc->submitted_transfers++;
1095 devc->transfers[0] = transfer;
1100 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1102 command_stop_acquisition(sdi);
1103 abort_acquisition(sdi->priv);