2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA/SIGMA2 logic analyzer driver
30 * Channel numbers seem to go from 1-16, according to this image:
31 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
32 * (the cable has two additional GND pins, and a TI and TO pin)
34 static const char *channel_names[] = {
35 "1", "2", "3", "4", "5", "6", "7", "8",
36 "9", "10", "11", "12", "13", "14", "15", "16",
39 static const uint32_t drvopts[] = {
40 SR_CONF_LOGIC_ANALYZER,
43 static const uint32_t devopts[] = {
44 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
45 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47 #if ASIX_SIGMA_WITH_TRIGGER
48 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
49 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
53 #if ASIX_SIGMA_WITH_TRIGGER
54 static const int32_t trigger_matches[] = {
62 static int dev_clear(const struct sr_dev_driver *di)
64 return std_dev_clear(di, sigma_clear_helper);
67 static GSList *scan(struct sr_dev_driver *di, GSList *options)
69 struct sr_dev_inst *sdi;
70 struct dev_context *devc;
71 struct ftdi_device_list *devlist;
79 devc = g_malloc0(sizeof(struct dev_context));
81 ftdi_init(&devc->ftdic);
83 /* Look for SIGMAs. */
85 if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
86 USB_VENDOR, USB_PRODUCT)) <= 0) {
88 sr_err("ftdi_usb_find_all(): %d", ret);
92 /* Make sure it's a version 1 or 2 SIGMA. */
93 ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
94 serial_txt, sizeof(serial_txt));
95 sscanf(serial_txt, "%x", &serial);
97 if (serial < 0xa6010000 || serial > 0xa602ffff) {
98 sr_err("Only SIGMA and SIGMA2 are supported "
99 "in this version of libsigrok.");
103 sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
105 devc->cur_samplerate = samplerates[0];
106 devc->limit_msec = 0;
107 devc->limit_samples = 0;
108 devc->cur_firmware = -1;
109 devc->num_channels = 0;
110 devc->samples_per_event = 0;
111 devc->capture_ratio = 50;
112 devc->use_triggers = 0;
114 /* Register SIGMA device. */
115 sdi = g_malloc0(sizeof(struct sr_dev_inst));
116 sdi->status = SR_ST_INITIALIZING;
117 sdi->vendor = g_strdup(USB_VENDOR_NAME);
118 sdi->model = g_strdup(USB_MODEL_NAME);
120 for (i = 0; i < ARRAY_SIZE(channel_names); i++)
121 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
125 /* We will open the device again when we need it. */
126 ftdi_list_free(&devlist);
128 return std_scan_complete(di, g_slist_append(NULL, sdi));
131 ftdi_deinit(&devc->ftdic);
136 static int dev_open(struct sr_dev_inst *sdi)
138 struct dev_context *devc;
143 /* Make sure it's an ASIX SIGMA. */
144 if ((ret = ftdi_usb_open_desc(&devc->ftdic,
145 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
147 sr_err("ftdi_usb_open failed: %s",
148 ftdi_get_error_string(&devc->ftdic));
153 sdi->status = SR_ST_ACTIVE;
158 static int dev_close(struct sr_dev_inst *sdi)
160 struct dev_context *devc;
164 ftdi_usb_close(&devc->ftdic);
166 sdi->status = SR_ST_INACTIVE;
171 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
172 const struct sr_channel_group *cg)
174 struct dev_context *devc;
183 case SR_CONF_SAMPLERATE:
184 *data = g_variant_new_uint64(devc->cur_samplerate);
186 case SR_CONF_LIMIT_MSEC:
187 *data = g_variant_new_uint64(devc->limit_msec);
189 case SR_CONF_LIMIT_SAMPLES:
190 *data = g_variant_new_uint64(devc->limit_samples);
192 #if ASIX_SIGMA_WITH_TRIGGER
193 case SR_CONF_CAPTURE_RATIO:
194 *data = g_variant_new_uint64(devc->capture_ratio);
204 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
205 const struct sr_channel_group *cg)
207 struct dev_context *devc;
217 case SR_CONF_SAMPLERATE:
218 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
220 case SR_CONF_LIMIT_MSEC:
221 tmp = g_variant_get_uint64(data);
223 devc->limit_msec = g_variant_get_uint64(data);
227 case SR_CONF_LIMIT_SAMPLES:
228 tmp = g_variant_get_uint64(data);
229 devc->limit_samples = tmp;
230 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
232 #if ASIX_SIGMA_WITH_TRIGGER
233 case SR_CONF_CAPTURE_RATIO:
234 tmp = g_variant_get_uint64(data);
237 devc->capture_ratio = tmp;
247 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
248 const struct sr_channel_group *cg)
256 case SR_CONF_DEVICE_OPTIONS:
258 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
259 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
261 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
262 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
264 case SR_CONF_SAMPLERATE:
265 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
266 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
267 samplerates_count, sizeof(samplerates[0]));
268 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
269 *data = g_variant_builder_end(&gvb);
271 #if ASIX_SIGMA_WITH_TRIGGER
272 case SR_CONF_TRIGGER_MATCH:
273 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
274 trigger_matches, ARRAY_SIZE(trigger_matches),
285 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
287 struct dev_context *devc;
288 struct clockselect_50 clockselect;
290 uint8_t triggerselect;
291 struct triggerinout triggerinout_conf;
292 struct triggerlut lut;
294 uint8_t clock_bytes[sizeof(clockselect)];
299 if (sigma_convert_trigger(sdi) != SR_OK) {
300 sr_err("Failed to configure triggers.");
304 /* If the samplerate has not been set, default to 200 kHz. */
305 if (devc->cur_firmware == -1) {
306 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
310 /* Enter trigger programming mode. */
311 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
314 if (devc->cur_samplerate >= SR_MHZ(100)) {
315 /* 100 and 200 MHz mode. */
316 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
318 /* Find which pin to trigger on from mask. */
319 for (triggerpin = 0; triggerpin < 8; triggerpin++)
320 if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
324 /* Set trigger pin and light LED on trigger. */
325 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
327 /* Default rising edge. */
328 if (devc->trigger.fallingmask)
329 triggerselect |= 1 << 3;
331 } else if (devc->cur_samplerate <= SR_MHZ(50)) {
332 /* All other modes. */
333 sigma_build_basic_trigger(&lut, devc);
335 sigma_write_trigger_lut(&lut, devc);
337 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
340 /* Setup trigger in and out pins to default values. */
341 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
342 triggerinout_conf.trgout_bytrigger = 1;
343 triggerinout_conf.trgout_enable = 1;
345 sigma_write_register(WRITE_TRIGGER_OPTION,
346 (uint8_t *) &triggerinout_conf,
347 sizeof(struct triggerinout), devc);
349 /* Go back to normal mode. */
350 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
352 /* Set clock select register. */
353 clockselect.async = 0;
354 clockselect.fraction = 1 - 1; /* Divider 1. */
355 clockselect.disabled_channels = 0x0000; /* All channels enabled. */
356 if (devc->cur_samplerate == SR_MHZ(200)) {
357 /* Enable 4 channels. */
358 clockselect.disabled_channels = 0xf0ff;
359 } else if (devc->cur_samplerate == SR_MHZ(100)) {
360 /* Enable 8 channels. */
361 clockselect.disabled_channels = 0x00ff;
364 * 50 MHz mode, or fraction thereof. The 50MHz reference
365 * can get divided by any integer in the range 1 to 256.
366 * Divider minus 1 gets written to the hardware.
367 * (The driver lists a discrete set of sample rates, but
368 * all of them fit the above description.)
370 clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
373 clock_bytes[clock_idx++] = clockselect.async;
374 clock_bytes[clock_idx++] = clockselect.fraction;
375 clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
376 clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
377 sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
379 /* Setup maximum post trigger time. */
380 sigma_set_register(WRITE_POST_TRIGGER,
381 (devc->capture_ratio * 255) / 100, devc);
383 /* Start acqusition. */
384 devc->start_time = g_get_monotonic_time();
385 regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
386 #if ASIX_SIGMA_WITH_TRIGGER
389 sigma_set_register(WRITE_MODE, regval, devc);
391 std_session_send_df_header(sdi);
393 /* Add capture source. */
394 sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
396 devc->state.state = SIGMA_CAPTURE;
401 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
403 struct dev_context *devc;
406 devc->state.state = SIGMA_IDLE;
408 sr_session_source_remove(sdi->session, -1);
413 static struct sr_dev_driver asix_sigma_driver_info = {
414 .name = "asix-sigma",
415 .longname = "ASIX SIGMA/SIGMA2",
418 .cleanup = std_cleanup,
420 .dev_list = std_dev_list,
421 .dev_clear = dev_clear,
422 .config_get = config_get,
423 .config_set = config_set,
424 .config_list = config_list,
425 .dev_open = dev_open,
426 .dev_close = dev_close,
427 .dev_acquisition_start = dev_acquisition_start,
428 .dev_acquisition_stop = dev_acquisition_stop,
431 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);