2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA/SIGMA2 logic analyzer driver
30 * Channel numbers seem to go from 1-16, according to this image:
31 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
32 * (the cable has two additional GND pins, and a TI and TO pin)
34 static const char *channel_names[] = {
35 "1", "2", "3", "4", "5", "6", "7", "8",
36 "9", "10", "11", "12", "13", "14", "15", "16",
39 static const uint32_t drvopts[] = {
40 SR_CONF_LOGIC_ANALYZER,
43 static const uint32_t devopts[] = {
44 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
45 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
48 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
51 static const int32_t trigger_matches[] = {
59 static int dev_clear(const struct sr_dev_driver *di)
61 return std_dev_clear(di, sigma_clear_helper);
64 static GSList *scan(struct sr_dev_driver *di, GSList *options)
66 struct sr_dev_inst *sdi;
67 struct dev_context *devc;
68 struct ftdi_device_list *devlist;
76 devc = g_malloc0(sizeof(struct dev_context));
78 ftdi_init(&devc->ftdic);
80 /* Look for SIGMAs. */
82 if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
83 USB_VENDOR, USB_PRODUCT)) <= 0) {
85 sr_err("ftdi_usb_find_all(): %d", ret);
89 /* Make sure it's a version 1 or 2 SIGMA. */
90 ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
91 serial_txt, sizeof(serial_txt));
92 sscanf(serial_txt, "%x", &serial);
94 if (serial < 0xa6010000 || serial > 0xa602ffff) {
95 sr_err("Only SIGMA and SIGMA2 are supported "
96 "in this version of libsigrok.");
100 sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
102 devc->cur_samplerate = samplerates[0];
104 devc->limit_msec = 0;
105 devc->limit_samples = 0;
106 devc->cur_firmware = -1;
107 devc->num_channels = 0;
108 devc->samples_per_event = 0;
109 devc->capture_ratio = 50;
110 devc->use_triggers = 0;
112 /* Register SIGMA device. */
113 sdi = g_malloc0(sizeof(struct sr_dev_inst));
114 sdi->status = SR_ST_INITIALIZING;
115 sdi->vendor = g_strdup(USB_VENDOR_NAME);
116 sdi->model = g_strdup(USB_MODEL_NAME);
118 for (i = 0; i < ARRAY_SIZE(channel_names); i++)
119 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
123 /* We will open the device again when we need it. */
124 ftdi_list_free(&devlist);
126 return std_scan_complete(di, g_slist_append(NULL, sdi));
129 ftdi_deinit(&devc->ftdic);
134 static int dev_open(struct sr_dev_inst *sdi)
136 struct dev_context *devc;
141 /* Make sure it's an ASIX SIGMA. */
142 if ((ret = ftdi_usb_open_desc(&devc->ftdic,
143 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
145 sr_err("ftdi_usb_open failed: %s",
146 ftdi_get_error_string(&devc->ftdic));
151 sdi->status = SR_ST_ACTIVE;
156 static int dev_close(struct sr_dev_inst *sdi)
158 struct dev_context *devc;
163 if (sdi->status == SR_ST_ACTIVE)
164 ftdi_usb_close(&devc->ftdic);
166 sdi->status = SR_ST_INACTIVE;
171 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
172 const struct sr_channel_group *cg)
174 struct dev_context *devc;
183 case SR_CONF_SAMPLERATE:
184 *data = g_variant_new_uint64(devc->cur_samplerate);
186 case SR_CONF_LIMIT_MSEC:
187 *data = g_variant_new_uint64(devc->limit_msec);
189 case SR_CONF_LIMIT_SAMPLES:
190 *data = g_variant_new_uint64(devc->limit_samples);
192 case SR_CONF_CAPTURE_RATIO:
193 *data = g_variant_new_uint64(devc->capture_ratio);
202 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
203 const struct sr_channel_group *cg)
205 struct dev_context *devc;
211 if (sdi->status != SR_ST_ACTIVE)
212 return SR_ERR_DEV_CLOSED;
218 case SR_CONF_SAMPLERATE:
219 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
221 case SR_CONF_LIMIT_MSEC:
222 tmp = g_variant_get_uint64(data);
224 devc->limit_msec = g_variant_get_uint64(data);
228 case SR_CONF_LIMIT_SAMPLES:
229 tmp = g_variant_get_uint64(data);
230 devc->limit_samples = tmp;
231 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
233 case SR_CONF_CAPTURE_RATIO:
234 tmp = g_variant_get_uint64(data);
236 devc->capture_ratio = tmp;
247 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
248 const struct sr_channel_group *cg)
256 case SR_CONF_DEVICE_OPTIONS:
258 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
259 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
261 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
262 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
264 case SR_CONF_SAMPLERATE:
265 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
266 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
267 samplerates_count, sizeof(samplerates[0]));
268 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
269 *data = g_variant_builder_end(&gvb);
271 case SR_CONF_TRIGGER_MATCH:
272 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
273 trigger_matches, ARRAY_SIZE(trigger_matches),
283 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
285 struct dev_context *devc;
286 struct clockselect_50 clockselect;
287 int frac, triggerpin, ret;
288 uint8_t triggerselect = 0;
289 struct triggerinout triggerinout_conf;
290 struct triggerlut lut;
292 if (sdi->status != SR_ST_ACTIVE)
293 return SR_ERR_DEV_CLOSED;
297 if (sigma_convert_trigger(sdi) != SR_OK) {
298 sr_err("Failed to configure triggers.");
302 /* If the samplerate has not been set, default to 200 kHz. */
303 if (devc->cur_firmware == -1) {
304 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
308 /* Enter trigger programming mode. */
309 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
311 /* 100 and 200 MHz mode. */
312 if (devc->cur_samplerate >= SR_MHZ(100)) {
313 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
315 /* Find which pin to trigger on from mask. */
316 for (triggerpin = 0; triggerpin < 8; triggerpin++)
317 if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
321 /* Set trigger pin and light LED on trigger. */
322 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
324 /* Default rising edge. */
325 if (devc->trigger.fallingmask)
326 triggerselect |= 1 << 3;
328 /* All other modes. */
329 } else if (devc->cur_samplerate <= SR_MHZ(50)) {
330 sigma_build_basic_trigger(&lut, devc);
332 sigma_write_trigger_lut(&lut, devc);
334 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
337 /* Setup trigger in and out pins to default values. */
338 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
339 triggerinout_conf.trgout_bytrigger = 1;
340 triggerinout_conf.trgout_enable = 1;
342 sigma_write_register(WRITE_TRIGGER_OPTION,
343 (uint8_t *) &triggerinout_conf,
344 sizeof(struct triggerinout), devc);
346 /* Go back to normal mode. */
347 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
349 /* Set clock select register. */
350 if (devc->cur_samplerate == SR_MHZ(200))
351 /* Enable 4 channels. */
352 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, devc);
353 else if (devc->cur_samplerate == SR_MHZ(100))
354 /* Enable 8 channels. */
355 sigma_set_register(WRITE_CLOCK_SELECT, 0x00, devc);
358 * 50 MHz mode (or fraction thereof). Any fraction down to
359 * 50 MHz / 256 can be used, but is not supported by sigrok API.
361 frac = SR_MHZ(50) / devc->cur_samplerate - 1;
363 clockselect.async = 0;
364 clockselect.fraction = frac;
365 clockselect.disabled_channels = 0;
367 sigma_write_register(WRITE_CLOCK_SELECT,
368 (uint8_t *) &clockselect,
369 sizeof(clockselect), devc);
372 /* Setup maximum post trigger time. */
373 sigma_set_register(WRITE_POST_TRIGGER,
374 (devc->capture_ratio * 255) / 100, devc);
376 /* Start acqusition. */
377 gettimeofday(&devc->start_tv, 0);
378 sigma_set_register(WRITE_MODE, 0x0d, devc);
380 std_session_send_df_header(sdi);
382 /* Add capture source. */
383 sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
385 devc->state.state = SIGMA_CAPTURE;
390 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
392 struct dev_context *devc;
395 devc->state.state = SIGMA_IDLE;
397 sr_session_source_remove(sdi->session, -1);
402 static struct sr_dev_driver asix_sigma_driver_info = {
403 .name = "asix-sigma",
404 .longname = "ASIX SIGMA/SIGMA2",
407 .cleanup = std_cleanup,
409 .dev_list = std_dev_list,
410 .dev_clear = dev_clear,
411 .config_get = config_get,
412 .config_set = config_set,
413 .config_list = config_list,
414 .dev_open = dev_open,
415 .dev_close = dev_close,
416 .dev_acquisition_start = dev_acquisition_start,
417 .dev_acquisition_stop = dev_acquisition_stop,
420 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);