2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <fx2macros.h>
24 #include <autovector.h>
28 /* Change to support as many interfaces as you need. */
29 static BYTE altiface = 0;
31 static volatile __bit dosud = FALSE;
32 static volatile __bit dosuspend = FALSE;
34 extern __code BYTE highspd_dscr;
35 extern __code BYTE fullspd_dscr;
37 void resume_isr(void) __interrupt RESUME_ISR
42 void sudav_isr(void) __interrupt SUDAV_ISR
48 void usbreset_isr(void) __interrupt USBRESET_ISR
50 handle_hispeed(FALSE);
54 void hispeed_isr(void) __interrupt HISPEED_ISR
60 void suspend_isr(void) __interrupt SUSPEND_ISR
66 void timer2_isr(void) __interrupt TF2_ISR
68 /* Toggle the 1kHz pin, only accurate up to ca 8MHz */
74 * The gain stage is 2 stage approach. -6dB and -20dB on the first stage (attentuator). The second stage is then doing the gain by 3 different resistor values switched into the feedback loop.
76 * PC1=1; PC2=0; PC3= 0 -> Gain x0.1 = -20dB
77 * PC1=1; PC2=0; PC3= 1 -> Gain x0.2 = -14dB
78 * PC1=1; PC2=1; PC3= 0 -> Gain x0.4 = -8dB
79 * PC1=0; PC2=0; PC3= 0 -> Gain x0.5 = -6dB
80 * PC1=0; PC2=0; PC3= 1 -> Gain x1 = 0dB
81 * PC1=0; PC2=1; PC3= 0 -> Gain x2 = +6dB
83 * PE1=1; PC4=0; PC5= 0 -> Gain x0.1 = -20dB
84 * PE1=1; PC4=0; PC5= 1 -> Gain x0.2 = -14dB
85 * PE1=1; PC4=1; PC5= 0 -> Gain x0.4 = -8dB
86 * PE1=0; PC4=0; PC5= 0 -> Gain x0.5 = -6dB
87 * PE1=0; PC4=0; PC5= 1 -> Gain x1 = 0dB
88 * PE1=0; PC4=1; PC5= 0 -> Gain x2 = +6dB
90 static BOOL set_voltage(BYTE channel, BYTE val)
92 BYTE bits_C, bit_E, mask_C, mask_E;
117 } else if (channel == 1) {
147 IOC = (IOC & ~mask_C) | (bits_C & mask_C);
148 IOE = (IOE & ~mask_E) | (bit_E & mask_E);
155 * Each LSB in the nibble of the byte controls the coupling per channel.
157 * Setting PE3 disables AC coupling capacitor on CH0.
158 * Setting PE0 disables AC coupling capacitor on CH1.
160 static void set_coupling(BYTE coupling_cfg)
162 if (coupling_cfg & 0x01)
167 if (coupling_cfg & 0x10)
173 static BOOL set_numchannels(BYTE numchannels)
175 if (numchannels == 1 || numchannels == 2) {
176 BYTE fifocfg = 7 + numchannels;
177 EP2FIFOCFG = fifocfg;
178 EP6FIFOCFG = fifocfg;
185 static void clear_fifo(void)
198 static void stop_sampling(void)
202 INPKTEND = (altiface == 0) ? 6 : 2;
205 static void start_sampling(void)
211 for (i = 0; i < 1000; i++);
213 while (!(GPIFTRIG & 0x80))
220 GPIFTRIG = (altiface == 0) ? 6 : 4;
224 static void select_interface(BYTE alt)
226 const BYTE *pPacketSize = \
227 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
228 + (9 + (16 * alt) + 9 + 4);
237 EP6AUTOINLENL = pPacketSize[0];
238 EP6AUTOINLENH = pPacketSize[1];
244 EP2AUTOINLENL = pPacketSize[0];
245 EP2AUTOINLENH = pPacketSize[1] & 0x7;
246 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
250 static const struct samplerate_info {
259 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
260 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
261 { 24, 1, 0, 2, 1, 0x40, 0xea },
262 { 16, 1, 1, 2, 0, 0x40, 0xea },
263 { 15, 1, 0, 2, 1, 0x40, 0xaa },
264 { 12, 2, 1, 2, 0, 0x40, 0xea },
265 { 11, 1, 1, 2, 0, 0x40, 0xaa },
266 { 8, 3, 2, 2, 0, 0x40, 0xea },
267 { 6, 2, 2, 2, 0, 0x40, 0xaa },
268 { 5, 3, 2, 2, 0, 0x40, 0xaa },
269 { 4, 6, 5, 2, 0, 0x40, 0xea },
270 { 3, 5, 4, 2, 0, 0x40, 0xaa },
271 { 2, 12, 11, 2, 0, 0x40, 0xea },
272 { 1, 24, 23, 2, 0, 0x40, 0xea },
273 { 50, 48, 47, 2, 0, 0x40, 0xea },
274 { 20, 120, 119, 2, 0, 0x40, 0xea },
275 { 10, 240, 239, 2, 0, 0x40, 0xea },
278 static BOOL set_samplerate(BYTE rate)
282 while (samplerates[i].rate != rate) {
284 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
288 IFCONFIG = samplerates[i].ifcfg;
295 * The program for low-speed, e.g. 1 MHz, is:
296 * wait 24, CTL2=0, FIFO
300 * The program for 24 MHz is:
301 * wait 1, CTL2=0, FIFO
304 * The program for 30/48 MHz is:
305 * jump 0, CTL2=Z, FIFO, LOOP
308 EXTAUTODAT2 = samplerates[i].wait0;
309 EXTAUTODAT2 = samplerates[i].wait1;
317 EXTAUTODAT2 = samplerates[i].opc0;
318 EXTAUTODAT2 = samplerates[i].opc1;
326 EXTAUTODAT2 = samplerates[i].out0;
344 for (i = 0; i < 96; i++)
350 static BOOL set_calibration_pulse(BYTE fs)
354 RCAP2L = -10000 & 0xff;
355 RCAP2H = (-10000 >> 8) & 0xff;
358 RCAP2L = -1000 & 0xff;
359 RCAP2H = (-1000 >> 8) & 0xff;
362 RCAP2L = -100 & 0xff;
374 /* Set *alt_ifc to the current alt interface for ifc. */
375 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
385 * Return TRUE if you set the interface requested.
387 * Note: This function should reconfigure and reset the endpoints
388 * according to the interface descriptors you provided.
390 BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
393 select_interface(alt_ifc);
398 BYTE handle_get_configuration(void)
400 /* We only support configuration 0. */
404 BOOL handle_set_configuration(BYTE cfg)
406 /* We only support configuration 0. */
412 BOOL handle_vendorcommand(BYTE cmd)
416 /* Clear EP0BCH/L for each valid command. */
417 if (cmd >= 0xe0 && cmd <= 0xe6) {
420 while (EP0CS & bmEPBUSY);
426 set_voltage(cmd - 0xe0, EP0BUF[0]);
429 set_samplerate(EP0BUF[0]);
436 set_numchannels(EP0BUF[0]);
439 set_coupling(EP0BUF[0]);
442 set_calibration_pulse(EP0BUF[0]);
446 return FALSE; /* Not handled by handlers. */
449 static void init(void)
454 /* In idle mode tristate all outputs. */
458 GPIFREADYSTAT = 0x00;
469 static void main(void)
476 /* Set up interrupts. */
485 /* Global (8051) interrupt enable. */
489 RCAP2L = -1000 & 0xff;
490 RCAP2H = (-1000 >> 8) & 0xff;
515 /* Make sure ext wakeups are cleared. */
516 WAKEUPCS |= bmWU|bmWU2;
528 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
530 /* Resume (TRM 6.4). */
531 if (REMOTE_WAKEUP()) {
533 USBCS |= bmSIGRESUME;
535 USBCS &= ~bmSIGRESUME;