1 -------------------------------------------------------------------------------
3 -------------------------------------------------------------------------------
5 This is a set of example captures of ON Semi CAT24C256 I2C traffic.
8 http://www.onsemi.com/PowerSolutions/product.do?id=CAT24C256
9 https://www.onsemi.com/pub/Collateral/CAT24C256-D.PDF
10 https://github.com/whitequark/Glasgow
16 The logic analyzer used was an mcupro Saleae 16 clone (at 2 MHz).
24 glasgow-firmware-flash.sr
25 -------------------------
27 This is the I2C communication of the FX2_MEM EEPROM being flashed with
28 8051 firmware and then verified on a Glasgow board. Only the changed bytes are
29 written, which is why there are two read sequences. The uneven pages are
30 because of the EP0 buffer being limited to 64 bytes.